From 9a3e6ab4df2a048a2c36d37ceb33107e6c054368 Mon Sep 17 00:00:00 2001 From: zhaohe Date: Thu, 7 Mar 2024 15:57:42 +0800 Subject: [PATCH] recode project --- .cproject | 14 +- .project | 2 +- .settings/language.settings.xml | 4 +- .vscode/settings.json | 2 +- ..._light_src_timing_controller_stm32 Debug.launch | 83 +++++ camera_light_src_timing_controller_stm32.cfg | 44 +++ camera_light_src_timing_controller_stm32.ioc | 361 +++++++++++++++++++++ camera_light_src_timing_controller_stm32.launch | 98 ++++++ libzaf/README.md | 10 + libzaf/pin.c | 234 +++++++++++++ libzaf/pin.h | 119 +++++++ libzaf/zaf.h | 16 + libzaf/zaf_basic.c | 0 libzaf/zaf_basic.h | 9 + libzaf/zaf_delay.c | 60 ++++ libzaf/zaf_delay.h | 7 + libzaf/zaf_flash.c | 110 +++++++ libzaf/zaf_flash.h | 68 ++++ libzaf/zaf_gpio.c | 327 +++++++++++++++++++ libzaf/zaf_gpio.h | 36 ++ libzaf/zaf_id.c | 31 ++ libzaf/zaf_id.h | 12 + libzaf/zaf_log.c | 39 +++ libzaf/zaf_log.h | 39 +++ libzaf/zaf_udp.c | 104 ++++++ libzaf/zaf_udp.h | 40 +++ usrc/base_service/config_service.c | 18 +- usrc/base_service/config_service.h | 2 +- usrc/base_service/fpga_if.c | 32 +- usrc/base_service/fpga_if.h | 12 +- usrc/main.cpp | 44 +-- usrc/project_configs.h | 2 +- usrc/project_dep.h | 4 +- usrc/service/device_info.cpp | 4 +- usrc/service/device_info.hpp | 2 +- usrc/service/extern_if_service.c | 8 +- usrc/service/extern_if_service.h | 1 + usrc/service/global_flag.c | 0 usrc/service/global_flag.h | 0 usrc/service/reg_manager.c | 1 - usrc/service/reg_manager.h | 3 +- usrc/service/report_generator_service.c | 17 +- usrc/service/report_generator_service.h | 4 +- xsync_stm32 Debug.launch | 83 ----- xsync_stm32.cfg | 44 --- xsync_stm32.ioc | 361 --------------------- xsync_stm32.launch | 98 ------ xsync_v3.pdf | Bin 388715 -> 0 bytes zaf_protocol/zaf_protocol.h | 191 +++++++++++ 49 files changed, 2123 insertions(+), 677 deletions(-) create mode 100644 camera_light_src_timing_controller_stm32 Debug.launch create mode 100644 camera_light_src_timing_controller_stm32.cfg create mode 100644 camera_light_src_timing_controller_stm32.ioc create mode 100644 camera_light_src_timing_controller_stm32.launch create mode 100644 libzaf/README.md create mode 100644 libzaf/pin.c create mode 100644 libzaf/pin.h create mode 100644 libzaf/zaf.h create mode 100644 libzaf/zaf_basic.c create mode 100644 libzaf/zaf_basic.h create mode 100644 libzaf/zaf_delay.c create mode 100644 libzaf/zaf_delay.h create mode 100644 libzaf/zaf_flash.c create mode 100644 libzaf/zaf_flash.h create mode 100644 libzaf/zaf_gpio.c create mode 100644 libzaf/zaf_gpio.h create mode 100644 libzaf/zaf_id.c create mode 100644 libzaf/zaf_id.h create mode 100644 libzaf/zaf_log.c create mode 100644 libzaf/zaf_log.h create mode 100644 libzaf/zaf_udp.c create mode 100644 libzaf/zaf_udp.h delete mode 100644 usrc/service/global_flag.c delete mode 100644 usrc/service/global_flag.h delete mode 100644 xsync_stm32 Debug.launch delete mode 100644 xsync_stm32.cfg delete mode 100644 xsync_stm32.ioc delete mode 100644 xsync_stm32.launch delete mode 100644 xsync_v3.pdf create mode 100644 zaf_protocol/zaf_protocol.h diff --git a/.cproject b/.cproject index 3e952a4..4db673b 100644 --- a/.cproject +++ b/.cproject @@ -146,12 +146,13 @@ - + + + - - + @@ -278,12 +279,13 @@ - + + + - - + diff --git a/.project b/.project index 2ca8f69..e003be1 100644 --- a/.project +++ b/.project @@ -1,6 +1,6 @@ - a8000_hbot_robot_controler + camera_light_src_timing_controller_stm32 diff --git a/.settings/language.settings.xml b/.settings/language.settings.xml index 92b355c..68941f4 100644 --- a/.settings/language.settings.xml +++ b/.settings/language.settings.xml @@ -5,7 +5,7 @@ - + @@ -16,7 +16,7 @@ - + diff --git a/.vscode/settings.json b/.vscode/settings.json index 4cd6516..521da32 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -90,7 +90,7 @@ "project_dep.h": "c", "project_configs.h": "c", "sockets.h": "c", - "xs_udp.h": "c", + "zaf_udp.h": "c", "api.h": "c", "sys.h": "c", "reg_manager.h": "c", diff --git a/camera_light_src_timing_controller_stm32 Debug.launch b/camera_light_src_timing_controller_stm32 Debug.launch new file mode 100644 index 0000000..a474948 --- /dev/null +++ b/camera_light_src_timing_controller_stm32 Debug.launch @@ -0,0 +1,83 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/camera_light_src_timing_controller_stm32.cfg b/camera_light_src_timing_controller_stm32.cfg new file mode 100644 index 0000000..ef37116 --- /dev/null +++ b/camera_light_src_timing_controller_stm32.cfg @@ -0,0 +1,44 @@ +# This is an genericBoard board with a single STM32F407VETx chip +# +# Generated by STM32CubeIDE +# Take care that such file, as generated, may be overridden without any early notice. Please have a look to debug launch configuration setup(s) + +source [find interface/stlink-dap.cfg] + + +set WORKAREASIZE 0x8000 + +transport select "dapdirect_swd" + +set CHIPNAME STM32F407VETx +set BOARDNAME genericBoard + +# Enable debug when in low power modes +set ENABLE_LOW_POWER 1 + +# Stop Watchdog counters when halt +set STOP_WATCHDOG 1 + +# STlink Debug clock frequency +set CLOCK_FREQ 8000 + +# Reset configuration +# use hardware reset, connect under reset +# connect_assert_srst needed if low power mode application running (WFI...) +reset_config srst_only srst_nogate connect_assert_srst +set CONNECT_UNDER_RESET 1 +set CORE_RESET 0 + +# ACCESS PORT NUMBER +set AP_NUM 0 +# GDB PORT +set GDB_PORT 3333 + + + + + +# BCTM CPU variables + +source [find target/stm32f4x.cfg] + diff --git a/camera_light_src_timing_controller_stm32.ioc b/camera_light_src_timing_controller_stm32.ioc new file mode 100644 index 0000000..49f0669 --- /dev/null +++ b/camera_light_src_timing_controller_stm32.ioc @@ -0,0 +1,361 @@ +#MicroXplorer Configuration settings - do not modify +CAD.formats= +CAD.pinconfig= +CAD.provider= +Dma.Request0=USART1_RX +Dma.Request1=SPI2_TX +Dma.Request2=SPI2_RX +Dma.Request3=SPI1_RX +Dma.Request4=SPI1_TX +Dma.RequestsNb=5 +Dma.SPI1_RX.3.Direction=DMA_PERIPH_TO_MEMORY +Dma.SPI1_RX.3.FIFOMode=DMA_FIFOMODE_DISABLE +Dma.SPI1_RX.3.Instance=DMA2_Stream0 +Dma.SPI1_RX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE +Dma.SPI1_RX.3.MemInc=DMA_MINC_ENABLE +Dma.SPI1_RX.3.Mode=DMA_NORMAL +Dma.SPI1_RX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE +Dma.SPI1_RX.3.PeriphInc=DMA_PINC_DISABLE +Dma.SPI1_RX.3.Priority=DMA_PRIORITY_LOW +Dma.SPI1_RX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode +Dma.SPI1_TX.4.Direction=DMA_MEMORY_TO_PERIPH +Dma.SPI1_TX.4.FIFOMode=DMA_FIFOMODE_DISABLE +Dma.SPI1_TX.4.Instance=DMA2_Stream3 +Dma.SPI1_TX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE +Dma.SPI1_TX.4.MemInc=DMA_MINC_ENABLE +Dma.SPI1_TX.4.Mode=DMA_NORMAL +Dma.SPI1_TX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE +Dma.SPI1_TX.4.PeriphInc=DMA_PINC_DISABLE +Dma.SPI1_TX.4.Priority=DMA_PRIORITY_LOW +Dma.SPI1_TX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode +Dma.SPI2_RX.2.Direction=DMA_PERIPH_TO_MEMORY +Dma.SPI2_RX.2.FIFOMode=DMA_FIFOMODE_DISABLE +Dma.SPI2_RX.2.Instance=DMA1_Stream3 +Dma.SPI2_RX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE +Dma.SPI2_RX.2.MemInc=DMA_MINC_ENABLE +Dma.SPI2_RX.2.Mode=DMA_NORMAL +Dma.SPI2_RX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE +Dma.SPI2_RX.2.PeriphInc=DMA_PINC_DISABLE +Dma.SPI2_RX.2.Priority=DMA_PRIORITY_LOW +Dma.SPI2_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode +Dma.SPI2_TX.1.Direction=DMA_MEMORY_TO_PERIPH +Dma.SPI2_TX.1.FIFOMode=DMA_FIFOMODE_DISABLE +Dma.SPI2_TX.1.Instance=DMA1_Stream4 +Dma.SPI2_TX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE +Dma.SPI2_TX.1.MemInc=DMA_MINC_ENABLE +Dma.SPI2_TX.1.Mode=DMA_NORMAL +Dma.SPI2_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE +Dma.SPI2_TX.1.PeriphInc=DMA_PINC_DISABLE +Dma.SPI2_TX.1.Priority=DMA_PRIORITY_LOW +Dma.SPI2_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode +Dma.USART1_RX.0.Direction=DMA_PERIPH_TO_MEMORY +Dma.USART1_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE +Dma.USART1_RX.0.Instance=DMA2_Stream2 +Dma.USART1_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE +Dma.USART1_RX.0.MemInc=DMA_MINC_ENABLE +Dma.USART1_RX.0.Mode=DMA_NORMAL +Dma.USART1_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE +Dma.USART1_RX.0.PeriphInc=DMA_PINC_DISABLE +Dma.USART1_RX.0.Priority=DMA_PRIORITY_LOW +Dma.USART1_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode +ETH.IPParameters=MediaInterface,RxBuffLen,RxMode,PHY_Name_RMII,PHY_User_Name,PHY_SR,PHY_SPEED_STATUS,PHY_DUPLEX_STATUS,MACAddr +ETH.MACAddr=00\:80\:E1\:00\:00\:01 +ETH.MediaInterface=HAL_ETH_RMII_MODE +ETH.PHY_DUPLEX_STATUS=0x0010 +ETH.PHY_Name_RMII=userPHY +ETH.PHY_SPEED_STATUS=0x0004 +ETH.PHY_SR=0x1F +ETH.PHY_User_Name=LAN8720A +ETH.RxBuffLen=1536 +ETH.RxMode=ETH_RXINTERRUPT_MODE +FREERTOS.FootprintOK=true +FREERTOS.IPParameters=Tasks01,FootprintOK,configUSE_NEWLIB_REENTRANT,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configRECORD_STACK_HIGH_ADDRESS,configENABLE_FPU,configTOTAL_HEAP_SIZE +FREERTOS.Tasks01=defaultTask,-3,1024,StartDefaultTask,As weak,NULL,Dynamic,NULL,NULL +FREERTOS.configENABLE_FPU=1 +FREERTOS.configRECORD_STACK_HIGH_ADDRESS=1 +FREERTOS.configTOTAL_HEAP_SIZE=30000 +FREERTOS.configUSE_COUNTING_SEMAPHORES=1 +FREERTOS.configUSE_NEWLIB_REENTRANT=1 +FREERTOS.configUSE_RECURSIVE_MUTEXES=1 +File.Version=6 +GPIO.groupedBy=Group By Peripherals +KeepUserPlacement=false +LWIP.BSP.number=1 +LWIP.GATEWAY_ADDRESS=192.168.008.001 +LWIP.IPParameters=LWIP_DHCP,IP_ADDRESS,NETMASK_ADDRESS,GATEWAY_ADDRESS,LWIP_DNS,LWIP_NETIF_HOSTNAME,LWIP_SO_RCVTIMEO,LWIP_SO_SNDTIMEO +LWIP.IP_ADDRESS=192.168.008.010 +LWIP.LWIP_DHCP=0 +LWIP.LWIP_DNS=1 +LWIP.LWIP_NETIF_HOSTNAME=1 +LWIP.LWIP_SO_RCVTIMEO=1 +LWIP.LWIP_SO_SNDTIMEO=1 +LWIP.NETMASK_ADDRESS=255.255.255.255 +LWIP.Version=v2.1.2_Cube +LWIP0.BSP.STBoard=false +LWIP0.BSP.api=BSP_COMPONENT_DRIVER +LWIP0.BSP.component=LAN8742 +LWIP0.BSP.condition= +LWIP0.BSP.instance=LAN8742 +LWIP0.BSP.ip= +LWIP0.BSP.mode= +LWIP0.BSP.name=Driver_PHY +LWIP0.BSP.semaphore=S_LAN8742 +LWIP0.BSP.solution=LAN8742 +Mcu.CPN=STM32F407VET6 +Mcu.Family=STM32F4 +Mcu.IP0=CRC +Mcu.IP1=DMA +Mcu.IP10=SYS +Mcu.IP11=TIM1 +Mcu.IP12=TIM3 +Mcu.IP13=TIM6 +Mcu.IP14=TIM7 +Mcu.IP15=USART1 +Mcu.IP2=ETH +Mcu.IP3=FREERTOS +Mcu.IP4=LWIP +Mcu.IP5=NVIC +Mcu.IP6=RCC +Mcu.IP7=RNG +Mcu.IP8=SPI1 +Mcu.IP9=SPI2 +Mcu.IPNb=16 +Mcu.Name=STM32F407V(E-G)Tx +Mcu.Package=LQFP100 +Mcu.Pin0=PH0-OSC_IN +Mcu.Pin1=PH1-OSC_OUT +Mcu.Pin10=PA7 +Mcu.Pin11=PC4 +Mcu.Pin12=PC5 +Mcu.Pin13=PB10 +Mcu.Pin14=PB11 +Mcu.Pin15=PB12 +Mcu.Pin16=PB13 +Mcu.Pin17=PA9 +Mcu.Pin18=PA10 +Mcu.Pin19=PA13 +Mcu.Pin2=PC1 +Mcu.Pin20=PA14 +Mcu.Pin21=PD3 +Mcu.Pin22=PB5 +Mcu.Pin23=VP_CRC_VS_CRC +Mcu.Pin24=VP_FREERTOS_VS_CMSIS_V1 +Mcu.Pin25=VP_LWIP_VS_Enabled +Mcu.Pin26=VP_RNG_VS_RNG +Mcu.Pin27=VP_SYS_VS_tim11 +Mcu.Pin28=VP_TIM1_VS_ClockSourceINT +Mcu.Pin29=VP_TIM3_VS_ClockSourceINT +Mcu.Pin3=PC2 +Mcu.Pin30=VP_TIM6_VS_ClockSourceINT +Mcu.Pin31=VP_TIM7_VS_ClockSourceINT +Mcu.Pin4=PC3 +Mcu.Pin5=PA1 +Mcu.Pin6=PA2 +Mcu.Pin7=PA4 +Mcu.Pin8=PA5 +Mcu.Pin9=PA6 +Mcu.PinsNb=32 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32F407VETx +MxCube.Version=6.7.0 +MxDb.Version=DB.6.0.70 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true +NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true +NVIC.DMA2_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true +NVIC.DMA2_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true +NVIC.DMA2_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.ETH_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true +NVIC.ForceEnableDMAVector=true +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SPI1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true +NVIC.SPI2_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false +NVIC.SavedPendsvIrqHandlerGenerated=true +NVIC.SavedSvcallIrqHandlerGenerated=true +NVIC.SavedSystickIrqHandlerGenerated=true +NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true\:false +NVIC.TIM1_TRG_COM_TIM11_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true +NVIC.TIM6_DAC_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true +NVIC.TIM7_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true +NVIC.TimeBase=TIM1_TRG_COM_TIM11_IRQn +NVIC.TimeBaseIP=TIM11 +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false +PA1.Mode=RMII +PA1.Signal=ETH_REF_CLK +PA10.Mode=Asynchronous +PA10.Signal=USART1_RX +PA13.Mode=Serial_Wire +PA13.Signal=SYS_JTMS-SWDIO +PA14.Mode=Serial_Wire +PA14.Signal=SYS_JTCK-SWCLK +PA2.Mode=RMII +PA2.Signal=ETH_MDIO +PA4.Mode=NSS_Signal_Hard_Output +PA4.Signal=SPI1_NSS +PA5.Mode=Full_Duplex_Master +PA5.Signal=SPI1_SCK +PA6.Mode=Full_Duplex_Master +PA6.Signal=SPI1_MISO +PA7.Mode=RMII +PA7.Signal=ETH_CRS_DV +PA9.Locked=true +PA9.Mode=Asynchronous +PA9.Signal=USART1_TX +PB10.Mode=Full_Duplex_Master +PB10.Signal=SPI2_SCK +PB11.Mode=RMII +PB11.Signal=ETH_TX_EN +PB12.Mode=RMII +PB12.Signal=ETH_TXD0 +PB13.Mode=RMII +PB13.Signal=ETH_TXD1 +PB5.Mode=Full_Duplex_Master +PB5.Signal=SPI1_MOSI +PC1.Mode=RMII +PC1.Signal=ETH_MDC +PC2.Mode=Full_Duplex_Master +PC2.Signal=SPI2_MISO +PC3.Mode=Full_Duplex_Master +PC3.Signal=SPI2_MOSI +PC4.Mode=RMII +PC4.Signal=ETH_RXD0 +PC5.Mode=RMII +PC5.Signal=ETH_RXD1 +PD3.Locked=true +PD3.Signal=GPIO_Output +PH0-OSC_IN.Mode=HSE-External-Oscillator +PH0-OSC_IN.Signal=RCC_OSC_IN +PH1-OSC_OUT.Mode=HSE-External-Oscillator +PH1-OSC_OUT.Signal=RCC_OSC_OUT +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerOptimize=6 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=true +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true +ProjectManager.DeletePrevious=false +ProjectManager.DeviceId=STM32F407VETx +ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.27.1 +ProjectManager.FreePins=true +ProjectManager.HalAssertFull=true +ProjectManager.HeapSize=0x2000 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=1 +ProjectManager.MainLocation=Core/Src +ProjectManager.NoMain=false +ProjectManager.PreviousToolchain=STM32CubeIDE +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=camera_light_src_timing_controller_stm32.ioc +ProjectManager.ProjectName=camera_light_src_timing_controller_stm32 +ProjectManager.ProjectStructure= +ProjectManager.RegisterCallBack= +ProjectManager.StackSize=0x1000 +ProjectManager.TargetToolchain=STM32CubeIDE +ProjectManager.ToolChainLocation= +ProjectManager.UAScriptAfterPath= +ProjectManager.UAScriptBeforePath= +ProjectManager.UnderRoot=true +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_TIM3_Init-TIM3-false-HAL-true,6-MX_CRC_Init-CRC-false-HAL-true,7-MX_RNG_Init-RNG-false-HAL-true,8-MX_TIM7_Init-TIM7-false-HAL-true,9-MX_TIM6_Init-TIM6-false-HAL-true,10-MX_TIM1_Init-TIM1-false-HAL-true,11-MX_LWIP_Init-LWIP-false-HAL-false,12-MX_SPI1_Init-SPI1-false-HAL-true,13-MX_SPI2_Init-SPI2-false-HAL-true +RCC.48MHZClocksFreq_Value=48000000 +RCC.AHBFreq_Value=144000000 +RCC.APB1CLKDivider=RCC_HCLK_DIV4 +RCC.APB1Freq_Value=36000000 +RCC.APB1TimFreq_Value=72000000 +RCC.APB2CLKDivider=RCC_HCLK_DIV2 +RCC.APB2Freq_Value=72000000 +RCC.APB2TimFreq_Value=144000000 +RCC.CortexFreq_Value=144000000 +RCC.EthernetFreq_Value=144000000 +RCC.FCLKCortexFreq_Value=144000000 +RCC.FamilyName=M +RCC.HCLKFreq_Value=144000000 +RCC.HSE_VALUE=8000000 +RCC.HSI_VALUE=16000000 +RCC.I2SClocksFreq_Value=64000000 +RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLI2SN,PLLM,PLLN,PLLQ,PLLQCLKFreq_Value,PLLSourceVirtual,RCC_MCO1Source,RCC_MCO2Source,RCC_MCODiv1,RCC_MCODiv2,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VcooutputI2S +RCC.LSE_VALUE=32768 +RCC.LSI_VALUE=32000 +RCC.MCO1PinFreq_Value=36000000 +RCC.MCO2PinFreq_Value=16000000 +RCC.PLLCLKFreq_Value=144000000 +RCC.PLLI2SN=64 +RCC.PLLM=4 +RCC.PLLN=144 +RCC.PLLQ=6 +RCC.PLLQCLKFreq_Value=48000000 +RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE +RCC.RCC_MCO1Source=RCC_MCO1SOURCE_PLLCLK +RCC.RCC_MCO2Source=RCC_MCO2SOURCE_PLLI2SCLK +RCC.RCC_MCODiv1=RCC_MCODIV_4 +RCC.RCC_MCODiv2=RCC_MCODIV_4 +RCC.RTCFreq_Value=32000 +RCC.RTCHSEDivFreq_Value=4000000 +RCC.SYSCLKFreq_VALUE=144000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.VCOI2SOutputFreq_Value=128000000 +RCC.VCOInputFreq_Value=2000000 +RCC.VCOOutputFreq_Value=288000000 +RCC.VcooutputI2S=64000000 +SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_128 +SPI1.CLKPhase=SPI_PHASE_2EDGE +SPI1.CLKPolarity=SPI_POLARITY_HIGH +SPI1.CalculateBaudRate=562.5 KBits/s +SPI1.Direction=SPI_DIRECTION_2LINES +SPI1.FirstBit=SPI_FIRSTBIT_LSB +SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS,BaudRatePrescaler,FirstBit,CLKPolarity,CLKPhase +SPI1.Mode=SPI_MODE_MASTER +SPI1.VirtualNSS=VM_NSSHARD +SPI1.VirtualType=VM_MASTER +SPI2.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_64 +SPI2.CLKPhase=SPI_PHASE_2EDGE +SPI2.CLKPolarity=SPI_POLARITY_HIGH +SPI2.CalculateBaudRate=562.5 KBits/s +SPI2.Direction=SPI_DIRECTION_2LINES +SPI2.FirstBit=SPI_FIRSTBIT_LSB +SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,CLKPolarity,CLKPhase,FirstBit,BaudRatePrescaler +SPI2.Mode=SPI_MODE_MASTER +SPI2.VirtualType=VM_MASTER +TIM1.IPParameters=Period,Prescaler +TIM1.Period=9999 +TIM1.Prescaler=143 +TIM3.IPParameters=Prescaler,Period +TIM3.Period=9999 +TIM3.Prescaler=71 +TIM6.IPParameters=Prescaler +TIM6.Prescaler=71 +TIM7.IPParameters=Prescaler +TIM7.Prescaler=81 +USART1.BaudRate=921600 +USART1.IPParameters=VirtualMode,BaudRate +USART1.VirtualMode=VM_ASYNC +VP_CRC_VS_CRC.Mode=CRC_Activate +VP_CRC_VS_CRC.Signal=CRC_VS_CRC +VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1 +VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1 +VP_LWIP_VS_Enabled.Mode=Enabled +VP_LWIP_VS_Enabled.Signal=LWIP_VS_Enabled +VP_RNG_VS_RNG.Mode=RNG_Activate +VP_RNG_VS_RNG.Signal=RNG_VS_RNG +VP_SYS_VS_tim11.Mode=TIM11 +VP_SYS_VS_tim11.Signal=SYS_VS_tim11 +VP_TIM1_VS_ClockSourceINT.Mode=Internal +VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT +VP_TIM3_VS_ClockSourceINT.Mode=Internal +VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT +VP_TIM6_VS_ClockSourceINT.Mode=Enable_Timer +VP_TIM6_VS_ClockSourceINT.Signal=TIM6_VS_ClockSourceINT +VP_TIM7_VS_ClockSourceINT.Mode=Enable_Timer +VP_TIM7_VS_ClockSourceINT.Signal=TIM7_VS_ClockSourceINT +board=custom +rtos.0.ip=FREERTOS +isbadioc=false diff --git a/camera_light_src_timing_controller_stm32.launch b/camera_light_src_timing_controller_stm32.launch new file mode 100644 index 0000000..34468c0 --- /dev/null +++ b/camera_light_src_timing_controller_stm32.launch @@ -0,0 +1,98 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/libzaf/README.md b/libzaf/README.md new file mode 100644 index 0000000..9b1d451 --- /dev/null +++ b/libzaf/README.md @@ -0,0 +1,10 @@ +``` +libzaf + Iflytop ARM and FPGA based Zynq Acceleration Framework + +功能: + + + + +``` \ No newline at end of file diff --git a/libzaf/pin.c b/libzaf/pin.c new file mode 100644 index 0000000..34984c6 --- /dev/null +++ b/libzaf/pin.c @@ -0,0 +1,234 @@ +#include "pin.h" +const char* pinname(Pin_t pin) { + switch (pin) { + case PinNull: + return "PinNull"; + case PA0: + return "PA0"; + case PA1: + return "PA1"; + case PA2: + return "PA2"; + case PA3: + return "PA3"; + case PA4: + return "PA4"; + case PA5: + return "PA5"; + case PA6: + return "PA6"; + case PA7: + return "PA7"; + case PA8: + return "PA8"; + case PA9: + return "PA9"; + case PA10: + return "PA10"; + case PA11: + return "PA11"; + case PA12: + return "PA12"; + case PA13: + return "PA13"; + case PA14: + return "PA14"; + case PA15: + return "PA15"; + case PB0: + return "PB0"; + case PB1: + return "PB1"; + case PB2: + return "PB2"; + case PB3: + return "PB3"; + case PB4: + return "PB4"; + case PB5: + return "PB5"; + case PB6: + return "PB6"; + case PB7: + return "PB7"; + case PB8: + return "PB8"; + case PB9: + return "PB9"; + case PB10: + return "PB10"; + case PB11: + return "PB11"; + case PB12: + return "PB12"; + case PB13: + return "PB13"; + case PB14: + return "PB14"; + case PB15: + return "PB15"; + case PC0: + return "PC0"; + case PC1: + return "PC1"; + case PC2: + return "PC2"; + case PC3: + return "PC3"; + case PC4: + return "PC4"; + case PC5: + return "PC5"; + case PC6: + return "PC6"; + case PC7: + return "PC7"; + case PC8: + return "PC8"; + case PC9: + return "PC9"; + case PC10: + return "PC10"; + case PC11: + return "PC11"; + case PC12: + return "PC12"; + case PC13: + return "PC13"; + case PC14: + return "PC14"; + case PC15: + return "PC15"; + case PD0: + return "PD0"; + case PD1: + return "PD1"; + case PD2: + return "PD2"; + case PD3: + return "PD3"; + case PD4: + return "PD4"; + case PD5: + return "PD5"; + case PD6: + return "PD6"; + case PD7: + return "PD7"; + case PD8: + return "PD8"; + case PD9: + return "PD9"; + case PD10: + return "PD10"; + case PD11: + return "PD11"; + case PD12: + return "PD12"; + case PD13: + return "PD13"; + case PD14: + return "PD14"; + case PD15: + return "PD15"; + case PE0: + return "PE0"; + case PE1: + return "PE1"; + case PE2: + return "PE2"; + case PE3: + return "PE3"; + case PE4: + return "PE4"; + case PE5: + return "PE5"; + case PE6: + return "PE6"; + case PE7: + return "PE7"; + case PE8: + return "PE8"; + case PE9: + return "PE9"; + case PE10: + return "PE10"; + case PE11: + return "PE11"; + case PE12: + return "PE12"; + case PE13: + return "PE13"; + case PE14: + return "PE14"; + case PE15: + return "PE15"; + case PF0: + return "PF0"; + case PF1: + return "PF1"; + case PF2: + return "PF2"; + case PF3: + return "PF3"; + case PF4: + return "PF4"; + case PF5: + return "PF5"; + case PF6: + return "PF6"; + case PF7: + return "PF7"; + case PF8: + return "PF8"; + case PF9: + return "PF9"; + case PF10: + return "PF10"; + case PF11: + return "PF11"; + case PF12: + return "PF12"; + case PF13: + return "PF13"; + case PF14: + return "PF14"; + case PF15: + return "PF15"; + case PG0: + return "PG0"; + case PG1: + return "PG1"; + case PG2: + return "PG2"; + case PG3: + return "PG3"; + case PG4: + return "PG4"; + case PG5: + return "PG5"; + case PG6: + return "PG6"; + case PG7: + return "PG7"; + case PG8: + return "PG8"; + case PG9: + return "PG9"; + case PG10: + return "PG10"; + case PG11: + return "PG11"; + case PG12: + return "PG12"; + case PG13: + return "PG13"; + case PG14: + return "PG14"; + case PG15: + return "PG15"; + default: + break; + } + return "UNKNOWN_PIN"; +}; diff --git a/libzaf/pin.h b/libzaf/pin.h new file mode 100644 index 0000000..1b44440 --- /dev/null +++ b/libzaf/pin.h @@ -0,0 +1,119 @@ +#pragma once + +typedef enum { + PinNull = 0, + PA0 = 0x10, + PA1, + PA2, + PA3, + PA4, + PA5, + PA6, + PA7, + PA8, + PA9, + PA10, + PA11, + PA12, + PA13, + PA14, + PA15, + PB0 = 0x20, + PB1, + PB2, + PB3, + PB4, + PB5, + PB6, + PB7, + PB8, + PB9, + PB10, + PB11, + PB12, + PB13, + PB14, + PB15, + PC0 = 0x30, + PC1, + PC2, + PC3, + PC4, + PC5, + PC6, + PC7, + PC8, + PC9, + PC10, + PC11, + PC12, + PC13, + PC14, + PC15, + PD0 = 0x40, + PD1, + PD2, + PD3, + PD4, + PD5, + PD6, + PD7, + PD8, + PD9, + PD10, + PD11, + PD12, + PD13, + PD14, + PD15, + PE0 = 0x50, + PE1, + PE2, + PE3, + PE4, + PE5, + PE6, + PE7, + PE8, + PE9, + PE10, + PE11, + PE12, + PE13, + PE14, + PE15, + PF0 = 0x60, + PF1, + PF2, + PF3, + PF4, + PF5, + PF6, + PF7, + PF8, + PF9, + PF10, + PF11, + PF12, + PF13, + PF14, + PF15, + PG0 = 0x70, + PG1, + PG2, + PG3, + PG4, + PG5, + PG6, + PG7, + PG8, + PG9, + PG10, + PG11, + PG12, + PG13, + PG14, + PG15, +} Pin_t; + +const char* pinname(Pin_t pin); \ No newline at end of file diff --git a/libzaf/zaf.h b/libzaf/zaf.h new file mode 100644 index 0000000..4e8e217 --- /dev/null +++ b/libzaf/zaf.h @@ -0,0 +1,16 @@ +#pragma once + +#ifdef __cplusplus +extern "C" { +#endif + +#include "zaf_basic.h" +#include "zaf_delay.h" +#include "zaf_flash.h" +#include "zaf_gpio.h" +#include "zaf_log.h" +#include "zaf_id.h" +#include "zaf_udp.h" +#ifdef __cplusplus +} +#endif \ No newline at end of file diff --git a/libzaf/zaf_basic.c b/libzaf/zaf_basic.c new file mode 100644 index 0000000..e69de29 diff --git a/libzaf/zaf_basic.h b/libzaf/zaf_basic.h new file mode 100644 index 0000000..184b2e4 --- /dev/null +++ b/libzaf/zaf_basic.h @@ -0,0 +1,9 @@ +#pragma once +#include "main.h" +// +#include "project_configs.h" +// +#include "cmsis_os.h" +// +#include +#include diff --git a/libzaf/zaf_delay.c b/libzaf/zaf_delay.c new file mode 100644 index 0000000..92805d0 --- /dev/null +++ b/libzaf/zaf_delay.c @@ -0,0 +1,60 @@ +#include "zaf_delay.h" + +#include "zaf_basic.h" + +extern TIM_HandleTypeDef PC_SYS_DELAY_US_TIMER; + +static HAL_StatusTypeDef _HAL_TIM_Base_Start(TIM_HandleTypeDef* htim) __attribute__((optimize("O2"))); +static HAL_StatusTypeDef _HAL_TIM_Base_Stop(TIM_HandleTypeDef* htim) __attribute__((optimize("O2"))); +static HAL_StatusTypeDef _HAL_TIM_Base_Start(TIM_HandleTypeDef* htim) { + uint32_t tmpsmcr; + /* Check the TIM state */ + if (htim->State != HAL_TIM_STATE_READY) { + return HAL_ERROR; + } + htim->State = HAL_TIM_STATE_BUSY; + if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) { + tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; + if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) { + __HAL_TIM_ENABLE(htim); + } + } else { + __HAL_TIM_ENABLE(htim); + } + return HAL_OK; +} +static HAL_StatusTypeDef _HAL_TIM_Base_Stop(TIM_HandleTypeDef* htim) { + /* Disable the Peripheral */ + __HAL_TIM_DISABLE(htim); + /* Set the TIM state */ + htim->State = HAL_TIM_STATE_READY; + /* Return function status */ + return HAL_OK; +} + +void zaf_delay_us(int var_nus) { + volatile uint32_t counter = 0; + __HAL_TIM_SET_COUNTER(&PC_SYS_DELAY_US_TIMER, 0); + _HAL_TIM_Base_Start(&PC_SYS_DELAY_US_TIMER); + while (counter < var_nus) { + counter = __HAL_TIM_GET_COUNTER(&PC_SYS_DELAY_US_TIMER); + } + _HAL_TIM_Base_Stop(&PC_SYS_DELAY_US_TIMER); +} +void zaf_delay_ms(int ms) { + for (int i = 0; i < ms; i++) { + zaf_delay_us(1000); + } +} +void zaf_os_delay_ms(int ms) { osDelay(ms); } + +uint32_t zaf_get_ticket(void) { return HAL_GetTick(); } + +uint32_t zaf_has_passedms(uint32_t ticket) { + uint32_t now = HAL_GetTick(); + if (now >= ticket) { + return now - ticket; + } else { + return 0xFFFFFFFF - ticket + now; + } +} diff --git a/libzaf/zaf_delay.h b/libzaf/zaf_delay.h new file mode 100644 index 0000000..6f46350 --- /dev/null +++ b/libzaf/zaf_delay.h @@ -0,0 +1,7 @@ +#pragma once +#include +void zaf_delay_us(int us); +void zaf_delay_ms(int ms); +void zaf_os_delay_ms(int ms); +uint32_t zaf_get_ticket(void); +uint32_t zaf_has_passedms(uint32_t ticket); diff --git a/libzaf/zaf_flash.c b/libzaf/zaf_flash.c new file mode 100644 index 0000000..208e805 --- /dev/null +++ b/libzaf/zaf_flash.c @@ -0,0 +1,110 @@ +#include "zaf_flash.h" + +#include +#include +#include + +#include "zaf_log.h" + +static uint32_t* _rawstartadd; +static uint32_t* _defaultdata; +static uint32_t _rawsize; +static bool _is_first_run = false; + +static bool _xs_check_raw_data() { + uint32_t checksum = 0; + ZLOGI("flash", "_rawstartadd[0] = %x", _rawstartadd[0]); + if (_rawstartadd[0] != FLASH_MASK_VAL) { + return false; + } + for (uint32_t i = 0; i < _rawsize - 1; i++) { + checksum += _rawstartadd[i]; + } + if (checksum != _rawstartadd[_rawsize - 1]) { + return false; + } + return true; +} + +static HAL_StatusTypeDef _flash_erase(void) { + HAL_StatusTypeDef status; + uint32_t sector_error_point; + FLASH_EraseInitTypeDef flash_erase_structer = { + // + .TypeErase = FLASH_TYPEERASE_SECTORS, // + .Sector = FLASH_EARSE_SECTOR, // + .NbSectors = 1, // + .VoltageRange = FLASH_VOLTAGE_RANGE_3 // + }; + + HAL_FLASH_Unlock(); // 解锁 + __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR); // 清除一些错误标志 + status = HAL_FLASHEx_Erase(&flash_erase_structer, §or_error_point); + if (status != HAL_OK) { + ZLOGE("flash", "erase error"); + } + HAL_FLASH_Lock(); // 上锁 + return status; +} +/******************************************************************************* + * EXTERN * + *******************************************************************************/ + +void zaf_flash_init(uint32_t* rawstartadd, uint32_t rawsize) { + _rawstartadd = rawstartadd; + _defaultdata = NULL; + _rawsize = rawsize; + + // 读取flash数据 + memcpy(_rawstartadd, (uint32_t*)(FLASH_START_ADD), _rawsize * 4); + +#if 0 + // 校验数据 + if (_xs_check_raw_data()) { + return; + } + _is_first_run = true; + zaf_flash_factory_reset(); +#endif +} + +bool zaf_flash_check(void) { return _xs_check_raw_data(); } + +bool zaf_flash_set_default_data(uint32_t* defaultdata) { + _defaultdata = defaultdata; + return true; +} + +bool zaf_flash_is_first_run(void) { return _is_first_run; } + +uint32_t zaf_compute_checksum(uint32_t* data, uint32_t size) { + uint32_t checksum = 0; + for (uint32_t i = 0; i < size; i++) { + checksum += data[i]; + } + return checksum; +} +bool zaf_flash_factory_reset(void) { + memcpy(_rawstartadd, _defaultdata, _rawsize * 4); + zaf_flash_flush(); + return true; +} + +bool zaf_flash_flush(void) { +#if PC_NVS_ENABLE + _rawstartadd[0] = FLASH_MASK_VAL; + _rawstartadd[_rawsize - 1] =zaf_compute_checksum(_rawstartadd, _rawsize - 1); + + _flash_erase(); + HAL_FLASH_Unlock(); // 解锁 + HAL_StatusTypeDef status; + for (uint32_t i = 0; i < _rawsize; i++) { + status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, FLASH_START_ADD + i * 4, _rawstartadd[i]); + if (status != HAL_OK) { + ZLOGE("flash", "write error"); + } + } + HAL_FLASH_Lock(); // 上锁 +#endif + return true; +} diff --git a/libzaf/zaf_flash.h b/libzaf/zaf_flash.h new file mode 100644 index 0000000..8375697 --- /dev/null +++ b/libzaf/zaf_flash.h @@ -0,0 +1,68 @@ +#pragma once +#include + +#include "main.h" + +/** + * @brief + * STM32F407VETx 512k + * + * index startAdd size + * 0 0x08000000 16k + * 1 0x08004000 16k + * 2 0x08008000 16k + * 3 0x0800C000 16k + * 4 0x08010000 64k + * 5 0x08020000 128k + * 6 0x08040000 128k + * 7 0x08060000 128k + * + * + * @WARNING: + * 1. 我们使用第7个扇区，即0x08060000~0x0807FFFF + * 2. 程序最大不能超过75% + * 3. rawstartadd第一位必须是0xABCD,最后一位是校验和 + */ + +#define FLASH_MASK_VAL 0xABCD +#define FLASH_START_ADD 0x08060000 // +#define FLASH_EARSE_SECTOR FLASH_SECTOR_7 + +/** + * @brief 初始化flash + * + * @param rawstartadd flash内存映射的地址 + * @param defaultdata 默认数据 + * @param rawsize flash内存映射的地址大小 + */ +void zaf_flash_init(uint32_t* rawstartadd, uint32_t rawsize); +/** + * @brief 判断是否是第一次初始化flash + * + * @return true + * @return false + */ +bool zaf_flash_is_first_run(void); +/** + * @brief 刷新内存输出到flash中 + * + * @return true + * @return false + */ +bool zaf_flash_flush(void); +/** + * @brief 恢复出厂设置 + * + * @return true + * @return false + */ +bool zaf_flash_factory_reset(void); +/** + * @brief + * + * @param defaultdata + * @return true + * @return false + */ +bool zaf_flash_set_default_data(uint32_t* defaultdata); +bool zaf_flash_check(void); diff --git a/libzaf/zaf_gpio.c b/libzaf/zaf_gpio.c new file mode 100644 index 0000000..89e5b8c --- /dev/null +++ b/libzaf/zaf_gpio.c @@ -0,0 +1,327 @@ +#include "zaf_gpio.h" + +static bool gpio_enable_clock(GPIO_TypeDef *m_gpio) { +#ifdef GPIOA + if (m_gpio == GPIOA) { + __HAL_RCC_GPIOA_CLK_ENABLE(); + return true; + } +#endif +#ifdef GPIOB + if (m_gpio == GPIOB) { + __HAL_RCC_GPIOB_CLK_ENABLE(); + return true; + } +#endif +#ifdef GPIOC + if (m_gpio == GPIOC) { + __HAL_RCC_GPIOC_CLK_ENABLE(); + return true; + } +#endif +#ifdef GPIOD + if (m_gpio == GPIOD) { + __HAL_RCC_GPIOD_CLK_ENABLE(); + return true; + } +#endif +#ifdef GPIOE + if (m_gpio == GPIOE) { + __HAL_RCC_GPIOE_CLK_ENABLE(); + return true; + } +#endif +#ifdef GPIOF + if (m_gpio == GPIOF) { + __HAL_RCC_GPIOF_CLK_ENABLE(); + return true; + } +#endif +#ifdef GPIOG + if (m_gpio == GPIOG) { + __HAL_RCC_GPIOG_CLK_ENABLE(); + return true; + } +#endif +#ifdef GPIOH + if (m_gpio == GPIOH) { + __HAL_RCC_GPIOH_CLK_ENABLE(); + return true; + } +#endif +#ifdef GPIOI + if (m_gpio == GPIOI) { + __HAL_RCC_GPIOI_CLK_ENABLE(); + return true; + } +#endif +#ifdef GPIOJ + if (m_gpio == GPIOJ) { + __HAL_RCC_GPIOJ_CLK_ENABLE(); + return true; + } +#endif +#ifdef GPIOK + if (m_gpio == GPIOK) { + __HAL_RCC_GPIOK_CLK_ENABLE(); + return true; + } +#endif + return false; +} + +static GPIO_TypeDef *_chip_get_gpio(Pin_t pin) { + int port = pin >> 4; + + switch (port) { + case 1: +#ifdef GPIOA + return GPIOA; +#endif + break; + case 2: +#ifdef GPIOB + return GPIOB; +#endif + break; + case 3: +#ifdef GPIOC + return GPIOC; +#endif + break; + case 4: +#ifdef GPIOD + return GPIOD; +#endif + break; + + case 5: +#ifdef GPIOE + return GPIOE; +#endif + break; + case 6: +#ifdef GPIOF + return GPIOF; +#endif + break; + case 7: +#ifdef GPIOG + return GPIOG; +#endif + break; + default: + break; + } + return NULL; +} +static uint16_t _chip_get_pinoff(Pin_t pin) { + uint16_t pinoff = pin & 0x0F; + switch (pinoff) { + case 0: + return GPIO_PIN_0; + case 1: + return GPIO_PIN_1; + case 2: + return GPIO_PIN_2; + case 3: + return GPIO_PIN_3; + case 4: + return GPIO_PIN_4; + case 5: + return GPIO_PIN_5; + case 6: + return GPIO_PIN_6; + case 7: + return GPIO_PIN_7; + case 8: + return GPIO_PIN_8; + case 9: + return GPIO_PIN_9; + case 10: + return GPIO_PIN_10; + case 11: + return GPIO_PIN_11; + case 12: + return GPIO_PIN_12; + case 13: + return GPIO_PIN_13; + case 14: + return GPIO_PIN_14; + case 15: + return GPIO_PIN_15; + default: + break; + }; + return 0; +} + +IRQn_Type getEXTIIRQn(int32_t m_pinoff) { + switch (m_pinoff) { + case GPIO_PIN_0: + return EXTI0_IRQn; + case GPIO_PIN_1: + return EXTI1_IRQn; + case GPIO_PIN_2: + return EXTI2_IRQn; + case GPIO_PIN_3: + return EXTI3_IRQn; + case GPIO_PIN_4: + return EXTI4_IRQn; + case GPIO_PIN_5: + case GPIO_PIN_6: + case GPIO_PIN_7: + case GPIO_PIN_8: + case GPIO_PIN_9: + return EXTI9_5_IRQn; + case GPIO_PIN_10: + case GPIO_PIN_11: + case GPIO_PIN_12: + case GPIO_PIN_13: + case GPIO_PIN_14: + case GPIO_PIN_15: + return EXTI15_10_IRQn; + default: + ZASSERT(0); + } + return EXTI0_IRQn; +} + +void zaf_gpio_init_as_input(zaf_gpio_t *gpio, Pin_t pin,zaf_gpio_mode_t mode,zaf_gpio_irq_t irqtype, bool mirror) { + if (pin == PinNull) return; + + gpio->mirror = mirror; + gpio->mode = mode; + gpio->irqtype = irqtype; + gpio->gpiotype = kxs_gpio_input; + + gpio->pin = pin; + gpio->gpio = _chip_get_gpio(pin); + gpio->pinoff = _chip_get_pinoff(pin); + + // kxs_gpio_nopull, // + // kxs_gpio_pullup, // + // kxs_gpio_pulldown, // + // kxs_gpio_od, + + uint32_t pulluptype = 0; + if (mode == kxs_gpio_nopull) { + pulluptype = GPIO_NOPULL; + } else if (mode == kxs_gpio_pullup) { + pulluptype = GPIO_PULLUP; + } else if (mode == kxs_gpio_pulldown) { + pulluptype = GPIO_PULLDOWN; + } + + gpio_enable_clock(gpio->gpio); + // kxs_gpio_no_irq, + // kxs_gpio_rising_irq, + // kxs_gpio_falling_irq, + // kxs_gpio_rising_and_falling_irq, + + GPIO_InitTypeDef init_type_def = {0}; + if (gpio->irqtype == kxs_gpio_no_irq) { + init_type_def.Pin = gpio->pinoff; + init_type_def.Mode = GPIO_MODE_INPUT; + init_type_def.Pull = pulluptype; + init_type_def.Speed = GPIO_SPEED_FREQ_LOW; + } else if (gpio->irqtype == kxs_gpio_rising_irq) { + init_type_def.Pin = gpio->pinoff; + init_type_def.Mode = gpio->mirror ? GPIO_MODE_IT_FALLING : GPIO_MODE_IT_RISING; + init_type_def.Pull = pulluptype; + init_type_def.Speed = GPIO_SPEED_FREQ_LOW; + } else if (gpio->irqtype == kxs_gpio_falling_irq) { + init_type_def.Pin = gpio->pinoff; + init_type_def.Mode = !gpio->mirror ? GPIO_MODE_IT_FALLING : GPIO_MODE_IT_RISING; + init_type_def.Pull = pulluptype; + init_type_def.Speed = GPIO_SPEED_FREQ_LOW; + } else if (gpio->irqtype == kxs_gpio_rising_and_falling_irq) { + init_type_def.Pin = gpio->pinoff; + init_type_def.Mode = GPIO_MODE_IT_RISING_FALLING; + init_type_def.Pull = pulluptype; + init_type_def.Speed = GPIO_SPEED_FREQ_LOW; + } + + HAL_GPIO_Init(gpio->gpio, &init_type_def); + if (gpio->irqtype != kxs_gpio_no_irq) { + HAL_NVIC_SetPriority(getEXTIIRQn(gpio->pinoff), PC_IRQ_PREEMPTPRIORITY_DEFAULT, 0); + HAL_NVIC_EnableIRQ(getEXTIIRQn(gpio->pinoff)); + } + + gpio->inited = true; + return; +} +void zaf_gpio_init_as_output(zaf_gpio_t *gpio, Pin_t pin,zaf_gpio_mode_t mode, bool mirror, bool initLevel) { + if (pin == PinNull) return; + + gpio->mirror = mirror; + gpio->mode = mode; + gpio->irqtype = kxs_gpio_no_irq; + gpio->gpiotype = kxs_gpio_output; + gpio->pin = pin; + gpio->gpio = _chip_get_gpio(pin); + gpio->pinoff = _chip_get_pinoff(pin); + + gpio_enable_clock(gpio->gpio); + + GPIO_InitTypeDef init_type_def = {0}; + initLevel = gpio->mirror ? !initLevel : initLevel; + GPIO_PinState pinState = initLevel ? GPIO_PIN_SET : GPIO_PIN_RESET; + + HAL_GPIO_WritePin(gpio->gpio, gpio->pinoff, pinState); + + if (gpio->mode == kxs_gpio_nopull) { + init_type_def.Pin = gpio->pinoff; + init_type_def.Mode = GPIO_MODE_OUTPUT_PP; + init_type_def.Pull = GPIO_NOPULL; + init_type_def.Speed = GPIO_SPEED_FREQ_LOW; + } else if (gpio->mode == kxs_gpio_pullup) { + init_type_def.Pin = gpio->pinoff; + init_type_def.Mode = GPIO_MODE_OUTPUT_PP; + init_type_def.Pull = GPIO_PULLUP; + init_type_def.Speed = GPIO_SPEED_FREQ_LOW; + } else if (gpio->mode == kxs_gpio_pulldown) { + init_type_def.Pin = gpio->pinoff; + init_type_def.Mode = GPIO_MODE_OUTPUT_PP; + init_type_def.Pull = GPIO_PULLDOWN; + init_type_def.Speed = GPIO_SPEED_FREQ_LOW; + } else if (gpio->mode == kxs_gpio_od) { + init_type_def.Pin = gpio->pinoff; + init_type_def.Mode = GPIO_MODE_OUTPUT_OD; + init_type_def.Pull = 0; + init_type_def.Speed = GPIO_SPEED_FREQ_LOW; + } + HAL_GPIO_Init(gpio->gpio, &init_type_def); + gpio->inited = true; + return; +} +bool zaf_gpio_read(zaf_gpio_t *gpio) { + GPIO_PinState pinState = HAL_GPIO_ReadPin(gpio->gpio, gpio->pinoff); + return !gpio->mirror ? pinState == GPIO_PIN_SET : pinState != GPIO_PIN_SET; +} +void zaf_gpio_write(zaf_gpio_t *gpio, bool level) { + level = gpio->mirror ? !level : level; + GPIO_PinState pinState = level ? GPIO_PIN_SET : GPIO_PIN_RESET; + HAL_GPIO_WritePin(gpio->gpio, gpio->pinoff, pinState); +} + +void EXTI0_IRQHandler() { HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0); } +void EXTI1_IRQHandler() { HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_1); } +void EXTI2_IRQHandler() { HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2); } +void EXTI3_IRQHandler() { HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_3); } +void EXTI4_IRQHandler() { HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_4); } +void EXTI9_5_IRQHandler(void) { + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_5); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_6); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_7); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_8); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_9); +} +void EXTI15_10_IRQHandler(void) { + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_10); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_11); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_12); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_13); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_14); + HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_15); +} \ No newline at end of file diff --git a/libzaf/zaf_gpio.h b/libzaf/zaf_gpio.h new file mode 100644 index 0000000..75d0a64 --- /dev/null +++ b/libzaf/zaf_gpio.h @@ -0,0 +1,36 @@ +#pragma once +#include "pin.h" +#include "zaf_basic.h" +#include "zaf_log.h" + +typedef enum { + kxs_gpio_nopull, // + kxs_gpio_pullup, // + kxs_gpio_pulldown, // + kxs_gpio_od, // +}zaf_gpio_mode_t; + +typedef enum { kxs_gpio_ain, kxs_gpio_input, kxs_gpio_output }zaf_gpio_type_t; + +typedef enum { + kxs_gpio_no_irq, + kxs_gpio_rising_irq, + kxs_gpio_falling_irq, + kxs_gpio_rising_and_falling_irq, +}zaf_gpio_irq_t; + +typedef struct { + Pin_t pin; + GPIO_TypeDef *gpio; + uint16_t pinoff; + zaf_gpio_mode_t mode; + zaf_gpio_type_t gpiotype; + zaf_gpio_irq_t irqtype; + bool mirror; + bool inited; +}zaf_gpio_t; + +void zaf_gpio_init_as_input(zaf_gpio_t *gpio, Pin_t pin,zaf_gpio_mode_t mode,zaf_gpio_irq_t irqtype, bool mirror); +void zaf_gpio_init_as_output(zaf_gpio_t *gpio, Pin_t pin,zaf_gpio_mode_t mode, bool mirror, bool initLevel); +bool zaf_gpio_read(zaf_gpio_t *gpio); +void zaf_gpio_write(zaf_gpio_t *gpio, bool level); \ No newline at end of file diff --git a/libzaf/zaf_id.c b/libzaf/zaf_id.c new file mode 100644 index 0000000..d408276 --- /dev/null +++ b/libzaf/zaf_id.c @@ -0,0 +1,31 @@ +#include "zaf_id.h" + +#include "main.h" +#include "rng.h" + +extern RNG_HandleTypeDef hrng; + +void zaf_id_generate_random_mac(mac_t* id) { + id->mac[0] = 0x00; // 00 80 E1 是STM32的MAC地址前三位 + id->mac[1] = 0x80; + id->mac[2] = 0xE1; + + uint32_t random0 = 0; + uint32_t random1 = 0; + uint32_t random2 = 0; + HAL_RNG_GenerateRandomNumber(&hrng, &random0); + HAL_RNG_GenerateRandomNumber(&hrng, &random1); + HAL_RNG_GenerateRandomNumber(&hrng, &random2); + + id->mac[3] = random0 % 256; + id->mac[4] = random1 % 256; + id->mac[5] = random2 % 256; +} +void zaf_id_get_cpu_id(cpu_id_t* id) { + // UID_BASE + uint8_t* uid_base = (uint8_t*)UID_BASE; + for (int32_t i = 0; i < 12; i++) { + id->id[i] = uid_base[i]; + } + return; +} \ No newline at end of file diff --git a/libzaf/zaf_id.h b/libzaf/zaf_id.h new file mode 100644 index 0000000..9838c6d --- /dev/null +++ b/libzaf/zaf_id.h @@ -0,0 +1,12 @@ +#pragma once +#include +typedef struct { + uint8_t mac[6]; +} mac_t; + +typedef struct { + uint8_t id[12]; // 96bit +} cpu_id_t; + +void zaf_id_generate_random_mac(mac_t* id); +void zaf_id_get_cpu_id(cpu_id_t* id); diff --git a/libzaf/zaf_log.c b/libzaf/zaf_log.c new file mode 100644 index 0000000..3ba253c --- /dev/null +++ b/libzaf/zaf_log.c @@ -0,0 +1,39 @@ +#include "zaf_log.h" + +#include +#include +#include +#include +#include +bool g_xs_enable_log = true; +extern UART_HandleTypeDef PC_DEBUG_UART; +/********************************************************************* + * @fn _write + * + * @brief Support Printf Function + * + * @param *buf - UART send Data. + * size - Data length + * + * @return size: Data length + */ +__attribute__((used)) int _write(int fd, char* buf, int size) { + int i; + + for (i = 0; i < size; i++) { + uint8_t c = *buf++; + HAL_UART_Transmit(&PC_DEBUG_UART, &c, 1, 100); + } + + return size; +} + +void zaf_log_enable(bool enable) { g_xs_enable_log = enable; } +void zaf_log(const char* fmt, ...) { + if (g_xs_enable_log) { + va_list args; + va_start(args, fmt); + vprintf(fmt, args); + va_end(args); + } +} diff --git a/libzaf/zaf_log.h b/libzaf/zaf_log.h new file mode 100644 index 0000000..5667f8b --- /dev/null +++ b/libzaf/zaf_log.h @@ -0,0 +1,39 @@ +#pragma once +#include "zaf_basic.h" +#include "zaf_delay.h" + +extern bool g_xs_enable_log; +#define ZLOG_RELEASE(TAG, fmt, ...) \ + if (g_xs_enable_log) { \ + zaf_log(TAG "" fmt "\n", ##__VA_ARGS__); \ + } +#define ZLOGI(TAG, fmt, ...) \ + if (g_xs_enable_log) { \ + zaf_log("%08lu INFO [%-8s] " fmt "\n", zaf_get_ticket(), TAG, ##__VA_ARGS__); \ + } +#define ZLOGD(TAG, fmt, ...) \ + if (g_xs_enable_log) { \ + zaf_log("%08lu DEBU [%-8s] " fmt "\n", zaf_get_ticket(), TAG, ##__VA_ARGS__); \ + } +#define ZLOGE(TAG, fmt, ...) \ + if (g_xs_enable_log) { \ + zaf_log("%08lu ERRO [%-8s] " fmt "\n", zaf_get_ticket(), TAG, ##__VA_ARGS__); \ + } + +#define ZLOGW(TAG, fmt, ...) \ + if (g_xs_enable_log) { \ + zaf_log("%08lu WARN [%-8s] " fmt "\n", zaf_get_ticket(), TAG, ##__VA_ARGS__); \ + } + +#define ASSERT(cond) \ + if (!(cond)) { \ + while (1) { \ + zaf_log("ASSERT: %s [%s:%d]\n", #cond, __FILE__, __LINE__); \ + zaf_delay_ms(1000); \ + } \ + } + +#define ZASSERT(cond) ASSERT(cond) + +void zaf_log(const char* fmt, ...); +void zaf_log_enable(bool enable); \ No newline at end of file diff --git a/libzaf/zaf_udp.c b/libzaf/zaf_udp.c new file mode 100644 index 0000000..8d2e1a8 --- /dev/null +++ b/libzaf/zaf_udp.c @@ -0,0 +1,104 @@ +#include "zaf_udp.h" + +#include "zaf_log.h" +#define TAG "zaf_udp" + +#define UDP_DEFAULT_SEND_PORT 5000 + +#define SOCKET_DO(function) \ + do { \ + int ret = function; \ + if (ret) { \ + ZLOGE(TAG, "do %s fail", #function); \ + return false; \ + } \ + } while (0) + +static void udp_server_receive_thread(void const *argument) { // + udp_t *udp_handler = (udp_t *)argument; + ZLOGI(TAG, "udp server receive thread start: %s", udp_handler->name); + while (true) { + struct sockaddr_in sock; + socklen_t sock_len = sizeof(sock); + int recv_datalen = recvfrom(udp_handler->sock_fd, (char *)udp_handler->rxbuf, udp_handler->rxbuf_len, 0, (struct sockaddr *)&sock, &sock_len); + if (recv_datalen > 0) { + if (udp_handler->on_packet) udp_handler->on_packet(udp_handler, &sock, (uint8_t *)udp_handler->rxbuf, recv_datalen); + } + } +} + +bool zaf_udp_init(udp_t *udp_handler, const char *name, uint16_t port, udp_on_packet_t on_packet, int32_t rxbuf_size, void *data) { + memset(udp_handler, 0, sizeof(udp_t)); + udp_handler->server.sin_family = AF_INET; + udp_handler->server.sin_addr.s_addr = inet_addr("0.0.0.0"); + udp_handler->server.sin_port = htons(port); + udp_handler->on_packet = on_packet; + udp_handler->data = data; + udp_handler->name = name; + if (rxbuf_size == 0) { + udp_handler->rxbuf_len = 1024; + } else { + udp_handler->rxbuf_len = rxbuf_size; + } + udp_handler->rxbuf = (char *)malloc(udp_handler->rxbuf_len); + ZASSERT(udp_handler->rxbuf != NULL); + + // 创建客户端用于通信的Socket + udp_handler->sock_fd = socket(AF_INET, SOCK_DGRAM, IPPROTO_UDP); + if (udp_handler->sock_fd < 0) { + ZLOGE(TAG, "create socket fail"); + return false; + } + + // 绑定 + SOCKET_DO(bind(udp_handler->sock_fd, (struct sockaddr *)&udp_handler->server, sizeof(udp_handler->server))); + // 设置超时 + struct timeval tv = {1, 0}; + SOCKET_DO(lwip_setsockopt(udp_handler->sock_fd, SOL_SOCKET, SO_RCVTIMEO, (char *)&tv, sizeof(tv))); + + if (on_packet) { + // 创建接收线程 + osThreadDef(udp_server_rx_thread, udp_server_receive_thread, osPriorityNormal, 0, 512); + udp_handler->rx_thread = osThreadCreate(osThread(udp_server_rx_thread), udp_handler); + ZASSERT(udp_handler->rx_thread != NULL); + } + return true; +} + +int zaf_udp_send_message(udp_t *udp_handler, const char *ip, int port, const char *data, int len) { // + struct sockaddr_in sockaddr; + sockaddr.sin_family = AF_INET; + sockaddr.sin_addr.s_addr = inet_addr(ip); + sockaddr.sin_port = htons(port); + return sendto(udp_handler->sock_fd, data, len, 0, (struct sockaddr *)&sockaddr, sizeof(sockaddr)); +} +int zaf_udp_send_message2(udp_t *udp_handler, struct sockaddr_in *add, const char *data, int len) { // + return sendto(udp_handler->sock_fd, data, len, 0, (struct sockaddr *)add, sizeof(struct sockaddr_in)); +} + +bool zaf_udp_broadcast_init(udp_broadcast_handler_t *udp_handler, uint16_t localport) { + memset(udp_handler, 0, sizeof(udp_broadcast_handler_t)); + udp_handler->server.sin_family = AF_INET; + udp_handler->server.sin_addr.s_addr = inet_addr("0.0.0.0"); + udp_handler->server.sin_port = htons(localport); + + // 创建客户端用于通信的Socket + udp_handler->sock_fd = socket(AF_INET, SOCK_DGRAM, IPPROTO_UDP); + if (udp_handler->sock_fd < 0) { + ZLOGE(TAG, "create socket fail"); + return false; + } + // 设置超时 + struct timeval tv = {1, 0}; + SOCKET_DO(lwip_setsockopt(udp_handler->sock_fd, SOL_SOCKET, SO_RCVTIMEO, (char *)&tv, sizeof(tv))); + // 绑定 + SOCKET_DO(bind(udp_handler->sock_fd, (struct sockaddr *)&udp_handler->server, sizeof(udp_handler->server))); + return true; +} +bool zaf_udp_broadcast(udp_broadcast_handler_t *handler, uint32_t remoteport, uint8_t *data, size_t datalen) { + struct sockaddr_in sockaddr; + sockaddr.sin_family = AF_INET; + sockaddr.sin_addr.s_addr = htonl(INADDR_BROADCAST); + sockaddr.sin_port = htons(remoteport); + return sendto(handler->sock_fd, data, datalen, 0, (struct sockaddr *)&sockaddr, sizeof(sockaddr)); +} diff --git a/libzaf/zaf_udp.h b/libzaf/zaf_udp.h new file mode 100644 index 0000000..dbbef99 --- /dev/null +++ b/libzaf/zaf_udp.h @@ -0,0 +1,40 @@ +#pragma once +#ifdef __cplusplus +extern "C" { +#endif +#include +#include + +#include "lwip/api.h" +#include "lwip/opt.h" +#include "lwip/sys.h" +#include "project_configs.h" + +typedef struct udp_s udp_t; +typedef void (*udp_on_packet_t)(udp_t *udp_handler, struct sockaddr_in *client, uint8_t *data, uint16_t len); +struct udp_s { + struct sockaddr_in server; + int sock_fd; + osThreadId rx_thread; + char *rxbuf; + int rxbuf_len; + udp_on_packet_t on_packet; + void *data; + const char *name; +}; + +typedef struct { + struct sockaddr_in server; + int sock_fd; +} udp_broadcast_handler_t; + +bool zaf_udp_init(udp_t *udp_handler, const char *name, uint16_t port, udp_on_packet_t on_packet, int32_t rxbuf_size, void *data); +int zaf_udp_send_message(udp_t *udp_handler, const char *remoteip, int remoteport, const char *data, int len); +int zaf_udp_send_message2(udp_t *udp_handler, struct sockaddr_in *add, const char *data, int len); + +bool zaf_udp_broadcast_init(udp_broadcast_handler_t *handler, uint16_t localport); +bool zaf_udp_broadcast(udp_broadcast_handler_t *handler, uint32_t remoteport, uint8_t *data, size_t datalen); + +#ifdef __cplusplus +} +#endif diff --git a/usrc/base_service/config_service.c b/usrc/base_service/config_service.c index be57c24..12a5bb7 100644 --- a/usrc/base_service/config_service.c +++ b/usrc/base_service/config_service.c @@ -27,10 +27,10 @@ static void create_default_config(config_t *now_cfg, bool cfg_is_error, config_t static mac_t mac; if (now_cfg->mac[0] == 0 && now_cfg->mac[1] == 0 && now_cfg->mac[2] == 0 && now_cfg->mac[3] == 0 && now_cfg->mac[4] == 0 && now_cfg->mac[5] == 0) { - xs_id_generate_random_mac(&mac); + zaf_id_generate_random_mac(&mac); ZLOGI(TAG, "gen random mac is %02x:%02x:%02x:%02x:%02x:%02x", mac.mac[0], mac.mac[1], mac.mac[2], mac.mac[3], mac.mac[4], mac.mac[5]); } else if (now_cfg->mac[0] == 0xff && now_cfg->mac[1] == 0xff && now_cfg->mac[2] == 0xff && now_cfg->mac[3] == 0xff && now_cfg->mac[4] == 0xff && now_cfg->mac[5] == 0xff) { - xs_id_generate_random_mac(&mac); + zaf_id_generate_random_mac(&mac); ZLOGI(TAG, "gen random mac is %02x:%02x:%02x:%02x:%02x:%02x", mac.mac[0], mac.mac[1], mac.mac[2], mac.mac[3], mac.mac[4], mac.mac[5]); } else { memcpy(&mac.mac, now_cfg->mac, 6); @@ -44,15 +44,15 @@ void config_init(void) { /** * @brief flash初始化 */ - xs_flash_init((uint32_t *)&_config, sizeof(config_t) / 4); - bool cfg_is_error = !xs_flash_check(); + zaf_flash_init((uint32_t *)&_config, sizeof(config_t) / 4); + bool cfg_is_error = !zaf_flash_check(); create_default_config(&_config, cfg_is_error, &_default_val_config); - xs_flash_set_default_data((uint32_t *)&_default_val_config); + zaf_flash_set_default_data((uint32_t *)&_default_val_config); if (cfg_is_error) { - xs_flash_factory_reset(); + zaf_flash_factory_reset(); } /** * @brief 打印配置信息 @@ -60,12 +60,12 @@ void config_init(void) { dump_config(&_config); } config_t *config_get(void) { return &_config; } -void config_flush(void) { xs_flash_flush(); } -void config_factory_reset(void) { xs_flash_factory_reset(); } +void config_flush(void) {zaf_flash_flush(); } +void config_factory_reset(void) {zaf_flash_factory_reset(); } void config_generate_random_mac(void) { static mac_t mac; - xs_id_generate_random_mac(&mac); + zaf_id_generate_random_mac(&mac); ZLOGI(TAG, "gen random mac is %02x:%02x:%02x:%02x:%02x:%02x", mac.mac[0], mac.mac[1], mac.mac[2], mac.mac[3], mac.mac[4], mac.mac[5]); memset(&_config.mac[0], 0, sizeof(_config.mac)); memcpy(&_config.mac[0], mac.mac, 6); diff --git a/usrc/base_service/config_service.h b/usrc/base_service/config_service.h index f327140..fc67b2e 100644 --- a/usrc/base_service/config_service.h +++ b/usrc/base_service/config_service.h @@ -1,7 +1,7 @@ #pragma once #include -#include "iflytop_xsync\iflytop_xsync.h" +#include "project_dep.h" #ifdef __cplusplus extern "C" { diff --git a/usrc/base_service/fpga_if.c b/usrc/base_service/fpga_if.c index 14b75fd..1d728e9 100644 --- a/usrc/base_service/fpga_if.c +++ b/usrc/base_service/fpga_if.c @@ -6,7 +6,7 @@ */ #define TAG "fpga_if" static fpga_if_t fpga_if; -xs_gpio_t spi2_cs; +zaf_gpio_t spi2_cs; SemaphoreHandle_t m_spilock; void fpga_if_init() { // @@ -20,7 +20,7 @@ void fpga_if_init() { // */ fpga_if.spi2 = &hspi2; - xs_gpio_init_as_output(&spi2_cs, PB9, kxs_gpio_nopull, false, true); + zaf_gpio_init_as_output(&spi2_cs, PB9, kxs_gpio_nopull, false, true); HAL_SPI_Receive(fpga_if.spi2, rxbuf, 1, 1000); // fpga_if.spi2 = &hspi1; @@ -32,14 +32,14 @@ void fpga_if_init() { // fpga_if.reset_pin = PD7; #if 1 - xs_gpio_init_as_input(&fpga_if.camera_sync_code_irq_io, fpga_if.camera_sync_code_irq_pin, kxs_gpio_pulldown, kxs_gpio_rising_irq, false); - xs_gpio_init_as_input(&fpga_if.timecode_irq_io, fpga_if.timecode_irq_pin, kxs_gpio_pulldown, kxs_gpio_rising_irq, false); - xs_gpio_init_as_input(&fpga_if.xsync_workstate_start_sig_irq_io, fpga_if.xsync_workstate_start_sig_irq_io_pin, kxs_gpio_pulldown, kxs_gpio_rising_and_falling_irq, false); - xs_gpio_init_as_output(&fpga_if.reset_pin_io, fpga_if.reset_pin, kxs_gpio_pullup, false, false); + zaf_gpio_init_as_input(&fpga_if.camera_sync_code_irq_io, fpga_if.camera_sync_code_irq_pin, kxs_gpio_pulldown, kxs_gpio_rising_irq, false); + zaf_gpio_init_as_input(&fpga_if.timecode_irq_io, fpga_if.timecode_irq_pin, kxs_gpio_pulldown, kxs_gpio_rising_irq, false); + zaf_gpio_init_as_input(&fpga_if.xsync_workstate_start_sig_irq_io, fpga_if.xsync_workstate_start_sig_irq_io_pin, kxs_gpio_pulldown, kxs_gpio_rising_and_falling_irq, false); + zaf_gpio_init_as_output(&fpga_if.reset_pin_io, fpga_if.reset_pin, kxs_gpio_pullup, false, false); - xs_gpio_write(&fpga_if.reset_pin_io, false); - xs_delay_us(1); - xs_gpio_write(&fpga_if.reset_pin_io, true); + zaf_gpio_write(&fpga_if.reset_pin_io, false); + zaf_delay_us(1); + zaf_gpio_write(&fpga_if.reset_pin_io, true); #endif } void fpga_if_get_timecode(uint32_t *timecode0, uint32_t *timecode1) { @@ -105,20 +105,20 @@ void fpga_if_spi_write_data_01(uint32_t add, uint32_t txdata, uint32_t *rxdata) void fpga_if_spi_read_data_01(uint32_t add, uint32_t *rxdata) { _fpga_if_spi_read_data(fpga_if.spi1, add, rxdata); } void fpga_if_spi_write_data_02(uint32_t add, uint32_t txdata, uint32_t *rxdata) { xSemaphoreTakeRecursive(m_spilock, portMAX_DELAY); - xs_gpio_write(&spi2_cs, false); + zaf_gpio_write(&spi2_cs, false); _fpga_if_spi_write_data(fpga_if.spi2, add, txdata, rxdata); - xs_gpio_write(&spi2_cs, true); - xs_delay_us(1); - xs_gpio_write(&spi2_cs, false); + zaf_gpio_write(&spi2_cs, true); + zaf_delay_us(1); + zaf_gpio_write(&spi2_cs, false); _fpga_if_spi_read_data(fpga_if.spi2, add, rxdata); - xs_gpio_write(&spi2_cs, true); + zaf_gpio_write(&spi2_cs, true); xSemaphoreGiveRecursive(m_spilock); } void fpga_if_spi_read_data_02(uint32_t add, uint32_t *rxdata) { xSemaphoreTakeRecursive(m_spilock, portMAX_DELAY); - xs_gpio_write(&spi2_cs, false); + zaf_gpio_write(&spi2_cs, false); _fpga_if_spi_read_data(fpga_if.spi2, add, rxdata); - xs_gpio_write(&spi2_cs, true); + zaf_gpio_write(&spi2_cs, true); xSemaphoreGiveRecursive(m_spilock); } diff --git a/usrc/base_service/fpga_if.h b/usrc/base_service/fpga_if.h index e40bf4d..cbfc125 100644 --- a/usrc/base_service/fpga_if.h +++ b/usrc/base_service/fpga_if.h @@ -17,8 +17,8 @@ typedef struct { * @brief timecode并口 */ - xs_gpio_t timecode_add[4]; - xs_gpio_t timecode_data[8]; + zaf_gpio_t timecode_add[4]; + zaf_gpio_t timecode_data[8]; Pin_t timecode_add_pin[4]; Pin_t timecode_data_pin[8]; @@ -28,10 +28,10 @@ typedef struct { Pin_t xsync_workstate_start_sig_irq_io_pin; Pin_t reset_pin; - xs_gpio_t timecode_irq_io; - xs_gpio_t camera_sync_code_irq_io; - xs_gpio_t xsync_workstate_start_sig_irq_io; - xs_gpio_t reset_pin_io; + zaf_gpio_t timecode_irq_io; + zaf_gpio_t camera_sync_code_irq_io; + zaf_gpio_t xsync_workstate_start_sig_irq_io; + zaf_gpio_t reset_pin_io; } fpga_if_t; /** diff --git a/usrc/main.cpp b/usrc/main.cpp index c76e32f..e8766e6 100644 --- a/usrc/main.cpp +++ b/usrc/main.cpp @@ -35,9 +35,9 @@ void StartDefaultTask(void const* argument) { umain(); } * */ -xs_gpio_t m_debug_led; -xs_gpio_t m_factory_reset_key; -xs_gpio_t m_power_led; +zaf_gpio_t m_debug_led; +zaf_gpio_t m_factory_reset_key; +zaf_gpio_t m_power_led; extern "C" { void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) { ReportGeneratorService_irq_trigger(GPIO_Pin); } } @@ -45,10 +45,10 @@ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) { ReportGeneratorService_irq_trig void debug_light_ctrl() { static uint32_t lastcall = 0; static bool light_status = false; - if (xs_has_passedms(lastcall) > 100) { + if (zaf_has_passedms(lastcall) > 100) { light_status = !light_status; - xs_gpio_write(&m_debug_led, light_status); - lastcall = xs_get_ticket(); + zaf_gpio_write(&m_debug_led, light_status); + lastcall =zaf_get_ticket(); } } @@ -56,25 +56,25 @@ void factory_reset_key_detect() { static uint32_t reset_key_trigger_tp = 0; static bool reset_key_triggered = false; if (!reset_key_triggered) { - if (xs_gpio_read(&m_factory_reset_key)) { - reset_key_trigger_tp = xs_get_ticket(); + if (zaf_gpio_read(&m_factory_reset_key)) { + reset_key_trigger_tp =zaf_get_ticket(); reset_key_triggered = true; } } if (reset_key_triggered) { - if (!xs_gpio_read(&m_factory_reset_key)) { + if (!zaf_gpio_read(&m_factory_reset_key)) { reset_key_triggered = false; } else { - if (xs_has_passedms(reset_key_trigger_tp) > 3000) { + if (zaf_has_passedms(reset_key_trigger_tp) > 3000) { ZLOGI(TAG, "factory reset key triggered"); config_factory_reset(); // m_power_led - while (xs_gpio_read(&m_factory_reset_key)) { - xs_gpio_write(&m_power_led, false); + while (zaf_gpio_read(&m_factory_reset_key)) { + zaf_gpio_write(&m_power_led, false); osDelay(100); - xs_gpio_write(&m_power_led, true); + zaf_gpio_write(&m_power_led, true); osDelay(100); } ZLOGI(TAG, "system reset"); @@ -92,8 +92,8 @@ void umain() { sn_t sn; device_info_init(); device_info_get_sn(&sn); - XS_LOGI(TAG, "%s:%d", PC_PROJECT_NAME, PC_VERSION); - XS_LOGI(TAG, "sn: %x:%x:%x", sn.sn0, sn.sn1, sn.sn2); + ZLOGI(TAG, "%s:%d", PC_PROJECT_NAME, PC_VERSION); + ZLOGI(TAG, "sn: %x:%x:%x", sn.sn0, sn.sn1, sn.sn2); /** * @brief @@ -101,9 +101,9 @@ void umain() { * 2. 初始化电源指示灯 * 3. 初始化工厂复位按键 */ - xs_gpio_init_as_output(&m_debug_led, PC_DEBUG_LIGHT_GPIO, kxs_gpio_nopull, false, false); - xs_gpio_init_as_output(&m_power_led, POWER_LED_PIN, kxs_gpio_nopull, false, true); - xs_gpio_init_as_input(&m_factory_reset_key, FACTORY_RESET_KEY, kxs_gpio_nopull, kxs_gpio_no_irq, true); + zaf_gpio_init_as_output(&m_debug_led, PC_DEBUG_LIGHT_GPIO, kxs_gpio_nopull, false, false); + zaf_gpio_init_as_output(&m_power_led, POWER_LED_PIN, kxs_gpio_nopull, false, true); + zaf_gpio_init_as_input(&m_factory_reset_key, FACTORY_RESET_KEY, kxs_gpio_nopull, kxs_gpio_no_irq, true); // m_power_led /** * @brief 配置初始化 @@ -120,7 +120,7 @@ void umain() { /** * @brief report_generator init */ - ReportGeneratorService_init(fpga_if_get_instance()->timecode_irq_pin, fpga_if_get_instance()->camera_sync_code_irq_pin); + // ReportGeneratorService_init(fpga_if_get_instance()->timecode_irq_pin, fpga_if_get_instance()->camera_sync_code_irq_pin); /** * @brief reg_manager init @@ -144,13 +144,13 @@ void umain() { debug_light_ctrl(); factory_reset_key_detect(); - if (xs_has_passedms(0) >= 1* 60 * 60 * 1000) { + if (zaf_has_passedms(0) >= 1* 60 * 60 * 1000) { //限制客户使用时长 // reset_pin_io NVIC_SystemReset(); } - // ZLOGI(TAG,"factory_reset_key_state %d",xs_gpio_read(&m_factory_reset_key)); + // ZLOGI(TAG,"factory_reset_key_state %d",zaf_gpio_read(&m_factory_reset_key)); // osDelay(10); // fpga_if_spi_write_data_01(33, count, &rxdata); @@ -166,7 +166,7 @@ void umain() { // } // count++; - // ZLOGI(TAG, "fpga_if_init: %d", xs_gpio_read(&fpga_if_get_instance()->xsync_workstate_start_sig_irq_io)); + // ZLOGI(TAG, "fpga_if_init: %d",zaf_gpio_read(&fpga_if_get_instance()->xsync_workstate_start_sig_irq_io)); // ZLOGI(TAG, "rxdata: %x", rxdata); } } diff --git a/usrc/project_configs.h b/usrc/project_configs.h index 3521942..eb4115f 100644 --- a/usrc/project_configs.h +++ b/usrc/project_configs.h @@ -3,7 +3,7 @@ #define PC_VERSION 1 #define PC_MANUFACTURER0 ('i' | 'f' << 8 | 'l' << 16 | 'y' << 24) #define PC_MANUFACTURER1 ('t' | 'o' << 8 | 'p' << 16 | '\0' << 24) -#define PC_PROJECT_NAME "xsync" +#define PC_PROJECT_NAME "zaf_lstc" #define PC_IFLYTOP_ENABLE_OS 1 #define PC_DEBUG_UART huart1 diff --git a/usrc/project_dep.h b/usrc/project_dep.h index 3d29f43..ecf4aaf 100644 --- a/usrc/project_dep.h +++ b/usrc/project_dep.h @@ -8,8 +8,8 @@ #include "lwip/opt.h" #include "lwip/sys.h" -#include "iflytop_xsync_protocol\iflytop_xsync_protocol.h" -#include "iflytop_xsync\iflytop_xsync.h" +#include "libzaf\zaf.h" +#include "zaf_protocol\zaf_protocol.h" #include "main.h" #include "spi.h" diff --git a/usrc/service/device_info.cpp b/usrc/service/device_info.cpp index e169cfc..af88394 100644 --- a/usrc/service/device_info.cpp +++ b/usrc/service/device_info.cpp @@ -1,13 +1,11 @@ #include "device_info.hpp" - -#include "iflytop_xsync/xs_id.h" void device_info_init() {} void device_info_get_sn(sn_t* device_id) { static cpu_id_t cpu_id; - xs_id_get_cpu_id(&cpu_id); + zaf_id_get_cpu_id(&cpu_id); device_id->sn0 = cpu_id.id[0] | (cpu_id.id[1] << 8) | (cpu_id.id[2] << 16) | (cpu_id.id[3] << 24); device_id->sn1 = cpu_id.id[4] | (cpu_id.id[5] << 8) | (cpu_id.id[6] << 16) | (cpu_id.id[7] << 24); device_id->sn2 = cpu_id.id[8] | (cpu_id.id[9] << 8) | (cpu_id.id[10] << 16) | (cpu_id.id[11] << 24); diff --git a/usrc/service/device_info.hpp b/usrc/service/device_info.hpp index ad4ad48..2f099de 100644 --- a/usrc/service/device_info.hpp +++ b/usrc/service/device_info.hpp @@ -1,5 +1,5 @@ #pragma once -#include "iflytop_xsync/iflytop_xsync.h" +#include "libzaf\zaf.h" #include "project_configs.h" #ifdef __cplusplus diff --git a/usrc/service/extern_if_service.c b/usrc/service/extern_if_service.c index f353253..be8a5ee 100644 --- a/usrc/service/extern_if_service.c +++ b/usrc/service/extern_if_service.c @@ -1,8 +1,6 @@ -#include "iflytop_xsync_protocol\iflytop_xsync_protocol.h" #include "project_configs.h" #include "project_dep.h" // -#include "iflytop_xsync\xs_udp.h" #include "reg_manager.h" #define TAG "extern_if_service" @@ -37,7 +35,7 @@ static void create_and_send_receipt(extern_if_service_context_t *context, uint32 txpacket->cmd = context->rxpacket->cmd; txpacket->ndata = ndata; memcpy(txpacket->data, data, ndata * sizeof(uint32_t)); - xs_udp_send_message2(context->server, context->client, (const char *)txbuf, sizeof(iflytop_xsync_packet_header_t) + ndata * sizeof(uint32_t)); + zaf_udp_send_message2(context->server, context->client, (const char *)txbuf, sizeof(iflytop_xsync_packet_header_t) + ndata * sizeof(uint32_t)); } #if 0 /** @@ -56,7 +54,7 @@ static void create_and_send_timecode(struct sockaddr_in client, uint32_t timecod txpacket->ndata = 2; txpacket->data[0] = timecode0; txpacket->data[1] = timecode1; - xs_udp_send_message2(&m_udp_cmd_server, &client, txbuf, sizeof(iflytop_xsync_packet_header_t) + 2 * sizeof(uint32_t)); + zaf_udp_send_message2(&m_udp_cmd_server, &client, txbuf, sizeof(iflytop_xsync_packet_header_t) + 2 * sizeof(uint32_t)); } #endif @@ -118,7 +116,7 @@ static void udp_on_packet(udp_t *server, struct sockaddr_in *client, uint8_t *da } } -void extern_if_service_init() { ZASSERT(xs_udp_init(&m_udp_cmd_server, "extern_if_udp", IFLYTOP_XSYNC_SERVICE_XSYNC_PORT, udp_on_packet, 1024, NULL)); } +void extern_if_service_init() { ZASSERT(zaf_udp_init(&m_udp_cmd_server, "extern_if_udp", IFLYTOP_XSYNC_SERVICE_XSYNC_PORT, udp_on_packet, 1024, NULL)); } #if 0 void extern_if_service_send_timecode(struct sockaddr_in client, uint32_t timecode0, uint32_t timecode1) { create_and_send_timecode(client, timecode0, timecode1); } #endif diff --git a/usrc/service/extern_if_service.h b/usrc/service/extern_if_service.h index 6f61faf..edee1ed 100644 --- a/usrc/service/extern_if_service.h +++ b/usrc/service/extern_if_service.h @@ -1,5 +1,6 @@ #pragma once #include +#include "project_dep.h" #ifdef __cplusplus extern "C" { #endif diff --git a/usrc/service/global_flag.c b/usrc/service/global_flag.c deleted file mode 100644 index e69de29..0000000 diff --git a/usrc/service/global_flag.h b/usrc/service/global_flag.h deleted file mode 100644 index e69de29..0000000 diff --git a/usrc/service/reg_manager.c b/usrc/service/reg_manager.c index 52df038..077eae3 100644 --- a/usrc/service/reg_manager.c +++ b/usrc/service/reg_manager.c @@ -3,7 +3,6 @@ #include "base_service/config_service.h" #include "base_service/fpga_if.h" #include "device_info.hpp" -#include "iflytop_xsync_protocol/iflytop_xsync_protocol.h" #include "service/report_generator_service.h" uint32_t m_action_val0; diff --git a/usrc/service/reg_manager.h b/usrc/service/reg_manager.h index 034302d..db504c2 100644 --- a/usrc/service/reg_manager.h +++ b/usrc/service/reg_manager.h @@ -2,8 +2,7 @@ #ifdef __cplusplus extern "C" { #endif -#include "iflytop_xsync/iflytop_xsync.h" -#include "project_configs.h" +#include "project_dep.h" #define MAX_REG_NUM 256 diff --git a/usrc/service/report_generator_service.c b/usrc/service/report_generator_service.c index 2a511c6..7953004 100644 --- a/usrc/service/report_generator_service.c +++ b/usrc/service/report_generator_service.c @@ -1,11 +1,8 @@ -#include "iflytop_xsync_protocol\iflytop_xsync_protocol.h" -#include "project_configs.h" -#include "project_dep.h" -// +#include "report_generator_service.h" + #include "base_service/fpga_if.h" #include "base_service/task_level_config.h" #include "base_service/xsync_regs.hpp" -#include "iflytop_xsync\xs_udp.h" #include "reg_manager.h" static udp_broadcast_handler_t m_udp_camera_sync_sender; // @@ -36,7 +33,7 @@ static void create_and_send_timecode(uint32_t timecode0, uint32_t timecode1) { txpacket->eventid = ktimecode_report_event; txpacket->data[0] = timecode0; txpacket->data[1] = timecode1; - xs_udp_broadcast(&m_udp_camera_timecode_sender, IFLYTOP_XSYNC_EVENT_REPORT_PC_PORT, txbuf, sizeof(iflytop_xsync_event_report_packet_t) + 8); + zaf_udp_broadcast(&m_udp_camera_timecode_sender, IFLYTOP_XSYNC_EVENT_REPORT_PC_PORT, txbuf, sizeof(iflytop_xsync_event_report_packet_t) + 8); } static void create_and_send_sync_record_state_packet(uint32_t workstate, uint32_t timecode0, uint32_t timecode1) { static uint8_t txbuf[256]; @@ -47,7 +44,7 @@ static void create_and_send_sync_record_state_packet(uint32_t workstate, uint32_ txpacket->data[1] = timecode0; txpacket->data[2] = timecode1; - xs_udp_broadcast(&m_udp_camera_timecode_sender, IFLYTOP_XSYNC_EVENT_REPORT_PC_PORT, txbuf, sizeof(iflytop_xsync_event_report_packet_t) + 4 * packetdatalen); + zaf_udp_broadcast(&m_udp_camera_timecode_sender, IFLYTOP_XSYNC_EVENT_REPORT_PC_PORT, txbuf, sizeof(iflytop_xsync_event_report_packet_t) + 4 * packetdatalen); } /** * @brief 构建并发送相机同步数据包 @@ -65,7 +62,7 @@ static void create_and_send_camera_sync_msg(uint32_t count) { txbuf[5] = (count >> 16) & 0xFF; txbuf[4] = (count >> 24) & 0xFF; - xs_udp_broadcast(&m_udp_camera_sync_sender, IFLYTOP_XSYNC_CAMERA_SYNC_PACKET_PC_PORT, txbuf, sizeof(txbuf)); + zaf_udp_broadcast(&m_udp_camera_sync_sender, IFLYTOP_XSYNC_CAMERA_SYNC_PACKET_PC_PORT, txbuf, sizeof(txbuf)); } static void timecode_report_thread(void const *argument) { @@ -103,7 +100,7 @@ static void xync_signal_report_thread(void const *argument) { m_xyns_camera_sync_packet_last_report_tp = HAL_GetTick(); create_and_send_camera_sync_msg(m_sync_count); m_sync_count++; - } else if (xs_has_passedms(m_xyns_camera_sync_packet_last_report_tp) >= 998) { + } else if (zaf_has_passedms(m_xyns_camera_sync_packet_last_report_tp) >= 998) { // TODO:此处这么写，当拍摄频率大于500HZ的时候，就不能完全满足刚好卡在1s上报一次消息 m_xyns_camera_sync_packet_last_report_tp = HAL_GetTick(); create_and_send_camera_sync_msg(m_sync_count); @@ -122,7 +119,7 @@ void ReportGeneratorService_irq_trigger(uint16_t gpiopin) { osSignalSet(timecode_report_thread_id, 0x01); } if (m_xsync_workstate_start_sig_irq_pin_off == gpiopin) { - if (xs_gpio_read(&fpga_if_get_instance()->xsync_workstate_start_sig_irq_io)) { + if (zaf_gpio_read(&fpga_if_get_instance()->xsync_workstate_start_sig_irq_io)) { osSignalSet(timecode_report_thread_id, 0x02); // 开始工作信号 } else { osSignalSet(timecode_report_thread_id, 0x04); // 结束工作信号 diff --git a/usrc/service/report_generator_service.h b/usrc/service/report_generator_service.h index 4fd928f..67fedb5 100644 --- a/usrc/service/report_generator_service.h +++ b/usrc/service/report_generator_service.h @@ -1,7 +1,7 @@ #pragma once #include -#include "iflytop_xsync\pin.h" +#include "project_dep.h" #ifdef __cplusplus extern "C" { @@ -23,7 +23,7 @@ extern "C" { * @param timecode_trigger_pin * @param xync_trigger_pin */ -void ReportGeneratorService_init(Pin_t timecode_trigger_pin, Pin_t xync_trigger_pin); +void ReportGeneratorService_init(); /** * @brief 中断触发函数，当IO中断触发时，调用此方法 diff --git a/xsync_stm32 Debug.launch b/xsync_stm32 Debug.launch deleted file mode 100644 index 632abef..0000000 --- a/xsync_stm32 Debug.launch +++ /dev/null @@ -1,83 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/xsync_stm32.cfg b/xsync_stm32.cfg deleted file mode 100644 index ef37116..0000000 --- a/xsync_stm32.cfg +++ /dev/null @@ -1,44 +0,0 @@ -# This is an genericBoard board with a single STM32F407VETx chip -# -# Generated by STM32CubeIDE -# Take care that such file, as generated, may be overridden without any early notice. Please have a look to debug launch configuration setup(s) - -source [find interface/stlink-dap.cfg] - - -set WORKAREASIZE 0x8000 - -transport select "dapdirect_swd" - -set CHIPNAME STM32F407VETx -set BOARDNAME genericBoard - -# Enable debug when in low power modes -set ENABLE_LOW_POWER 1 - -# Stop Watchdog counters when halt -set STOP_WATCHDOG 1 - -# STlink Debug clock frequency -set CLOCK_FREQ 8000 - -# Reset configuration -# use hardware reset, connect under reset -# connect_assert_srst needed if low power mode application running (WFI...) -reset_config srst_only srst_nogate connect_assert_srst -set CONNECT_UNDER_RESET 1 -set CORE_RESET 0 - -# ACCESS PORT NUMBER -set AP_NUM 0 -# GDB PORT -set GDB_PORT 3333 - - - - - -# BCTM CPU variables - -source [find target/stm32f4x.cfg] - diff --git a/xsync_stm32.ioc b/xsync_stm32.ioc deleted file mode 100644 index 50b02bc..0000000 --- a/xsync_stm32.ioc +++ /dev/null @@ -1,361 +0,0 @@ -#MicroXplorer Configuration settings - do not modify -CAD.formats= -CAD.pinconfig= -CAD.provider= -Dma.Request0=USART1_RX -Dma.Request1=SPI2_TX -Dma.Request2=SPI2_RX -Dma.Request3=SPI1_RX -Dma.Request4=SPI1_TX -Dma.RequestsNb=5 -Dma.SPI1_RX.3.Direction=DMA_PERIPH_TO_MEMORY -Dma.SPI1_RX.3.FIFOMode=DMA_FIFOMODE_DISABLE -Dma.SPI1_RX.3.Instance=DMA2_Stream0 -Dma.SPI1_RX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE -Dma.SPI1_RX.3.MemInc=DMA_MINC_ENABLE -Dma.SPI1_RX.3.Mode=DMA_NORMAL -Dma.SPI1_RX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE -Dma.SPI1_RX.3.PeriphInc=DMA_PINC_DISABLE -Dma.SPI1_RX.3.Priority=DMA_PRIORITY_LOW -Dma.SPI1_RX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode -Dma.SPI1_TX.4.Direction=DMA_MEMORY_TO_PERIPH -Dma.SPI1_TX.4.FIFOMode=DMA_FIFOMODE_DISABLE -Dma.SPI1_TX.4.Instance=DMA2_Stream3 -Dma.SPI1_TX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE -Dma.SPI1_TX.4.MemInc=DMA_MINC_ENABLE -Dma.SPI1_TX.4.Mode=DMA_NORMAL -Dma.SPI1_TX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE -Dma.SPI1_TX.4.PeriphInc=DMA_PINC_DISABLE -Dma.SPI1_TX.4.Priority=DMA_PRIORITY_LOW -Dma.SPI1_TX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode -Dma.SPI2_RX.2.Direction=DMA_PERIPH_TO_MEMORY -Dma.SPI2_RX.2.FIFOMode=DMA_FIFOMODE_DISABLE -Dma.SPI2_RX.2.Instance=DMA1_Stream3 -Dma.SPI2_RX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE -Dma.SPI2_RX.2.MemInc=DMA_MINC_ENABLE -Dma.SPI2_RX.2.Mode=DMA_NORMAL -Dma.SPI2_RX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE -Dma.SPI2_RX.2.PeriphInc=DMA_PINC_DISABLE -Dma.SPI2_RX.2.Priority=DMA_PRIORITY_LOW -Dma.SPI2_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode -Dma.SPI2_TX.1.Direction=DMA_MEMORY_TO_PERIPH -Dma.SPI2_TX.1.FIFOMode=DMA_FIFOMODE_DISABLE -Dma.SPI2_TX.1.Instance=DMA1_Stream4 -Dma.SPI2_TX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE -Dma.SPI2_TX.1.MemInc=DMA_MINC_ENABLE -Dma.SPI2_TX.1.Mode=DMA_NORMAL -Dma.SPI2_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE -Dma.SPI2_TX.1.PeriphInc=DMA_PINC_DISABLE -Dma.SPI2_TX.1.Priority=DMA_PRIORITY_LOW -Dma.SPI2_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode -Dma.USART1_RX.0.Direction=DMA_PERIPH_TO_MEMORY -Dma.USART1_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE -Dma.USART1_RX.0.Instance=DMA2_Stream2 -Dma.USART1_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE -Dma.USART1_RX.0.MemInc=DMA_MINC_ENABLE -Dma.USART1_RX.0.Mode=DMA_NORMAL -Dma.USART1_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE -Dma.USART1_RX.0.PeriphInc=DMA_PINC_DISABLE -Dma.USART1_RX.0.Priority=DMA_PRIORITY_LOW -Dma.USART1_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode -ETH.IPParameters=MediaInterface,RxBuffLen,RxMode,PHY_Name_RMII,PHY_User_Name,PHY_SR,PHY_SPEED_STATUS,PHY_DUPLEX_STATUS,MACAddr -ETH.MACAddr=00\:80\:E1\:00\:00\:01 -ETH.MediaInterface=HAL_ETH_RMII_MODE -ETH.PHY_DUPLEX_STATUS=0x0010 -ETH.PHY_Name_RMII=userPHY -ETH.PHY_SPEED_STATUS=0x0004 -ETH.PHY_SR=0x1F -ETH.PHY_User_Name=LAN8720A -ETH.RxBuffLen=1536 -ETH.RxMode=ETH_RXINTERRUPT_MODE -FREERTOS.FootprintOK=true -FREERTOS.IPParameters=Tasks01,FootprintOK,configUSE_NEWLIB_REENTRANT,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configRECORD_STACK_HIGH_ADDRESS,configENABLE_FPU,configTOTAL_HEAP_SIZE -FREERTOS.Tasks01=defaultTask,-3,1024,StartDefaultTask,As weak,NULL,Dynamic,NULL,NULL -FREERTOS.configENABLE_FPU=1 -FREERTOS.configRECORD_STACK_HIGH_ADDRESS=1 -FREERTOS.configTOTAL_HEAP_SIZE=30000 -FREERTOS.configUSE_COUNTING_SEMAPHORES=1 -FREERTOS.configUSE_NEWLIB_REENTRANT=1 -FREERTOS.configUSE_RECURSIVE_MUTEXES=1 -File.Version=6 -GPIO.groupedBy=Group By Peripherals -KeepUserPlacement=false -LWIP.BSP.number=1 -LWIP.GATEWAY_ADDRESS=192.168.008.001 -LWIP.IPParameters=LWIP_DHCP,IP_ADDRESS,NETMASK_ADDRESS,GATEWAY_ADDRESS,LWIP_DNS,LWIP_NETIF_HOSTNAME,LWIP_SO_RCVTIMEO,LWIP_SO_SNDTIMEO -LWIP.IP_ADDRESS=192.168.008.010 -LWIP.LWIP_DHCP=0 -LWIP.LWIP_DNS=1 -LWIP.LWIP_NETIF_HOSTNAME=1 -LWIP.LWIP_SO_RCVTIMEO=1 -LWIP.LWIP_SO_SNDTIMEO=1 -LWIP.NETMASK_ADDRESS=255.255.255.255 -LWIP.Version=v2.1.2_Cube -LWIP0.BSP.STBoard=false -LWIP0.BSP.api=BSP_COMPONENT_DRIVER -LWIP0.BSP.component=LAN8742 -LWIP0.BSP.condition= -LWIP0.BSP.instance=LAN8742 -LWIP0.BSP.ip= -LWIP0.BSP.mode= -LWIP0.BSP.name=Driver_PHY -LWIP0.BSP.semaphore=S_LAN8742 -LWIP0.BSP.solution=LAN8742 -Mcu.CPN=STM32F407VET6 -Mcu.Family=STM32F4 -Mcu.IP0=CRC -Mcu.IP1=DMA -Mcu.IP10=SYS -Mcu.IP11=TIM1 -Mcu.IP12=TIM3 -Mcu.IP13=TIM6 -Mcu.IP14=TIM7 -Mcu.IP15=USART1 -Mcu.IP2=ETH -Mcu.IP3=FREERTOS -Mcu.IP4=LWIP -Mcu.IP5=NVIC -Mcu.IP6=RCC -Mcu.IP7=RNG -Mcu.IP8=SPI1 -Mcu.IP9=SPI2 -Mcu.IPNb=16 -Mcu.Name=STM32F407V(E-G)Tx -Mcu.Package=LQFP100 -Mcu.Pin0=PH0-OSC_IN -Mcu.Pin1=PH1-OSC_OUT -Mcu.Pin10=PA7 -Mcu.Pin11=PC4 -Mcu.Pin12=PC5 -Mcu.Pin13=PB10 -Mcu.Pin14=PB11 -Mcu.Pin15=PB12 -Mcu.Pin16=PB13 -Mcu.Pin17=PA9 -Mcu.Pin18=PA10 -Mcu.Pin19=PA13 -Mcu.Pin2=PC1 -Mcu.Pin20=PA14 -Mcu.Pin21=PD3 -Mcu.Pin22=PB5 -Mcu.Pin23=VP_CRC_VS_CRC -Mcu.Pin24=VP_FREERTOS_VS_CMSIS_V1 -Mcu.Pin25=VP_LWIP_VS_Enabled -Mcu.Pin26=VP_RNG_VS_RNG -Mcu.Pin27=VP_SYS_VS_tim11 -Mcu.Pin28=VP_TIM1_VS_ClockSourceINT -Mcu.Pin29=VP_TIM3_VS_ClockSourceINT -Mcu.Pin3=PC2 -Mcu.Pin30=VP_TIM6_VS_ClockSourceINT -Mcu.Pin31=VP_TIM7_VS_ClockSourceINT -Mcu.Pin4=PC3 -Mcu.Pin5=PA1 -Mcu.Pin6=PA2 -Mcu.Pin7=PA4 -Mcu.Pin8=PA5 -Mcu.Pin9=PA6 -Mcu.PinsNb=32 -Mcu.ThirdPartyNb=0 -Mcu.UserConstants= -Mcu.UserName=STM32F407VETx -MxCube.Version=6.7.0 -MxDb.Version=DB.6.0.70 -NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false -NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true -NVIC.DMA1_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true -NVIC.DMA2_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true -NVIC.DMA2_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true -NVIC.DMA2_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true -NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false -NVIC.ETH_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true -NVIC.ForceEnableDMAVector=true -NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false -NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false -NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false -NVIC.PendSV_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:false\:false -NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 -NVIC.SPI1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true -NVIC.SPI2_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true -NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:false\:false\:false\:false\:false -NVIC.SavedPendsvIrqHandlerGenerated=true -NVIC.SavedSvcallIrqHandlerGenerated=true -NVIC.SavedSystickIrqHandlerGenerated=true -NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:false\:true\:false\:true\:false -NVIC.TIM1_TRG_COM_TIM11_IRQn=true\:15\:0\:false\:false\:true\:false\:false\:true\:true -NVIC.TIM6_DAC_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true -NVIC.TIM7_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true -NVIC.TimeBase=TIM1_TRG_COM_TIM11_IRQn -NVIC.TimeBaseIP=TIM11 -NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false -PA1.Mode=RMII -PA1.Signal=ETH_REF_CLK -PA10.Mode=Asynchronous -PA10.Signal=USART1_RX -PA13.Mode=Serial_Wire -PA13.Signal=SYS_JTMS-SWDIO -PA14.Mode=Serial_Wire -PA14.Signal=SYS_JTCK-SWCLK -PA2.Mode=RMII -PA2.Signal=ETH_MDIO -PA4.Mode=NSS_Signal_Hard_Output -PA4.Signal=SPI1_NSS -PA5.Mode=Full_Duplex_Master -PA5.Signal=SPI1_SCK -PA6.Mode=Full_Duplex_Master -PA6.Signal=SPI1_MISO -PA7.Mode=RMII -PA7.Signal=ETH_CRS_DV -PA9.Locked=true -PA9.Mode=Asynchronous -PA9.Signal=USART1_TX -PB10.Mode=Full_Duplex_Master -PB10.Signal=SPI2_SCK -PB11.Mode=RMII -PB11.Signal=ETH_TX_EN -PB12.Mode=RMII -PB12.Signal=ETH_TXD0 -PB13.Mode=RMII -PB13.Signal=ETH_TXD1 -PB5.Mode=Full_Duplex_Master -PB5.Signal=SPI1_MOSI -PC1.Mode=RMII -PC1.Signal=ETH_MDC -PC2.Mode=Full_Duplex_Master -PC2.Signal=SPI2_MISO -PC3.Mode=Full_Duplex_Master -PC3.Signal=SPI2_MOSI -PC4.Mode=RMII -PC4.Signal=ETH_RXD0 -PC5.Mode=RMII -PC5.Signal=ETH_RXD1 -PD3.Locked=true -PD3.Signal=GPIO_Output -PH0-OSC_IN.Mode=HSE-External-Oscillator -PH0-OSC_IN.Signal=RCC_OSC_IN -PH1-OSC_OUT.Mode=HSE-External-Oscillator -PH1-OSC_OUT.Signal=RCC_OSC_OUT -PinOutPanel.RotationAngle=0 -ProjectManager.AskForMigrate=true -ProjectManager.BackupPrevious=false -ProjectManager.CompilerOptimize=6 -ProjectManager.ComputerToolchain=false -ProjectManager.CoupleFile=true -ProjectManager.CustomerFirmwarePackage= -ProjectManager.DefaultFWLocation=true -ProjectManager.DeletePrevious=false -ProjectManager.DeviceId=STM32F407VETx -ProjectManager.FirmwarePackage=STM32Cube FW_F4 V1.27.1 -ProjectManager.FreePins=true -ProjectManager.HalAssertFull=true -ProjectManager.HeapSize=0x2000 -ProjectManager.KeepUserCode=true -ProjectManager.LastFirmware=true -ProjectManager.LibraryCopy=1 -ProjectManager.MainLocation=Core/Src -ProjectManager.NoMain=false -ProjectManager.PreviousToolchain=STM32CubeIDE -ProjectManager.ProjectBuild=false -ProjectManager.ProjectFileName=xsync_stm32.ioc -ProjectManager.ProjectName=xsync_stm32 -ProjectManager.ProjectStructure= -ProjectManager.RegisterCallBack= -ProjectManager.StackSize=0x1000 -ProjectManager.TargetToolchain=STM32CubeIDE -ProjectManager.ToolChainLocation= -ProjectManager.UAScriptAfterPath= -ProjectManager.UAScriptBeforePath= -ProjectManager.UnderRoot=true -ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_TIM3_Init-TIM3-false-HAL-true,6-MX_CRC_Init-CRC-false-HAL-true,7-MX_RNG_Init-RNG-false-HAL-true,8-MX_TIM7_Init-TIM7-false-HAL-true,9-MX_TIM6_Init-TIM6-false-HAL-true,10-MX_TIM1_Init-TIM1-false-HAL-true,11-MX_LWIP_Init-LWIP-false-HAL-false,12-MX_SPI1_Init-SPI1-false-HAL-true,13-MX_SPI2_Init-SPI2-false-HAL-true -RCC.48MHZClocksFreq_Value=48000000 -RCC.AHBFreq_Value=144000000 -RCC.APB1CLKDivider=RCC_HCLK_DIV4 -RCC.APB1Freq_Value=36000000 -RCC.APB1TimFreq_Value=72000000 -RCC.APB2CLKDivider=RCC_HCLK_DIV2 -RCC.APB2Freq_Value=72000000 -RCC.APB2TimFreq_Value=144000000 -RCC.CortexFreq_Value=144000000 -RCC.EthernetFreq_Value=144000000 -RCC.FCLKCortexFreq_Value=144000000 -RCC.FamilyName=M -RCC.HCLKFreq_Value=144000000 -RCC.HSE_VALUE=8000000 -RCC.HSI_VALUE=16000000 -RCC.I2SClocksFreq_Value=64000000 -RCC.IPParameters=48MHZClocksFreq_Value,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2CLKDivider,APB2Freq_Value,APB2TimFreq_Value,CortexFreq_Value,EthernetFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI_VALUE,I2SClocksFreq_Value,LSE_VALUE,LSI_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,PLLCLKFreq_Value,PLLI2SN,PLLM,PLLN,PLLQ,PLLQCLKFreq_Value,PLLSourceVirtual,RCC_MCO1Source,RCC_MCO2Source,RCC_MCODiv1,RCC_MCODiv2,RTCFreq_Value,RTCHSEDivFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,VCOI2SOutputFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value,VcooutputI2S -RCC.LSE_VALUE=32768 -RCC.LSI_VALUE=32000 -RCC.MCO1PinFreq_Value=36000000 -RCC.MCO2PinFreq_Value=16000000 -RCC.PLLCLKFreq_Value=144000000 -RCC.PLLI2SN=64 -RCC.PLLM=4 -RCC.PLLN=144 -RCC.PLLQ=6 -RCC.PLLQCLKFreq_Value=48000000 -RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE -RCC.RCC_MCO1Source=RCC_MCO1SOURCE_PLLCLK -RCC.RCC_MCO2Source=RCC_MCO2SOURCE_PLLI2SCLK -RCC.RCC_MCODiv1=RCC_MCODIV_4 -RCC.RCC_MCODiv2=RCC_MCODIV_4 -RCC.RTCFreq_Value=32000 -RCC.RTCHSEDivFreq_Value=4000000 -RCC.SYSCLKFreq_VALUE=144000000 -RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK -RCC.VCOI2SOutputFreq_Value=128000000 -RCC.VCOInputFreq_Value=2000000 -RCC.VCOOutputFreq_Value=288000000 -RCC.VcooutputI2S=64000000 -SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_128 -SPI1.CLKPhase=SPI_PHASE_2EDGE -SPI1.CLKPolarity=SPI_POLARITY_HIGH -SPI1.CalculateBaudRate=562.5 KBits/s -SPI1.Direction=SPI_DIRECTION_2LINES -SPI1.FirstBit=SPI_FIRSTBIT_LSB -SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS,BaudRatePrescaler,FirstBit,CLKPolarity,CLKPhase -SPI1.Mode=SPI_MODE_MASTER -SPI1.VirtualNSS=VM_NSSHARD -SPI1.VirtualType=VM_MASTER -SPI2.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_64 -SPI2.CLKPhase=SPI_PHASE_2EDGE -SPI2.CLKPolarity=SPI_POLARITY_HIGH -SPI2.CalculateBaudRate=562.5 KBits/s -SPI2.Direction=SPI_DIRECTION_2LINES -SPI2.FirstBit=SPI_FIRSTBIT_LSB -SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,CLKPolarity,CLKPhase,FirstBit,BaudRatePrescaler -SPI2.Mode=SPI_MODE_MASTER -SPI2.VirtualType=VM_MASTER -TIM1.IPParameters=Period,Prescaler -TIM1.Period=9999 -TIM1.Prescaler=143 -TIM3.IPParameters=Prescaler,Period -TIM3.Period=9999 -TIM3.Prescaler=71 -TIM6.IPParameters=Prescaler -TIM6.Prescaler=71 -TIM7.IPParameters=Prescaler -TIM7.Prescaler=81 -USART1.BaudRate=921600 -USART1.IPParameters=VirtualMode,BaudRate -USART1.VirtualMode=VM_ASYNC -VP_CRC_VS_CRC.Mode=CRC_Activate -VP_CRC_VS_CRC.Signal=CRC_VS_CRC -VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1 -VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1 -VP_LWIP_VS_Enabled.Mode=Enabled -VP_LWIP_VS_Enabled.Signal=LWIP_VS_Enabled -VP_RNG_VS_RNG.Mode=RNG_Activate -VP_RNG_VS_RNG.Signal=RNG_VS_RNG -VP_SYS_VS_tim11.Mode=TIM11 -VP_SYS_VS_tim11.Signal=SYS_VS_tim11 -VP_TIM1_VS_ClockSourceINT.Mode=Internal -VP_TIM1_VS_ClockSourceINT.Signal=TIM1_VS_ClockSourceINT -VP_TIM3_VS_ClockSourceINT.Mode=Internal -VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT -VP_TIM6_VS_ClockSourceINT.Mode=Enable_Timer -VP_TIM6_VS_ClockSourceINT.Signal=TIM6_VS_ClockSourceINT -VP_TIM7_VS_ClockSourceINT.Mode=Enable_Timer -VP_TIM7_VS_ClockSourceINT.Signal=TIM7_VS_ClockSourceINT -board=custom -rtos.0.ip=FREERTOS -isbadioc=false diff --git a/xsync_stm32.launch b/xsync_stm32.launch deleted file mode 100644 index 34468c0..0000000 --- a/xsync_stm32.launch +++ /dev/null @@ -1,98 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/xsync_v3.pdf b/xsync_v3.pdf deleted file mode 100644 index befc29fe9678debc1ce69dc138d213f983baa867..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 388715 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zjzg<-2`0K4Ls!KC!7z*DGXlX(_G*lfZT<3f5r~Pv&?*dLk@Lr5vH|nNN?jIE1!cCv z9t*+n)pEot|5z*-2Sv3)7qCe%NjXJisUq9MAymfdLej+vavV4elk+Uo0dyTJbY&~B zN$Wx|0kcTCI+!#QXEVSX3Eaz3ONLW$$QR3Fa#p& zf;8h~{}7DLBJBqgoCKU48z_!H!4UGEgDewd{~#2&Lh>0xVH6OktcU~XV&vL@2o?sB z>Iz^4LauQbK?zcAfWt<>q}X5<6DL+-2t>{Sj9?g>lq(oVA#yzf3?cgrvvF*BY~l!> vAT$8{@7Bmo5FG&85Y5O{C=}BcdnjmAA~7#Qyx62b7eXOIfljw{wo>>XeI>J8 diff --git a/zaf_protocol/zaf_protocol.h b/zaf_protocol/zaf_protocol.h new file mode 100644 index 0000000..fd48d4f --- /dev/null +++ b/zaf_protocol/zaf_protocol.h @@ -0,0 +1,191 @@ +#pragma once +#include + +/** + * @brief XSYNC协议端口 + */ +#define IFLYTOP_XSYNC_SERVICE_XSYNC_PORT 19900 // xsync端端口 +#define IFLYTOP_XSYNC_SERVICE_PC_PORT 19901 // pc 端端口 + +#define IFLYTOP_XSYNC_EVENT_REPORT_XSYNC_PORT 19902 // xsync端端口 +#define IFLYTOP_XSYNC_EVENT_REPORT_PC_PORT 19903 // pc端端口 + +#define IFLYTOP_XSYNC_CAMERA_SYNC_PACKET_XSYNC_PORT 13013 // xsync端端口 +#define IFLYTOP_XSYNC_CAMERA_SYNC_PACKET_PC_PORT 13014 // pc端端口 + +/** + * @brief + * 协议说明 + * + * kxsync_packet_type_reg_read: + * tx: regadd + * rx: ecode,regdata + * + * kxsync_packet_type_reg_write + * tx: regadd,regdata + * rx: ecode,regdata + * + * kxsync_packet_type_reg_read_regs + * tx: regstartadd,nreg + * rx: ecode,regdatas + * + */ +typedef enum { + kxsync_packet_type_none = 0, + kxsync_packet_type_reg_read = 1, + kxsync_packet_type_reg_write = 2, + kxsync_packet_type_reg_read_regs = 3, + kxsync_packet_type_timecode_report = 4, +} xsync_protocol_cmd_t; + +typedef enum { + kxsync_packet_type_cmd = 0, + kxsync_packet_type_receipt = 1, + kxsync_packet_type_report = 2, +} xsync_protocol_packet_type_t; + +typedef enum { + kxs_ec_success = 0, + kxs_ec_overtime = 1, + kxs_ec_socket_fail = 2, + kxs_ec_bind_fail = 3, + kxs_ec_send_fail = 4, + kxs_ec_receive_fail = 5, + kxs_ec_setsockopt_rx_timeout_fail = 6, + kxs_ec_lose_connect = 7, + kxs_ec_param_error = 8, +}zaf_error_code_t; + +static inline const char*zaf_error_code_2_str(zaf_error_code_t ecode) { + switch (ecode) { + case kxs_ec_success: + return "success"; + case kxs_ec_overtime: + return "overtime"; + case kxs_ec_socket_fail: + return "socket fail"; + case kxs_ec_bind_fail: + return "bind fail"; + case kxs_ec_send_fail: + return "send fail"; + case kxs_ec_receive_fail: + return "receive fail"; + case kxs_ec_setsockopt_rx_timeout_fail: + return "setsockopt rx timeout fail"; + case kxs_ec_lose_connect: + return "lose connect"; + case kxs_ec_param_error: + return "param error"; + default: + return "unknown error"; + } +} + +#pragma pack(1) + +typedef struct { + uint16_t type; + uint16_t index; + uint16_t cmd; + uint16_t ndata; + uint32_t data[]; // first is always checksum +} iflytop_xsync_packet_header_t; + +typedef struct { + uint32_t eventid; + uint32_t data[]; +} iflytop_xsync_event_report_packet_t; + +typedef enum { + ktimecode_report_event = 0, + kxsync_work_state_report_event = 1, +} iflytop_event_type_t; + +#define XYSNC_REG_DEVICE_INFO_START_ADD 0 +#define XYSNC_REG_STM32_CONFIG_START_ADD 16 +#define XYSNC_REG_FPGA_REG_START 32 + +#define REG_ADD_OFF_STM32 (0x0000) +#define REG_ADD_OFF_FPGA_TEST (0x00020) +// 控制中心寄存器地址 +#define REG_ADD_OFF_CONTROL_SENSOR (0x00030) +// 输入组件 +#define REG_ADD_OFF_TTLIN1 (0x0100) +#define REG_ADD_OFF_TTLIN2 (0x0110) +#define REG_ADD_OFF_TTLIN3 (0x0120) +#define REG_ADD_OFF_TTLIN4 (0x0130) +#define REG_ADD_OFF_TIMECODE_IN (0x0140) +#define REG_ADD_OFF_GENLOCK_IN (0x0150) +// 输出组件 +#define REG_ADD_OFF_TTLOUT1 (0x0200) +#define REG_ADD_OFF_TTLOUT2 (0x0210) +#define REG_ADD_OFF_TTLOUT3 (0x0220) +#define REG_ADD_OFF_TTLOUT4 (0x0230) +#define REG_ADD_OFF_TIMECODE_OUT (0x0240) +#define REG_ADD_OFF_GENLOCK_OUT (0x0250) +#define REG_ADD_OFF_STM32_IF (0x0260) +// 调试组件 +#define REG_ADD_OFF_DEBUGER (0x0300) + +typedef enum { + /** + * @brief + * REG 0(16) 设备信息基础寄存器 + */ + kxsync_reg_software_version = 0, + kxsync_reg_manufacturer0 = 1, + kxsync_reg_manufacturer1 = 2, + kxsync_reg_product_type_id = 3, + kxsync_reg_sn_id0 = 4, + kxsync_reg_sn_id1 = 5, + kxsync_reg_sn_id2 = 6, + kxsync_reg_mac0 = 7, + kxsync_reg_mac1 = 8, + + /** + * @brief + * REG 16(32) STM32配置寄存器0 + */ + kxsync_reg_stm32_obtaining_ip_mode = XYSNC_REG_STM32_CONFIG_START_ADD + 0, + kxsync_reg_stm32_ip = XYSNC_REG_STM32_CONFIG_START_ADD + 1, + kxsync_reg_stm32_gw = XYSNC_REG_STM32_CONFIG_START_ADD + 2, + kxsync_reg_stm32_netmask = XYSNC_REG_STM32_CONFIG_START_ADD + 3, + kxsync_reg_stm32_config0 = XYSNC_REG_STM32_CONFIG_START_ADD + 4, // bit0: timecode report enable, bit1: camera sync report enable + kxsync_reg_stm32_camera_sync_signal_count = XYSNC_REG_STM32_CONFIG_START_ADD + 5, // 写任意数值之后清零 + // kxsync_reg_stm32_camera_sync_signal_report_period = XYSNC_REG_STM32_CONFIG_START_ADD + 6, // 多少帧上报一次 + + kxsync_reg_stm32_action0 = XYSNC_REG_STM32_CONFIG_START_ADD + 14, // action reg + kxsync_reg_stm32_action_val0 = XYSNC_REG_STM32_CONFIG_START_ADD + 15, // action val reg + +} xsync_reg_add_t; + +#define KXSYNC_REG_STM32_CONFIG0_MASK_TIMECODE_REPORT_ENABLE 0x01 +#define KXSYNC_REG_STM32_CONFIG0_MASK_CAMERA_SYNC_REPORT_ENABLE 0x02 + +typedef enum { + xsync_stm32_action_none, // + xsync_stm32_action_generator_new_mac, // + xsync_stm32_action_factory_reset, // + xsync_stm32_action_reboot, // + xsync_stm32_action_storage_cfg, // +} xsync_stm32_action_t; + +typedef enum { + kxsync_device_type_none = 0, + kxsync_device_type_xsync = 1, + kxsync_device_type_puck_station = 2, + kxsync_device_type_encoder = 3, +} xsync_device_type_t; + +typedef enum { obtaining_ip_mode_type_static = 0, obtaining_ip_mode_type_dhcp = 1 } obtaining_ip_mode_t; +static inline const char* obtaining_ip_mode_to_string(obtaining_ip_mode_t mode) { + switch (mode) { + case obtaining_ip_mode_type_static: + return "static"; + case obtaining_ip_mode_type_dhcp: + return "dhcp"; + default: + return "unknown"; + } +} +#pragma pack()

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