p_camera_light_source_timing_controller
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camera_light_src_timing_controller_stm32
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master
zhaohe 1 year ago
parent
779bd8d709
commit
a50bbdebf9
10 changed files with 146 additions and 326 deletions
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  1. 3
      Core/Inc/stm32f4xx_it.h
  2. 3
      Core/Inc/usart.h
  3. 9
      Core/Src/dma.c
  4. 8
      Core/Src/gpio.c
  5. 1
      Core/Src/main.c
  6. 45
      Core/Src/stm32f4xx_it.c
  7. 138
      Core/Src/usart.c
  8. 176
      camera_light_src_timing_controller_stm32.ioc
  9. 50
      usrc/base_service/fpga_if.c
  10. 39
      usrc/main.cpp

3
Core/Inc/stm32f4xx_it.h
View File

@ -60,11 +60,8 @@ void USART3_IRQHandler(void);
void TIM6_DAC_IRQHandler(void);
void TIM7_IRQHandler(void);
void DMA2_Stream0_IRQHandler(void);
void DMA2_Stream1_IRQHandler(void);
void DMA2_Stream2_IRQHandler(void);
void DMA2_Stream3_IRQHandler(void);
void ETH_IRQHandler(void);
void DMA2_Stream6_IRQHandler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */

3
Core/Inc/usart.h
View File

@ -36,15 +36,12 @@ extern UART_HandleTypeDef huart1;
extern UART_HandleTypeDef huart3;
extern UART_HandleTypeDef huart6;
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_USART1_UART_Init(void);
void MX_USART3_UART_Init(void);
void MX_USART6_UART_Init(void);
/* USER CODE BEGIN Prototypes */

9
Core/Src/dma.c
View File

@ -53,18 +53,9 @@ void MX_DMA_Init(void)
/* DMA2_Stream0_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
/* DMA2_Stream1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream1_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream1_IRQn);
/* DMA2_Stream2_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
/* DMA2_Stream3_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn);
/* DMA2_Stream6_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream6_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream6_IRQn);
}

8
Core/Src/gpio.c
View File

@ -70,11 +70,11 @@ void MX_GPIO_Init(void)
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
/*Configure GPIO pins : PC13 PC14 PC15 PC0
PC2 PC3 PC8 PC9
PC12 */
PC2 PC3 PC6 PC7
PC8 PC9 PC12 */
GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15|GPIO_PIN_0
|GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_8|GPIO_PIN_9
|GPIO_PIN_12;
|GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_6|GPIO_PIN_7
|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_12;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);

1
Core/Src/main.c
View File

@ -103,7 +103,6 @@ int main(void)
MX_TIM1_Init();
MX_SPI1_Init();
MX_USART3_UART_Init();
MX_USART6_UART_Init();
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */

45
Core/Src/stm32f4xx_it.c
View File

@ -62,11 +62,8 @@ extern SPI_HandleTypeDef hspi1;
extern TIM_HandleTypeDef htim1;
extern TIM_HandleTypeDef htim6;
extern TIM_HandleTypeDef htim7;
extern DMA_HandleTypeDef hdma_usart1_rx;
extern DMA_HandleTypeDef hdma_usart3_rx;
extern DMA_HandleTypeDef hdma_usart3_tx;
extern DMA_HandleTypeDef hdma_usart6_rx;
extern DMA_HandleTypeDef hdma_usart6_tx;
extern UART_HandleTypeDef huart3;
extern TIM_HandleTypeDef htim11;
@ -286,34 +283,6 @@ void DMA2_Stream0_IRQHandler(void)
}
/**
* @brief This function handles DMA2 stream1 global interrupt.
*/
void DMA2_Stream1_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream1_IRQn 0 */
/* USER CODE END DMA2_Stream1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart6_rx);
/* USER CODE BEGIN DMA2_Stream1_IRQn 1 */
/* USER CODE END DMA2_Stream1_IRQn 1 */
}
/**
* @brief This function handles DMA2 stream2 global interrupt.
*/
void DMA2_Stream2_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream2_IRQn 0 */
/* USER CODE END DMA2_Stream2_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart1_rx);
/* USER CODE BEGIN DMA2_Stream2_IRQn 1 */
/* USER CODE END DMA2_Stream2_IRQn 1 */
}
/**
* @brief This function handles DMA2 stream3 global interrupt.
*/
void DMA2_Stream3_IRQHandler(void)
@ -341,20 +310,6 @@ void ETH_IRQHandler(void)
/* USER CODE END ETH_IRQn 1 */
}
/**
* @brief This function handles DMA2 stream6 global interrupt.
*/
void DMA2_Stream6_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream6_IRQn 0 */
/* USER CODE END DMA2_Stream6_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart6_tx);
/* USER CODE BEGIN DMA2_Stream6_IRQn 1 */
/* USER CODE END DMA2_Stream6_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

138
Core/Src/usart.c
View File

@ -26,12 +26,8 @@
UART_HandleTypeDef huart1;
UART_HandleTypeDef huart3;
UART_HandleTypeDef huart6;
DMA_HandleTypeDef hdma_usart1_rx;
DMA_HandleTypeDef hdma_usart3_rx;
DMA_HandleTypeDef hdma_usart3_tx;
DMA_HandleTypeDef hdma_usart6_rx;
DMA_HandleTypeDef hdma_usart6_tx;
/* USART1 init function */
@ -46,7 +42,7 @@ void MX_USART1_UART_Init(void)
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
huart1.Init.BaudRate = 921600;
huart1.Init.BaudRate = 115200;
huart1.Init.WordLength = UART_WORDLENGTH_8B;
huart1.Init.StopBits = UART_STOPBITS_1;
huart1.Init.Parity = UART_PARITY_NONE;
@ -91,35 +87,6 @@ void MX_USART3_UART_Init(void)
/* USER CODE END USART3_Init 2 */
}
/* USART6 init function */
void MX_USART6_UART_Init(void)
{
/* USER CODE BEGIN USART6_Init 0 */
/* USER CODE END USART6_Init 0 */
/* USER CODE BEGIN USART6_Init 1 */
/* USER CODE END USART6_Init 1 */
huart6.Instance = USART6;
huart6.Init.BaudRate = 115200;
huart6.Init.WordLength = UART_WORDLENGTH_8B;
huart6.Init.StopBits = UART_STOPBITS_1;
huart6.Init.Parity = UART_PARITY_NONE;
huart6.Init.Mode = UART_MODE_TX_RX;
huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart6.Init.OverSampling = UART_OVERSAMPLING_16;
if (HAL_UART_Init(&huart6) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USART6_Init 2 */
/* USER CODE END USART6_Init 2 */
}
void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
{
@ -145,25 +112,6 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USART1 DMA Init */
/* USART1_RX Init */
hdma_usart1_rx.Instance = DMA2_Stream2;
hdma_usart1_rx.Init.Channel = DMA_CHANNEL_4;
hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart1_rx.Init.Mode = DMA_NORMAL;
hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart1_rx);
/* USER CODE BEGIN USART1_MspInit 1 */
/* USER CODE END USART1_MspInit 1 */
@ -232,67 +180,6 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
/* USER CODE END USART3_MspInit 1 */
}
else if(uartHandle->Instance==USART6)
{
/* USER CODE BEGIN USART6_MspInit 0 */
/* USER CODE END USART6_MspInit 0 */
/* USART6 clock enable */
__HAL_RCC_USART6_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
/**USART6 GPIO Configuration
PC6 ------> USART6_TX
PC7 ------> USART6_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF8_USART6;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/* USART6 DMA Init */
/* USART6_RX Init */
hdma_usart6_rx.Instance = DMA2_Stream1;
hdma_usart6_rx.Init.Channel = DMA_CHANNEL_5;
hdma_usart6_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_usart6_rx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart6_rx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart6_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart6_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart6_rx.Init.Mode = DMA_NORMAL;
hdma_usart6_rx.Init.Priority = DMA_PRIORITY_LOW;
hdma_usart6_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_usart6_rx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart6_rx);
/* USART6_TX Init */
hdma_usart6_tx.Instance = DMA2_Stream6;
hdma_usart6_tx.Init.Channel = DMA_CHANNEL_5;
hdma_usart6_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_usart6_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart6_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart6_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart6_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart6_tx.Init.Mode = DMA_NORMAL;
hdma_usart6_tx.Init.Priority = DMA_PRIORITY_LOW;
hdma_usart6_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_usart6_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart6_tx);
/* USER CODE BEGIN USART6_MspInit 1 */
/* USER CODE END USART6_MspInit 1 */
}
}
void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
@ -312,8 +199,6 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
/* USART1 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmarx);
/* USER CODE BEGIN USART1_MspDeInit 1 */
/* USER CODE END USART1_MspDeInit 1 */
@ -342,27 +227,6 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
/* USER CODE END USART3_MspDeInit 1 */
}
else if(uartHandle->Instance==USART6)
{
/* USER CODE BEGIN USART6_MspDeInit 0 */
/* USER CODE END USART6_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART6_CLK_DISABLE();
/**USART6 GPIO Configuration
PC6 ------> USART6_TX
PC7 ------> USART6_RX
*/
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_6|GPIO_PIN_7);
/* USART6 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmarx);
HAL_DMA_DeInit(uartHandle->hdmatx);
/* USER CODE BEGIN USART6_MspDeInit 1 */
/* USER CODE END USART6_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */

176
camera_light_src_timing_controller_stm32.ioc
View File

@ -2,84 +2,51 @@
CAD.formats=
CAD.pinconfig=
CAD.provider=
Dma.Request0=USART1_RX
Dma.Request1=SPI1_RX
Dma.Request2=SPI1_TX
Dma.Request3=USART3_RX
Dma.Request4=USART6_RX
Dma.Request5=USART6_TX
Dma.Request6=USART3_TX
Dma.RequestsNb=7
Dma.SPI1_RX.1.Direction=DMA_PERIPH_TO_MEMORY
Dma.SPI1_RX.1.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.SPI1_RX.1.Instance=DMA2_Stream0
Dma.SPI1_RX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.SPI1_RX.1.MemInc=DMA_MINC_ENABLE
Dma.SPI1_RX.1.Mode=DMA_NORMAL
Dma.SPI1_RX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.SPI1_RX.1.PeriphInc=DMA_PINC_DISABLE
Dma.SPI1_RX.1.Priority=DMA_PRIORITY_LOW
Dma.SPI1_RX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.SPI1_TX.2.Direction=DMA_MEMORY_TO_PERIPH
Dma.SPI1_TX.2.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.SPI1_TX.2.Instance=DMA2_Stream3
Dma.SPI1_TX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.SPI1_TX.2.MemInc=DMA_MINC_ENABLE
Dma.SPI1_TX.2.Mode=DMA_NORMAL
Dma.SPI1_TX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.SPI1_TX.2.PeriphInc=DMA_PINC_DISABLE
Dma.SPI1_TX.2.Priority=DMA_PRIORITY_LOW
Dma.SPI1_TX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART1_RX.0.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART1_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART1_RX.0.Instance=DMA2_Stream2
Dma.USART1_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART1_RX.0.MemInc=DMA_MINC_ENABLE
Dma.USART1_RX.0.Mode=DMA_NORMAL
Dma.USART1_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART1_RX.0.PeriphInc=DMA_PINC_DISABLE
Dma.USART1_RX.0.Priority=DMA_PRIORITY_LOW
Dma.USART1_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART3_RX.3.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART3_RX.3.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART3_RX.3.Instance=DMA1_Stream1
Dma.USART3_RX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART3_RX.3.MemInc=DMA_MINC_ENABLE
Dma.USART3_RX.3.Mode=DMA_NORMAL
Dma.USART3_RX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART3_RX.3.PeriphInc=DMA_PINC_DISABLE
Dma.USART3_RX.3.Priority=DMA_PRIORITY_LOW
Dma.USART3_RX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART3_TX.6.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART3_TX.6.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART3_TX.6.Instance=DMA1_Stream3
Dma.USART3_TX.6.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART3_TX.6.MemInc=DMA_MINC_ENABLE
Dma.USART3_TX.6.Mode=DMA_NORMAL
Dma.USART3_TX.6.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART3_TX.6.PeriphInc=DMA_PINC_DISABLE
Dma.USART3_TX.6.Priority=DMA_PRIORITY_LOW
Dma.USART3_TX.6.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART6_RX.4.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART6_RX.4.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART6_RX.4.Instance=DMA2_Stream1
Dma.USART6_RX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART6_RX.4.MemInc=DMA_MINC_ENABLE
Dma.USART6_RX.4.Mode=DMA_NORMAL
Dma.USART6_RX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART6_RX.4.PeriphInc=DMA_PINC_DISABLE
Dma.USART6_RX.4.Priority=DMA_PRIORITY_LOW
Dma.USART6_RX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART6_TX.5.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART6_TX.5.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART6_TX.5.Instance=DMA2_Stream6
Dma.USART6_TX.5.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART6_TX.5.MemInc=DMA_MINC_ENABLE
Dma.USART6_TX.5.Mode=DMA_NORMAL
Dma.USART6_TX.5.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART6_TX.5.PeriphInc=DMA_PINC_DISABLE
Dma.USART6_TX.5.Priority=DMA_PRIORITY_LOW
Dma.USART6_TX.5.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.Request0=SPI1_RX
Dma.Request1=SPI1_TX
Dma.Request2=USART3_RX
Dma.Request3=USART3_TX
Dma.RequestsNb=4
Dma.SPI1_RX.0.Direction=DMA_PERIPH_TO_MEMORY
Dma.SPI1_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.SPI1_RX.0.Instance=DMA2_Stream0
Dma.SPI1_RX.0.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.SPI1_RX.0.MemInc=DMA_MINC_ENABLE
Dma.SPI1_RX.0.Mode=DMA_NORMAL
Dma.SPI1_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.SPI1_RX.0.PeriphInc=DMA_PINC_DISABLE
Dma.SPI1_RX.0.Priority=DMA_PRIORITY_LOW
Dma.SPI1_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.SPI1_TX.1.Direction=DMA_MEMORY_TO_PERIPH
Dma.SPI1_TX.1.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.SPI1_TX.1.Instance=DMA2_Stream3
Dma.SPI1_TX.1.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.SPI1_TX.1.MemInc=DMA_MINC_ENABLE
Dma.SPI1_TX.1.Mode=DMA_NORMAL
Dma.SPI1_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.SPI1_TX.1.PeriphInc=DMA_PINC_DISABLE
Dma.SPI1_TX.1.Priority=DMA_PRIORITY_LOW
Dma.SPI1_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART3_RX.2.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART3_RX.2.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART3_RX.2.Instance=DMA1_Stream1
Dma.USART3_RX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART3_RX.2.MemInc=DMA_MINC_ENABLE
Dma.USART3_RX.2.Mode=DMA_NORMAL
Dma.USART3_RX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART3_RX.2.PeriphInc=DMA_PINC_DISABLE
Dma.USART3_RX.2.Priority=DMA_PRIORITY_LOW
Dma.USART3_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART3_TX.3.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART3_TX.3.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART3_TX.3.Instance=DMA1_Stream3
Dma.USART3_TX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART3_TX.3.MemInc=DMA_MINC_ENABLE
Dma.USART3_TX.3.Mode=DMA_NORMAL
Dma.USART3_TX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART3_TX.3.PeriphInc=DMA_PINC_DISABLE
Dma.USART3_TX.3.Priority=DMA_PRIORITY_LOW
Dma.USART3_TX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
ETH.IPParameters=MediaInterface,RxBuffLen,RxMode,PHY_Name_RMII,PHY_User_Name,PHY_SR,PHY_SPEED_STATUS,PHY_DUPLEX_STATUS,MACAddr
ETH.MACAddr=00\:80\:E1\:00\:00\:01
ETH.MediaInterface=HAL_ETH_RMII_MODE
@ -133,7 +100,6 @@ Mcu.IP12=TIM6
Mcu.IP13=TIM7
Mcu.IP14=USART1
Mcu.IP15=USART3
Mcu.IP16=USART6
Mcu.IP2=ETH
Mcu.IP3=FREERTOS
Mcu.IP4=LWIP
@ -142,7 +108,7 @@ Mcu.IP6=RCC
Mcu.IP7=RNG
Mcu.IP8=SPI1
Mcu.IP9=SYS
Mcu.IPNb=17
Mcu.IPNb=16
Mcu.Name=STM32F407V(E-G)Tx
Mcu.Package=LQFP100
Mcu.Pin0=PH0-OSC_IN
@ -151,34 +117,32 @@ Mcu.Pin10=PC5
Mcu.Pin11=PB11
Mcu.Pin12=PB12
Mcu.Pin13=PB13
Mcu.Pin14=PC6
Mcu.Pin15=PC7
Mcu.Pin16=PA9
Mcu.Pin17=PA10
Mcu.Pin18=PA13
Mcu.Pin19=PA14
Mcu.Pin14=PA9
Mcu.Pin15=PA10
Mcu.Pin16=PA13
Mcu.Pin17=PA14
Mcu.Pin18=PC10
Mcu.Pin19=PC11
Mcu.Pin2=PC1
Mcu.Pin20=PC10
Mcu.Pin21=PC11
Mcu.Pin22=PD3
Mcu.Pin23=PB5
Mcu.Pin24=VP_CRC_VS_CRC
Mcu.Pin25=VP_FREERTOS_VS_CMSIS_V1
Mcu.Pin26=VP_LWIP_VS_Enabled
Mcu.Pin27=VP_RNG_VS_RNG
Mcu.Pin28=VP_SYS_VS_tim11
Mcu.Pin29=VP_TIM1_VS_ClockSourceINT
Mcu.Pin20=PD3
Mcu.Pin21=PB5
Mcu.Pin22=VP_CRC_VS_CRC
Mcu.Pin23=VP_FREERTOS_VS_CMSIS_V1
Mcu.Pin24=VP_LWIP_VS_Enabled
Mcu.Pin25=VP_RNG_VS_RNG
Mcu.Pin26=VP_SYS_VS_tim11
Mcu.Pin27=VP_TIM1_VS_ClockSourceINT
Mcu.Pin28=VP_TIM3_VS_ClockSourceINT
Mcu.Pin29=VP_TIM6_VS_ClockSourceINT
Mcu.Pin3=PA1
Mcu.Pin30=VP_TIM3_VS_ClockSourceINT
Mcu.Pin31=VP_TIM6_VS_ClockSourceINT
Mcu.Pin32=VP_TIM7_VS_ClockSourceINT
Mcu.Pin30=VP_TIM7_VS_ClockSourceINT
Mcu.Pin4=PA2
Mcu.Pin5=PA4
Mcu.Pin6=PA5
Mcu.Pin7=PA6
Mcu.Pin8=PA7
Mcu.Pin9=PC4
Mcu.PinsNb=33
Mcu.PinsNb=31
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F407VETx
@ -188,10 +152,7 @@ NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA2_Stream0_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA2_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA2_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA2_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA2_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
NVIC.ETH_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.ForceEnableDMAVector=true
@ -254,10 +215,6 @@ PC4.Mode=RMII
PC4.Signal=ETH_RXD0
PC5.Mode=RMII
PC5.Signal=ETH_RXD1
PC6.Mode=Asynchronous
PC6.Signal=USART6_TX
PC7.Mode=Asynchronous
PC7.Signal=USART6_RX
PD3.Locked=true
PD3.Signal=GPIO_Output
PH0-OSC_IN.Mode=HSE-External-Oscillator
@ -356,13 +313,10 @@ TIM6.IPParameters=Prescaler
TIM6.Prescaler=71
TIM7.IPParameters=Prescaler
TIM7.Prescaler=81
USART1.BaudRate=921600
USART1.IPParameters=VirtualMode,BaudRate
USART1.IPParameters=VirtualMode
USART1.VirtualMode=VM_ASYNC
USART3.IPParameters=VirtualMode
USART3.VirtualMode=VM_ASYNC
USART6.IPParameters=VirtualMode
USART6.VirtualMode=VM_ASYNC
VP_CRC_VS_CRC.Mode=CRC_Activate
VP_CRC_VS_CRC.Signal=CRC_VS_CRC
VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1

50
usrc/base_service/fpga_if.c
View File

@ -1,5 +1,6 @@
#include "fpga_if.h"
/**
* @brief fpga_if初始化
*/
@ -8,6 +9,34 @@ static fpga_if_t fpga_if;
zaf_gpio_t spi_cs;
SemaphoreHandle_t m_spilock;
#define CHECK_PIN(pin0, pin1) \
{ \
zaf_gpio_write(&pin0, false); \
bool readbak = zaf_gpio_read(&pin1); \
if (readbak != false) { \
ZLOGI(TAG, "pin %s %s error", #pin0, #pin1); \
} \
osDelay(1); \
zaf_gpio_write(&pin0, true); \
readbak = zaf_gpio_read(&pin1); \
if (readbak != true) { \
ZLOGI(TAG, "pin %s %s error", #pin0, #pin1); \
} \
}
// void fpga_test() {
// while (true) {
// CHECK_PIN(fpga_if.fpga_reserve_iob0, fpga_if.fpga_reserve_ioa0);
// CHECK_PIN(fpga_if.fpga_reserve_iob1, fpga_if.fpga_reserve_ioa1);
// CHECK_PIN(fpga_if.fpga_reserve_iob2, fpga_if.fpga_reserve_ioa2);
// CHECK_PIN(fpga_if.fpga_reserve_iob3, fpga_if.fpga_reserve_ioa3);
// CHECK_PIN(fpga_if.fpga_reserve_iob4, fpga_if.fpga_reserve_ioa4);
// CHECK_PIN(fpga_if.fpga_reserve_iob5, fpga_if.fpga_reserve_ioa5);
// CHECK_PIN(fpga_if.fpga_reserve_iob6, fpga_if.fpga_reserve_ioa6);
// CHECK_PIN(fpga_if.fpga_reserve_iob7, fpga_if.fpga_reserve_ioa7);
// }
// }
void fpga_if_init() { //
uint8_t rxbuf[1];
m_spilock = xSemaphoreCreateRecursiveMutex();
@ -21,15 +50,14 @@ void fpga_if_init() { //
HAL_SPI_Receive(fpga_if.spi1, rxbuf, 1, 1000);
//! ioa0 临时用于当作复位引脚
zaf_gpio_init_as_output(&fpga_if.fpga_reserve_ioa0, FPGA_RESERVE_IOA0, kxs_gpio_od, false, false);
zaf_gpio_init_as_output(&fpga_if.fpga_reserve_ioa1, FPGA_RESERVE_IOA1, kxs_gpio_od, false, false);
zaf_gpio_init_as_output(&fpga_if.fpga_reserve_ioa2, FPGA_RESERVE_IOA2, kxs_gpio_od, false, false);
zaf_gpio_init_as_output(&fpga_if.fpga_reserve_ioa3, FPGA_RESERVE_IOA3, kxs_gpio_od, false, false);
zaf_gpio_init_as_output(&fpga_if.fpga_reserve_ioa4, FPGA_RESERVE_IOA4, kxs_gpio_od, false, false);
zaf_gpio_init_as_output(&fpga_if.fpga_reserve_ioa5, FPGA_RESERVE_IOA5, kxs_gpio_od, false, false);
zaf_gpio_init_as_output(&fpga_if.fpga_reserve_ioa6, FPGA_RESERVE_IOA6, kxs_gpio_od, false, false);
zaf_gpio_init_as_output(&fpga_if.fpga_reserve_ioa7, FPGA_RESERVE_IOA7, kxs_gpio_od, false, false);
zaf_gpio_init_as_input(&fpga_if.fpga_reserve_ioa0, FPGA_RESERVE_IOA0, kxs_gpio_nopull, kxs_gpio_no_irq, false);
zaf_gpio_init_as_input(&fpga_if.fpga_reserve_ioa1, FPGA_RESERVE_IOA1, kxs_gpio_nopull, kxs_gpio_no_irq, false);
zaf_gpio_init_as_input(&fpga_if.fpga_reserve_ioa2, FPGA_RESERVE_IOA2, kxs_gpio_nopull, kxs_gpio_no_irq, false);
zaf_gpio_init_as_input(&fpga_if.fpga_reserve_ioa3, FPGA_RESERVE_IOA3, kxs_gpio_nopull, kxs_gpio_no_irq, false);
zaf_gpio_init_as_input(&fpga_if.fpga_reserve_ioa4, FPGA_RESERVE_IOA4, kxs_gpio_nopull, kxs_gpio_no_irq, false);
zaf_gpio_init_as_input(&fpga_if.fpga_reserve_ioa5, FPGA_RESERVE_IOA5, kxs_gpio_nopull, kxs_gpio_no_irq, false);
zaf_gpio_init_as_input(&fpga_if.fpga_reserve_ioa6, FPGA_RESERVE_IOA6, kxs_gpio_nopull, kxs_gpio_no_irq, false);
zaf_gpio_init_as_input(&fpga_if.fpga_reserve_ioa7, FPGA_RESERVE_IOA7, kxs_gpio_nopull, kxs_gpio_no_irq, false);
zaf_gpio_init_as_output(&fpga_if.fpga_reserve_iob0, FPGA_RESERVE_IOB0, kxs_gpio_od, false, false);
zaf_gpio_init_as_output(&fpga_if.fpga_reserve_iob1, FPGA_RESERVE_IOB1, kxs_gpio_od, false, false);
zaf_gpio_init_as_output(&fpga_if.fpga_reserve_iob2, FPGA_RESERVE_IOB2, kxs_gpio_od, false, false);
@ -40,9 +68,9 @@ void fpga_if_init() { //
zaf_gpio_init_as_output(&fpga_if.fpga_reserve_iob7, FPGA_RESERVE_IOB7, kxs_gpio_od, false, false);
#if 1
zaf_gpio_write(&fpga_if.fpga_reserve_ioa0, false);
zaf_gpio_write(&fpga_if.fpga_reserve_iob0, false);
zaf_delay_us(1);
zaf_gpio_write(&fpga_if.fpga_reserve_ioa0, true);
zaf_gpio_write(&fpga_if.fpga_reserve_iob0, true);
#endif
}

39
usrc/main.cpp
View File

@ -35,8 +35,26 @@ void StartDefaultTask(void const* argument) { umain(); }
zaf_gpio_t m_debug_led;
zaf_gpio_t m_factory_reset_key;
zaf_gpio_t m_fan0_power;
zaf_gpio_t m_fan1_power;
zaf_gpio_t m_fan0_state;
zaf_gpio_t m_fan1_state;
static uint32_t m_fan0_cnt;
static uint32_t m_fan1_cnt;
extern "C" {
void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) {}
void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) {
if (GPIO_Pin == m_fan0_state.pin) {
m_fan0_cnt++;
}
else if (GPIO_Pin == m_fan1_state.pin) {
m_fan1_cnt++;
}
}
}
void debug_light_ctrl() {
@ -92,6 +110,9 @@ void umain() {
ZLOGI(TAG, "%s:%d", PC_PROJECT_NAME, PC_VERSION);
ZLOGI(TAG, "sn: %x:%x:%x", sn.sn0, sn.sn1, sn.sn2);
LightCtrlService_init();
LightCtrlService_GreenLight_setState(true);
/**
* @brief
* 1. 初始化调试指示灯
@ -126,7 +147,7 @@ void umain() {
*
* 解析并处理外部指令
*/
osDelay(1000);
osDelay(10);
config_t* config = config_get();
for (uint32_t i = 0; i < ZARRAY_SIZE(config->reg_config_storage); i++) {
@ -139,13 +160,27 @@ void umain() {
extern_if_service_init();
zaf_gpio_init_as_output(&m_fan0_power, PD0, kxs_gpio_pullup, false, true);
zaf_gpio_init_as_output(&m_fan1_power, PD1, kxs_gpio_pullup, false, true);
zaf_gpio_init_as_input(&m_fan0_state, PD5, kxs_gpio_pullup, kxs_gpio_rising_irq, false);
zaf_gpio_init_as_input(&m_fan1_state, PD6, kxs_gpio_pullup, kxs_gpio_rising_irq, false);
ZLOGI(TAG, "system init done");
int32_t count = 0;
while (true) {
osDelay(10);
count++;
debug_light_ctrl();
if (FACTORY_RESET_KEY != PinNull) {
factory_reset_key_detect();
}
if (count % 100 == 0) {
ZLOGI(TAG, "fan0:%d, fan1:%d", m_fan0_cnt, m_fan1_cnt);
}
}
}
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