diff --git a/.vscode/settings.json b/.vscode/settings.json index a781f04..ff9b770 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -76,6 +76,7 @@ "ble_types.h": "c", "ble_db_discovery.h": "c", "ble_gatt_db.h": "c", - "nrf_ble_gq.h": "c" + "nrf_ble_gq.h": "c", + "ti_ads1293_register_settings.h": "c" } } \ No newline at end of file diff --git a/app/main.c b/app/main.c index 62ba327..d9aefdf 100644 --- a/app/main.c +++ b/app/main.c @@ -380,12 +380,24 @@ static void test_tx_timer_cb(void* p_context) { data++; uint16_t val; ThreeLeadECG_ads1293_get_lod_state(&val); - +#if 0 uint32_t sample0; uint32_t sample1; uint32_t sample2; ThreeLeadECG_ads1293_sample(&sample0, &sample1, &sample2); zdatachanel_send_log("%d,%d,%d\n", sample0, sample1, sample2); +#endif + + uint32_t sample0; + uint32_t sample1; + uint32_t sample2; + uint32_t sample10; + uint32_t sample11; + uint32_t sample12; + + ThreeLeadECG_ads1293_sample_all(&sample0, &sample1, &sample2, &sample10, &sample11, &sample12); + + zdatachanel_send_log("%d,%d,%d,%d,%d,%d\n", sample0, sample1, sample2, sample10, sample11, sample12); // zdatachanel_send_log("%d,%d,%d\n", data, data, data); // zdatachanel_send_log("%d %d %s\n", ThreeLeadECG_ready_pin_state_get(), ThreeLeadECG_LineInputDet_get_state(), dumplodstate(val)); diff --git a/app/src/three_lead/TI_ADS1293_register_settings.h b/app/src/three_lead/TI_ADS1293_register_settings.h new file mode 100644 index 0000000..e95e613 --- /dev/null +++ b/app/src/three_lead/TI_ADS1293_register_settings.h @@ -0,0 +1,101 @@ +//---------------------------------------------------------------------------- +// Description: This file contains the initialization values for the +// ADS1293 registers. +// +// MSP430/ADS1293 Interface Code Library v1.0 +// +// Vishy Natarajan +// Texas Instruments Inc. +// April 2013 +// Built with IAR Embedded Workbench Version: 5.5x +//------------------------------------------------------------------------------ +// Change Log: +//------------------------------------------------------------------------------ +// Version: 1.00 +// Comments: Initial Release Version +//------------------------------------------------------------------------------ +#ifndef HEADER_FILE_TI_ADS1293_REGISTER_SETTINGS_H + +#define HEADER_FILE_TI_ADS1293_REGISTER_SETTINGS_H + +/************************************************************ +* TI ADS1293 REGISTER SET INITIALIZATION VALUES +************************************************************/ + +#define TI_ADS1293_CONFIG_REG_VALUE (0x00) /* Main Configuration */ + +#define TI_ADS1293_FLEX_CH1_CN_REG_VALUE (0x0A) /* Flex Routing Swich Control for Channel 1 */ +#define TI_ADS1293_FLEX_CH2_CN_REG_VALUE (0x1A) /* Flex Routing Swich Control for Channel 2 */ +#define TI_ADS1293_FLEX_CH3_CN_REG_VALUE (0x00) /* Flex Routing Swich Control for Channel 3 */ +#define TI_ADS1293_FLEX_PACE_CN_REG_VALUE (0x00) /* Flex Routing Swich Control for Pace Channel */ +#define TI_ADS1293_FLEX_VBAT_CN_REG_VALUE (0x00) /* Flex Routing Swich Control for Battery Monitoriing */ + +#define TI_ADS1293_LOD_CN_REG_VALUE (0x08) /* Lead Off Detect Control */ +#define TI_ADS1293_LOD_EN_REG_VALUE (0x00) /* Lead Off Detect Enable */ +#define TI_ADS1293_LOD_CURRENT_REG_VALUE (0x00) /* Lead Off Detect Current */ +#define TI_ADS1293_LOD_AC_CN_REG_VALUE (0x00) /* AC Lead Off Detect Current */ + +#define TI_ADS1293_CMDET_EN_REG_VALUE (0x07) /* Common Mode Detect Enable */ +#define TI_ADS1293_CMDET_CN_REG_VALUE (0x00) /* Commond Mode Detect Control */ +#define TI_ADS1293_RLD_CN_REG_VALUE (0x04) /* Right Leg Drive Control */ + +#define TI_ADS1293_WILSON_EN1_REG_VALUE (0x00) /* Wilson Reference Input one Selection */ +#define TI_ADS1293_WILSON_EN2_REG_VALUE (0x00) /* Wilson Reference Input two Selection */ +#define TI_ADS1293_WILSON_EN3_REG_VALUE (0x00) /* Wilson Reference Input three Selection */ +#define TI_ADS1293_WILSON_CN_REG_VALUE (0x00) /* Wilson Reference Input Control */ + +#define TI_ADS1293_REF_CN_REG_VALUE (0x00) /* Internal Reference Voltage Control */ + +#define TI_ADS1293_OSC_CN_REG_VALUE (0x04) /* Clock Source and Output Clock Control */ + +#define TI_ADS1293_AFE_RES_REG_VALUE (0x00) /* Analog Front-End Frequency and Resolution */ +#define TI_ADS1293_AFE_SHDN_CN_REG_VALUE (0x00) /* Analog Front-End Shutdown Control */ +#define TI_ADS1293_AFE_FAULT_CN_REG_VALUE (0x00) /* Analog Front-End Fault Detection Control */ +#define TI_ADS1293_AFE_DITHER_EN_REG_VALUE (0x00) /* Enable Dithering in Signma-Delta */ +#define TI_ADS1293_AFE_PACE_CN_REG_VALUE (0x05) /* Analog Pace Channel Output Routing Control */ + +//#define TI_ADS1293_ERROR_LOD_REG_VALUE (0x00) /* Lead Off Detect Error Status */ +//#define TI_ADS1293_ERROR_STATUS_REG_VALUE (0x72) /* Other Error Status */ +//#define TI_ADS1293_ERROR_RANGE1_REG_VALUE (0x12) /* Channel 1 Amplifier Out of Range Status */ +//#define TI_ADS1293_ERROR_RANGE2_REG_VALUE (0x12) /* Channel 1 Amplifier Out of Range Status */ +//#define TI_ADS1293_ERROR_RANGE3_REG_VALUE (0x36) /* Channel 1 Amplifier Out of Range Status */ +//#define TI_ADS1293_ERROR_SYNC_REG_VALUE (0x00) /* Synchronization Error */ + + +#define TI_ADS1293_R2_RATE_REG_VALUE (0x02) /* R2 Decimation Rate */ +#define TI_ADS1293_R3_RATE1_REG_VALUE (0x02) /* R3 Decimation Rate for Channel 1 */ +#define TI_ADS1293_R3_RATE2_REG_VALUE (0x02) /* R3 Decimation Rate for Channel 2 */ +#define TI_ADS1293_R3_RATE3_REG_VALUE (0x02) /* R3 Decimation Rate for Channel 3 */ +#define TI_ADS1293_P_DRATE_REG_VALUE (0x00) /* 2x Pace Data Rate for all channels */ +#define TI_ADS1293_DIS_EFILTER_REG_VALUE (0x00) /* ECG Filters Disabled */ +#define TI_ADS1293_DRDYB_SRC_REG_VALUE (0x08) /* Data Ready Pin Source */ +#define TI_ADS1293_SYNCOUTB_SRC_REG_VALUE (0x00) /* Sync Out Pin Source */ +#define TI_ADS1293_MASK_DRDYB_REG_VALUE (0x00) /* Optional Mask Control for DRDYB Output */ +#define TI_ADS1293_MASK_ERR_REG_VALUE (0x00) /* Mask Error on ALARMB Pin */ + +#define TI_ADS1293_ALARM_FILTER_REG_VALUE (0x33) /* Digital Filter for Analog Alarm Signals */ +#define TI_ADS1293_CH_CNFG_REG_VALUE (0x30) /* Configure Channel for Loop Read Back Mode */ + +//#define TI_ADS1293_DATA_STATUS_REG_VALUE (0x00) /* ECG and Pace Data Ready Status */ +//#define TI_ADS1293_DATA_CH1_PACE_H_REG_VALUE (0x00) /* Channel1 Pace Data High [15:8] */ +//#define TI_ADS1293_DATA_CH1_PACE_L_REG_VALUE (0x00) /* Channel1 Pace Data Low [7:0] */ +//#define TI_ADS1293_DATA_CH2_PACE_H_REG_VALUE (0x00) /* Channel2 Pace Data High [15:8] */ +//#define TI_ADS1293_DATA_CH2_PACE_L_REG_VALUE (0x00) /* Channel2 Pace Data Low [7:0] */ +//#define TI_ADS1293_DATA_CH3_PACE_H_REG_VALUE (0x00) /* Channel3 Pace Data High [15:8] */ +//#define TI_ADS1293_DATA_CH3_PACE_L_REG_VALUE (0x00) /* Channel3 Pace Data Low [7:0] */ +//#define TI_ADS1293_DATA_CH1_ECG_H_REG_VALUE (0x00) /* Channel1 ECG Data High [23:16] */ +//#define TI_ADS1293_DATA_CH1_ECG_M_REG_VALUE (0x00) /* Channel1 ECG Data Medium [15:8] */ +//#define TI_ADS1293_DATA_CH1_ECG_L_REG_VALUE (0x00) /* Channel1 ECG Data Low [7:0] */ +//#define TI_ADS1293_DATA_CH2_ECG_H_REG_VALUE (0x00) /* Channel2 ECG Data High [23:16] */ +//#define TI_ADS1293_DATA_CH2_ECG_M_REG_VALUE (0x00) /* Channel2 ECG Data Medium [15:8] */ +//#define TI_ADS1293_DATA_CH2_ECG_L_REG_VALUE (0x00) /* Channel2 ECG Data Low [7:0] */ +//#define TI_ADS1293_DATA_CH3_ECG_H_REG_VALUE (0x00) /* Channel3 ECG Data High [23:16] */ +//#define TI_ADS1293_DATA_CH3_ECG_M_REG_VALUE (0x00) /* Channel3 ECG Data Medium [15:8] */ +//#define TI_ADS1293_DATA_CH3_ECG_L_REG_VALUE (0x00) /* Channel3 ECG Data Low [7:0] */ + +#define TI_ADS1293_REVID_REG_VALUE (0x40) /* Revision ID */ +#define TI_ADS1293_DATA_LOOP_REG_VALUE (0x50) /* Loop Read Back Address */ + +// Useful definitions +#define ADS1293_START_CONV (0x01) // Start Conversion Bit +#endif \ No newline at end of file diff --git a/app/src/three_lead/ads_cfg.h b/app/src/three_lead/ads_cfg.h index 64c2b69..1ca8e33 100644 --- a/app/src/three_lead/ads_cfg.h +++ b/app/src/three_lead/ads_cfg.h @@ -5,7 +5,7 @@ typedef struct { uint8_t add; uint8_t data; } adscfg_t; - +#if 1 static adscfg_t ads0cfg[] = { {0x00, 0x00}, // {0x01, 0x0a}, // @@ -145,4 +145,5 @@ static adscfg_t ads1cfg[] = { {0x60, 0x00}, // {0x62, 0x00}, // -}; \ No newline at end of file +}; +#endif \ No newline at end of file diff --git a/app/src/three_lead/three_lead_board.c b/app/src/three_lead/three_lead_board.c index c0f3e39..4e66fec 100644 --- a/app/src/three_lead/three_lead_board.c +++ b/app/src/three_lead/three_lead_board.c @@ -416,6 +416,7 @@ void ads1293_spi_writereg_and_check(ads1293_t* ads, uint8_t addr, uint8_t data) } } #include "ads_cfg.h" +#include "TI_ADS1293_register_settings.h" void ThreeLeadECG_ecg_reg_config() { for (uint16_t i = 0; i < ZARRAY_SIZE(ads0cfg); i++) { ads1293_spi_writereg_and_check(&m_ads1293_0, ads0cfg[i].add, ads0cfg[i].data); @@ -423,6 +424,46 @@ void ThreeLeadECG_ecg_reg_config() { for (uint16_t i = 0; i < ZARRAY_SIZE(ads1cfg); i++) { ads1293_spi_writereg_and_check(&m_ads1293_1, ads1cfg[i].add, ads1cfg[i].data); } + + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_CONFIG_REG, TI_ADS1293_CONFIG_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_FLEX_CH1_CN_REG, TI_ADS1293_FLEX_CH1_CN_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_FLEX_CH2_CN_REG, TI_ADS1293_FLEX_CH2_CN_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_FLEX_CH3_CN_REG, TI_ADS1293_FLEX_CH3_CN_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_FLEX_PACE_CN_REG, TI_ADS1293_FLEX_PACE_CN_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_FLEX_VBAT_CN_REG, TI_ADS1293_FLEX_VBAT_CN_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_LOD_CN_REG, TI_ADS1293_LOD_CN_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_LOD_EN_REG, TI_ADS1293_LOD_EN_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_LOD_CURRENT_REG, TI_ADS1293_LOD_CURRENT_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_LOD_AC_CN_REG, TI_ADS1293_LOD_AC_CN_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_CMDET_EN_REG, TI_ADS1293_CMDET_EN_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_CMDET_CN_REG, TI_ADS1293_CMDET_CN_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_RLD_CN_REG, TI_ADS1293_RLD_CN_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_WILSON_EN1_REG, TI_ADS1293_WILSON_EN1_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_WILSON_EN2_REG, TI_ADS1293_WILSON_EN2_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_WILSON_EN3_REG, TI_ADS1293_WILSON_EN3_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_WILSON_CN_REG, TI_ADS1293_WILSON_CN_REG_VALUE); + + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_REF_CN_REG, TI_ADS1293_REF_CN_REG_VALUE); + + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_OSC_CN_REG, TI_ADS1293_OSC_CN_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_AFE_RES_REG, TI_ADS1293_AFE_RES_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_AFE_SHDN_CN_REG, TI_ADS1293_AFE_SHDN_CN_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_AFE_FAULT_CN_REG, TI_ADS1293_AFE_FAULT_CN_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_AFE_DITHER_EN_REG, TI_ADS1293_AFE_DITHER_EN_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_AFE_PACE_CN_REG, TI_ADS1293_AFE_PACE_CN_REG_VALUE); + + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_R2_RATE_REG, TI_ADS1293_R2_RATE_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_R3_RATE1_REG, TI_ADS1293_R3_RATE1_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_R3_RATE2_REG, TI_ADS1293_R3_RATE2_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_R3_RATE3_REG, TI_ADS1293_R3_RATE3_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_P_DRATE_REG, TI_ADS1293_P_DRATE_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_DIS_EFILTER_REG, TI_ADS1293_DIS_EFILTER_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_DRDYB_SRC_REG, TI_ADS1293_DRDYB_SRC_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_SYNCOUTB_SRC_REG, TI_ADS1293_SYNCOUTB_SRC_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_MASK_DRDYB_REG, TI_ADS1293_MASK_DRDYB_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_MASK_ERR_REG, TI_ADS1293_MASK_ERR_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_ALARM_FILTER_REG, TI_ADS1293_ALARM_FILTER_REG_VALUE); + // ads1293_spi_writereg_and_check(&m_ads1293_1,TI_ADS1293_CH_CNFG_REG, TI_ADS1293_CH_CNFG_REG_VALUE); } void ThreeLeadECG_ads1293_start_convert() { @@ -470,9 +511,19 @@ uint32_t ThreeLeadECG_ads1293_init() {} void ThreeLeadECG_ads1293_get_lod_state(uint16_t* state) { // uint8_t lod0 = ads1293_read_error_lod(&m_ads1293_0); uint8_t lod1 = ads1293_read_error_lod(&m_ads1293_1); - *state = (lod0) | (lod1<<8); + *state = (lod0) | (lod1 << 8); } +void ThreeLeadECG_ads1293_sample_all(uint32_t* sample0, uint32_t* sample1, uint32_t* sample2, uint32_t* sample10, uint32_t* sample11, uint32_t* sample12) { + // *sample0 + ads1293_read_ecg(&m_ads1293_0, 1, sample0); + ads1293_read_ecg(&m_ads1293_0, 2, sample1); + ads1293_read_ecg(&m_ads1293_0, 3, sample2); + // *sample1 + ads1293_read_ecg(&m_ads1293_1, 1, sample10); + ads1293_read_ecg(&m_ads1293_1, 2, sample11); + ads1293_read_ecg(&m_ads1293_1, 3, sample12); +} void ThreeLeadECG_ads1293_sample(uint32_t* sample0, uint32_t* sample1, uint32_t* sample2) { // *sample0 ads1293_read_ecg(&m_ads1293_0, 1, sample0); diff --git a/app/src/three_lead/three_lead_board.h b/app/src/three_lead/three_lead_board.h index 4f2bd91..f365ce2 100644 --- a/app/src/three_lead/three_lead_board.h +++ b/app/src/three_lead/three_lead_board.h @@ -52,4 +52,5 @@ void ThreeLeadECG_ads1293_get_lod_state(uint16_t* state); // void ThreeLeadECG_LineInputDet_init(); uint32_t ThreeLeadECG_LineInputDet_get_state(); -void ThreeLeadECG_ads1293_sample(uint32_t* sample0, uint32_t* sample1, uint32_t* sample2); \ No newline at end of file +void ThreeLeadECG_ads1293_sample(uint32_t* sample0, uint32_t* sample1, uint32_t* sample2); +void ThreeLeadECG_ads1293_sample_all(uint32_t* sample0, uint32_t* sample1, uint32_t* sample2, uint32_t* sample10, uint32_t* sample11, uint32_t* sample12); \ No newline at end of file