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350 lines
13 KiB
350 lines
13 KiB
#include "board.h"
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#include "app_timer.h"
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#include "nrf_gpio.h"
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#include "znordic.h"
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//
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#include "diskio_blkdev.h"
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#include "ff.h"
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#include "nrf_block_dev_sdc.h"
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#include "nrf_delay.h"
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#include "nrf_drv_pwm.h"
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#include "nrf_drv_wdt.h"
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static int16_t adc_channel_read_val(uint16_t channel) {
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nrf_saadc_value_t value;
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ret_code_t err_code;
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err_code = nrfx_saadc_sample_convert(channel, &value);
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if (err_code != NRF_SUCCESS) {
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ZLOGE("nrfx_saadc_sample_convert(%d) fail err_code:%d", channel, err_code);
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return 0;
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}
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return value;
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}
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/*******************************************************************************
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* DEBUG_LIGHT *
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*******************************************************************************/
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APP_TIMER_DEF(m_debug_light_tmr);
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static int32_t m_debug_light_io_index;
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static void debug_light_tmr_cb_handler(void* p_context) {
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static bool state = false;
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if (state) {
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nrf_gpio_pin_set(m_debug_light_io_index);
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} else {
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nrf_gpio_pin_clear(m_debug_light_io_index);
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}
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state = !state;
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}
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void debug_light_init(int io_index) {
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m_debug_light_io_index = io_index;
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nrf_gpio_cfg(m_debug_light_io_index, //
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NRF_GPIO_PIN_DIR_OUTPUT, //
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NRF_GPIO_PIN_INPUT_DISCONNECT, //
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NRF_GPIO_PIN_PULLUP, //
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NRF_GPIO_PIN_S0S1, //
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NRF_GPIO_PIN_NOSENSE);
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ret_code_t err_code;
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err_code = app_timer_create(&m_debug_light_tmr, APP_TIMER_MODE_REPEATED, debug_light_tmr_cb_handler);
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APP_ERROR_CHECK(err_code);
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app_timer_start(m_debug_light_tmr, APP_TIMER_TICKS(100), NULL);
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}
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/*******************************************************************************
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* zbsp_enter_sleep *
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*******************************************************************************/
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APP_TIMER_DEF(enter_sleep_mode_tmr);
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static int32_t m_wakeup_io_index;
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static bool m_wakeup_io_mirror;
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static void enter_sleep_tmr_cb(void* p_context) {
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ZLOGI("enter sleep mode, wakeup io index: %d", m_wakeup_io_index);
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if (m_wakeup_io_mirror) {
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nrf_gpio_cfg_sense_input(m_wakeup_io_index, NRF_GPIO_PIN_PULLUP, NRF_GPIO_PIN_SENSE_LOW);
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nrf_gpio_cfg_sense_set(m_wakeup_io_index, NRF_GPIO_PIN_SENSE_LOW);
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} else {
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nrf_gpio_cfg_sense_input(m_wakeup_io_index, NRF_GPIO_PIN_PULLUP, NRF_GPIO_PIN_SENSE_HIGH);
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nrf_gpio_cfg_sense_set(m_wakeup_io_index, NRF_GPIO_PIN_SENSE_HIGH);
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}
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// Go to system-off mode (this function will not return; wakeup will cause a reset).
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ret_code_t err_code;
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err_code = sd_power_system_off();
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if (err_code != NRF_SUCCESS) {
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ZLOGE("sd_power_system_off err_code: %x", err_code);
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}
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}
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void zbsp_enter_sleep(int32_t after_ms, int32_t wakeup_io_index, bool mirror) {
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m_wakeup_io_index = wakeup_io_index;
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m_wakeup_io_mirror = mirror;
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ret_code_t err_code;
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APP_ERROR_CHECK(app_timer_create(&enter_sleep_mode_tmr, APP_TIMER_MODE_SINGLE_SHOT, enter_sleep_tmr_cb));
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APP_ERROR_CHECK(app_timer_start(enter_sleep_mode_tmr, APP_TIMER_TICKS(after_ms), NULL));
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ZLOGI("enter sleep mode after %d ms", after_ms);
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}
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/*******************************************************************************
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* gpio_io_state_monitor *
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*******************************************************************************/
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APP_TIMER_DEF(gpio_io_state_monitor_tmr);
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static uint8_t* m_io_index;
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static int32_t m_nio;
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static void gpio_io_state_monitor_tmr_cb(void* p_context) {
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// ioindex:state ioindex:state ioindex:state
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if (m_nio == 1) {
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ZLOGI("iostate %d:%d ", m_io_index[0], nrf_gpio_pin_read(m_io_index[0]));
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} else if (m_nio == 2) {
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ZLOGI("iostate %d:%d %d:%d", m_io_index[0], nrf_gpio_pin_read(m_io_index[0]), //
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m_io_index[1], nrf_gpio_pin_read(m_io_index[1]));
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} else if (m_nio >= 3) {
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ZLOGI("iostate %d:%d %d:%d %d:%d", m_io_index[0], nrf_gpio_pin_read(m_io_index[0]), //
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m_io_index[1], nrf_gpio_pin_read(m_io_index[1]), //
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m_io_index[2], nrf_gpio_pin_read(m_io_index[2]));
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}
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}
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void zbsp_gpio_state_monitor_without_initio(int dumpstate_period, uint8_t* io_index, int32_t nio) {
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m_io_index = io_index;
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m_nio = nio;
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APP_ERROR_CHECK(app_timer_create(&gpio_io_state_monitor_tmr, APP_TIMER_MODE_REPEATED, gpio_io_state_monitor_tmr_cb));
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APP_ERROR_CHECK(app_timer_start(gpio_io_state_monitor_tmr, APP_TIMER_TICKS(dumpstate_period), NULL));
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}
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void zbsp_gpio_state_monitor(int dumpstate_period, uint8_t* io_index, int32_t nio) {
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m_io_index = io_index;
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m_nio = nio;
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for (int i = 0; i < nio; i++) {
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nrf_gpio_cfg_input(io_index[i], NRF_GPIO_PIN_PULLUP);
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}
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zbsp_gpio_state_monitor_without_initio(dumpstate_period, io_index, nio);
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}
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void board_init() {}
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/*******************************************************************************
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* ADC *
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*******************************************************************************/
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static void saadc_callback(nrf_drv_saadc_evt_t const* p_event) {
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if (p_event->type == NRF_DRV_SAADC_EVT_DONE) {
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}
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}
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void adc_module_init() {
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nrf_drv_saadc_config_t adccfg = NRFX_SAADC_DEFAULT_CONFIG;
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adccfg.resolution = NRF_SAADC_RESOLUTION_12BIT; // 4096 等于满采样率
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ZERROR_CHECK(nrf_drv_saadc_init(&adccfg, saadc_callback));
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}
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void adc_module_battery_channel_init(nrf_saadc_input_t channelpin) {
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nrf_saadc_channel_config_t channel_config = NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_SE(channelpin);
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ZERROR_CHECK(nrfx_saadc_channel_init(0, &channel_config));
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}
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int16_t adc_module_battery_channel_read_val() { return adc_channel_read_val(0); }
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void adc_module_heart_elect_channel_init(nrf_saadc_input_t channelpin) {
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nrf_saadc_channel_config_t channel_config = NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_SE(channelpin);
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channel_config.acq_time = NRF_SAADC_ACQTIME_40US;
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ZERROR_CHECK(nrfx_saadc_channel_init(1, &channel_config));
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}
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int16_t adc_module_heart_elect_channel_read_val() { return adc_channel_read_val(1); }
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/*******************************************************************************
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* SPI *
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*******************************************************************************/
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#define SPI_MISO_PIN 31
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#define SPI_SS_PIN 20
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#define SPI_SCK_PIN 29
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#define SPI_MOSI_PIN 30
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static const nrf_drv_spi_t spi = NRF_DRV_SPI_INSTANCE(0); /**< SPI instance. */
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// static volatile bool m_spi_translate_done = false;
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// static void spi_event_handler(nrf_drv_spi_evt_t const* p_event, void* p_context) { m_spi_translate_done = true; }
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void board_spi_init() {
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nrf_drv_spi_config_t spi_config = NRF_DRV_SPI_DEFAULT_CONFIG;
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spi_config.ss_pin = NRF_DRV_SPI_PIN_NOT_USED; // NRF_DRV_SPI_PIN_NOT_USED
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spi_config.miso_pin = SPI_MISO_PIN;
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spi_config.mosi_pin = SPI_MOSI_PIN;
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spi_config.sck_pin = SPI_SCK_PIN;
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spi_config.frequency = NRF_DRV_SPI_FREQ_1M;
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ZERROR_CHECK(nrf_drv_spi_init(&spi, &spi_config, NULL, NULL));
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}
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ret_code_t board_spi_transfer(uint8_t const* p_tx_buffer, uint8_t tx_buffer_length, uint8_t* p_rx_buffer, uint8_t rx_buffer_length) {
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// m_spi_translate_done = false;
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ZERROR_CHECK(nrf_drv_spi_transfer(&spi, p_tx_buffer, tx_buffer_length, p_rx_buffer, rx_buffer_length));
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// while (!m_spi_translate_done)
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// ;
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return NRF_SUCCESS;
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}
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ret_code_t board_spi_transfer_test() {
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uint8_t tx_data[] = {0x01, 0x02, 0x03};
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uint8_t rx_data[3];
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ZERROR_CHECK(board_spi_transfer(tx_data, 3, rx_data, 3));
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}
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void screen_init() {}
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void screen_spi_translate_onebyte() {}
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static nrf_drv_pwm_t m_pwm0 = NRF_DRV_PWM_INSTANCE(0);
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static nrf_pwm_values_individual_t m_demo1_seq_values;
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void pwm_trigger() {
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nrf_drv_pwm_config_t const config0 = {
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.output_pins = {11},
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.irq_priority = APP_IRQ_PRIORITY_LOWEST,
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.base_clock = NRF_PWM_CLK_125kHz,
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.count_mode = NRF_PWM_MODE_UP,
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.top_value = 10,
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.load_mode = NRF_PWM_LOAD_INDIVIDUAL,
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.step_mode = NRF_PWM_STEP_AUTO,
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};
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APP_ERROR_CHECK(nrf_drv_pwm_init(&m_pwm0, &config0, NULL));
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static nrf_pwm_sequence_t const m_demo1_seq = {
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.values.p_individual = &m_demo1_seq_values,
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.length = NRF_PWM_VALUES_LENGTH(m_demo1_seq_values),
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.repeats = 0,
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.end_delay = 0,
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};
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m_demo1_seq_values.channel_0 = 8;
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m_demo1_seq_values.channel_1 = 0;
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m_demo1_seq_values.channel_2 = 0;
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m_demo1_seq_values.channel_3 = 0;
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(void)nrf_drv_pwm_simple_playback(&m_pwm0, &m_demo1_seq, 1, NRF_DRV_PWM_FLAG_LOOP);
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}
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/*******************************************************************************
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* I2C *
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*******************************************************************************/
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#define TWI_SCL_M 30 // I2C SCL引脚
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#define TWI_SDA_M 31 // I2C SDA引脚
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static const nrf_drv_twi_t m_twi_master = NRF_DRV_TWI_INSTANCE(1);
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void board_i2c_init() {
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const nrf_drv_twi_config_t config = {
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.scl = TWI_SCL_M,
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.sda = TWI_SDA_M,
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.frequency = NRF_DRV_TWI_FREQ_100K,
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.interrupt_priority = APP_IRQ_PRIORITY_HIGH,
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.clear_bus_init = false,
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};
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ZERROR_CHECK(nrf_drv_twi_init(&m_twi_master, &config, NULL, NULL));
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nrf_drv_twi_enable(&m_twi_master);
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}
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void board_i2c_write(uint8_t addr, uint8_t* data, uint8_t len) { nrf_drv_twi_tx(&m_twi_master, addr, data, len, false); }
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#define FILE_NAME "NORDIC.TXT"
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#define TEST_STRING "SD card example."
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// #define SPI_MISO_PIN 31
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// #define SPI_SS_PIN 20
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// #define SPI_SCK_PIN 29
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// #define SPI_MOSI_PIN 30
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#define SDC_SCK_PIN 29 ///< SDC serial clock (SCK) pin.
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#define SDC_MOSI_PIN 30 ///< SDC serial data in (DI) pin.
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#define SDC_MISO_PIN 31 ///< SDC serial data out (DO) pin.
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#define SDC_CS_PIN 20 ///< SDC chip select (CS) pin.
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NRF_BLOCK_DEV_SDC_DEFINE(m_block_dev_sdc, NRF_BLOCK_DEV_SDC_CONFIG(SDC_SECTOR_SIZE, APP_SDCARD_CONFIG(SDC_MOSI_PIN, SDC_MISO_PIN, SDC_SCK_PIN, SDC_CS_PIN)), NFR_BLOCK_DEV_INFO_CONFIG("Nordic", "SDC", "1.00"));
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void fatfs_init() {
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// // Initialize FATFS disk I/O interface by providing the block device.
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static diskio_blkdev_t drives[] = {DISKIO_BLOCKDEV_CONFIG(NRF_BLOCKDEV_BASE_ADDR(m_block_dev_sdc, block_dev), NULL)};
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diskio_blockdev_register(drives, ARRAY_SIZE(drives));
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fatfs_test_write();
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}
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void fatfs_test_write() {
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static FATFS fs;
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static DIR dir;
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static FILINFO fno;
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static FIL file;
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uint32_t bytes_written;
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FRESULT ff_result;
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DSTATUS disk_state = STA_NOINIT;
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for (uint32_t retries = 3; retries && disk_state; --retries) {
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disk_state = disk_initialize(0);
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}
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if (disk_state) {
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NRF_LOG_INFO("Disk initialization failed. %d", disk_state);
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return;
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}
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return;
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// NRF_LOG_INFO("Initializing disk 0 (SDC)...");
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uint32_t blocks_per_mb = (1024uL * 1024uL) / m_block_dev_sdc.block_dev.p_ops->geometry(&m_block_dev_sdc.block_dev)->blk_size;
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uint32_t capacity = m_block_dev_sdc.block_dev.p_ops->geometry(&m_block_dev_sdc.block_dev)->blk_count / blocks_per_mb;
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NRF_LOG_INFO("Capacity: %d MB", capacity);
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NRF_LOG_INFO("Mounting volume...");
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ff_result = f_mount(&fs, "", 1);
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if (ff_result) {
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NRF_LOG_INFO("Mount failed.");
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return;
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}
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NRF_LOG_INFO("\r\n Listing directory: /");
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ff_result = f_opendir(&dir, "/");
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if (ff_result) {
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NRF_LOG_INFO("Directory listing failed!");
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return;
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}
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do {
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ff_result = f_readdir(&dir, &fno);
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if (ff_result != FR_OK) {
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NRF_LOG_INFO("Directory read failed.");
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return;
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}
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if (fno.fname[0]) {
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if (fno.fattrib & AM_DIR) {
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NRF_LOG_RAW_INFO(" <DIR> %s", (uint32_t)fno.fname);
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} else {
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NRF_LOG_RAW_INFO("%9lu %s", fno.fsize, (uint32_t)fno.fname);
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}
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}
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} while (fno.fname[0]);
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NRF_LOG_RAW_INFO("");
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NRF_LOG_INFO("Writing to file " FILE_NAME "...");
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ff_result = f_open(&file, FILE_NAME, FA_READ | FA_WRITE | FA_OPEN_APPEND);
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if (ff_result != FR_OK) {
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NRF_LOG_INFO("Unable to open or create file: " FILE_NAME ".");
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return;
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}
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ff_result = f_write(&file, TEST_STRING, sizeof(TEST_STRING) - 1, (UINT*)&bytes_written);
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if (ff_result != FR_OK) {
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NRF_LOG_INFO("Write failed\r\n.");
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} else {
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NRF_LOG_INFO("%d bytes written.", bytes_written);
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}
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(void)f_close(&file);
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return;
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}
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nrf_drv_wdt_channel_id m_channel_id;
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void wd_init() {
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// WDT_CONFIG_RELOAD_VALUE 修改这个数值修改喂狗周期,单位ms
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nrf_drv_wdt_config_t config = NRF_DRV_WDT_DEAFULT_CONFIG;
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config.reload_value = WDT_CONFIG_RELOAD_VALUE;
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ret_code_t err_code = nrf_drv_wdt_init(&config, NULL);
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ZERROR_CHECK(err_code);
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err_code = nrf_drv_wdt_channel_alloc(&m_channel_id);
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ZERROR_CHECK(err_code);
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nrf_drv_wdt_enable();
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}
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void wd_feed() { nrfx_wdt_feed(); }
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