Browse Source

v1.0.0

master
zhaohe 2 years ago
parent
commit
f29d53cd7a
  1. 2
      Core/Inc/stm32f4xx_it.h
  2. 7
      Core/Src/dma.c
  3. 30
      Core/Src/stm32f4xx_it.c
  4. 45
      Core/Src/usart.c
  5. 4
      README.md
  6. 30
      graphite_digester_tmc5160.ioc
  7. 44
      usrc/main.cpp

2
Core/Inc/stm32f4xx_it.h

@ -52,6 +52,8 @@ void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void DebugMon_Handler(void);
void DMA1_Stream1_IRQHandler(void);
void DMA1_Stream3_IRQHandler(void);
void CAN1_TX_IRQHandler(void);
void CAN1_RX0_IRQHandler(void);
void CAN1_RX1_IRQHandler(void);

7
Core/Src/dma.c

@ -41,8 +41,15 @@ void MX_DMA_Init(void)
/* DMA controller clock enable */
__HAL_RCC_DMA2_CLK_ENABLE();
__HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */
/* DMA1_Stream1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn);
/* DMA1_Stream3_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn);
/* DMA2_Stream2_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);

30
Core/Src/stm32f4xx_it.c

@ -61,6 +61,8 @@ extern TIM_HandleTypeDef htim6;
extern TIM_HandleTypeDef htim7;
extern DMA_HandleTypeDef hdma_usart1_rx;
extern DMA_HandleTypeDef hdma_usart1_tx;
extern DMA_HandleTypeDef hdma_usart3_rx;
extern DMA_HandleTypeDef hdma_usart3_tx;
extern UART_HandleTypeDef huart3;
extern TIM_HandleTypeDef htim11;
@ -167,6 +169,34 @@ void DebugMon_Handler(void)
/******************************************************************************/
/**
* @brief This function handles DMA1 stream1 global interrupt.
*/
void DMA1_Stream1_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream1_IRQn 0 */
/* USER CODE END DMA1_Stream1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart3_rx);
/* USER CODE BEGIN DMA1_Stream1_IRQn 1 */
/* USER CODE END DMA1_Stream1_IRQn 1 */
}
/**
* @brief This function handles DMA1 stream3 global interrupt.
*/
void DMA1_Stream3_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Stream3_IRQn 0 */
/* USER CODE END DMA1_Stream3_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_usart3_tx);
/* USER CODE BEGIN DMA1_Stream3_IRQn 1 */
/* USER CODE END DMA1_Stream3_IRQn 1 */
}
/**
* @brief This function handles CAN1 TX interrupts.
*/
void CAN1_TX_IRQHandler(void)

45
Core/Src/usart.c

@ -29,6 +29,8 @@ UART_HandleTypeDef huart2;
UART_HandleTypeDef huart3;
DMA_HandleTypeDef hdma_usart1_rx;
DMA_HandleTypeDef hdma_usart1_tx;
DMA_HandleTypeDef hdma_usart3_rx;
DMA_HandleTypeDef hdma_usart3_tx;
/* USART1 init function */
@ -101,7 +103,7 @@ void MX_USART3_UART_Init(void)
/* USER CODE END USART3_Init 1 */
huart3.Instance = USART3;
huart3.Init.BaudRate = 9600;
huart3.Init.BaudRate = 115200;
huart3.Init.WordLength = UART_WORDLENGTH_8B;
huart3.Init.StopBits = UART_STOPBITS_1;
huart3.Init.Parity = UART_PARITY_NONE;
@ -227,6 +229,43 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* USART3 DMA Init */
/* USART3_RX Init */
hdma_usart3_rx.Instance = DMA1_Stream1;
hdma_usart3_rx.Init.Channel = DMA_CHANNEL_4;
hdma_usart3_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_usart3_rx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart3_rx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart3_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart3_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart3_rx.Init.Mode = DMA_NORMAL;
hdma_usart3_rx.Init.Priority = DMA_PRIORITY_LOW;
hdma_usart3_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_usart3_rx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmarx,hdma_usart3_rx);
/* USART3_TX Init */
hdma_usart3_tx.Instance = DMA1_Stream3;
hdma_usart3_tx.Init.Channel = DMA_CHANNEL_4;
hdma_usart3_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
hdma_usart3_tx.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_usart3_tx.Init.MemInc = DMA_MINC_ENABLE;
hdma_usart3_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_usart3_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_usart3_tx.Init.Mode = DMA_NORMAL;
hdma_usart3_tx.Init.Priority = DMA_PRIORITY_LOW;
hdma_usart3_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
if (HAL_DMA_Init(&hdma_usart3_tx) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(uartHandle,hdmatx,hdma_usart3_tx);
/* USART3 interrupt Init */
HAL_NVIC_SetPriority(USART3_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(USART3_IRQn);
@ -292,6 +331,10 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
*/
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10|GPIO_PIN_11);
/* USART3 DMA DeInit */
HAL_DMA_DeInit(uartHandle->hdmarx);
HAL_DMA_DeInit(uartHandle->hdmatx);
/* USART3 interrupt Deinit */
HAL_NVIC_DisableIRQ(USART3_IRQn);
/* USER CODE BEGIN USART3_MspDeInit 1 */

4
README.md

@ -7,4 +7,8 @@ PD0
PD1 右限位 高有效
```
```
VERSION:1.0
```

30
graphite_digester_tmc5160.ioc

@ -17,7 +17,9 @@ CAN1.TTCM=ENABLE
CAN1.TXFP=DISABLE
Dma.Request0=USART1_RX
Dma.Request1=USART1_TX
Dma.RequestsNb=2
Dma.Request2=USART3_RX
Dma.Request3=USART3_TX
Dma.RequestsNb=4
Dma.USART1_RX.0.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART1_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART1_RX.0.Instance=DMA2_Stream2
@ -38,6 +40,26 @@ Dma.USART1_TX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART1_TX.1.PeriphInc=DMA_PINC_DISABLE
Dma.USART1_TX.1.Priority=DMA_PRIORITY_LOW
Dma.USART1_TX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART3_RX.2.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART3_RX.2.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART3_RX.2.Instance=DMA1_Stream1
Dma.USART3_RX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART3_RX.2.MemInc=DMA_MINC_ENABLE
Dma.USART3_RX.2.Mode=DMA_NORMAL
Dma.USART3_RX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART3_RX.2.PeriphInc=DMA_PINC_DISABLE
Dma.USART3_RX.2.Priority=DMA_PRIORITY_LOW
Dma.USART3_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART3_TX.3.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART3_TX.3.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART3_TX.3.Instance=DMA1_Stream3
Dma.USART3_TX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART3_TX.3.MemInc=DMA_MINC_ENABLE
Dma.USART3_TX.3.Mode=DMA_NORMAL
Dma.USART3_TX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART3_TX.3.PeriphInc=DMA_PINC_DISABLE
Dma.USART3_TX.3.Priority=DMA_PRIORITY_LOW
Dma.USART3_TX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
FREERTOS.FootprintOK=true
FREERTOS.IPParameters=Tasks01,FootprintOK,configUSE_NEWLIB_REENTRANT,configUSE_RECURSIVE_MUTEXES,configUSE_COUNTING_SEMAPHORES,configRECORD_STACK_HIGH_ADDRESS,configENABLE_FPU
FREERTOS.Tasks01=defaultTask,-3,1024,StartDefaultTask,As weak,NULL,Dynamic,NULL,NULL
@ -107,6 +129,8 @@ NVIC.CAN1_RX0_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.CAN1_RX1_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.CAN1_SCE_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.CAN1_TX_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true
NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA2_Stream2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DMA2_Stream7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
@ -203,7 +227,7 @@ ProjectManager.ToolChainLocation=
ProjectManager.UAScriptAfterPath=
ProjectManager.UAScriptBeforePath=
ProjectManager.UnderRoot=true
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_TIM3_Init-TIM3-false-HAL-true,6-MX_CRC_Init-CRC-false-HAL-true,7-MX_RNG_Init-RNG-false-HAL-true,8-MX_TIM7_Init-TIM7-false-HAL-true,9-MX_SPI1_Init-SPI1-false-HAL-true,10-MX_TIM6_Init-TIM6-false-HAL-true,11-MX_TIM1_Init-TIM1-false-HAL-true,12-MX_CAN1_Init-CAN1-false-HAL-true,13-MX_USART3_UART_Init-USART3-false-HAL-true,14-MX_I2C1_Init-I2C1-false-HAL-true,15-MX_ADC1_Init-ADC1-false-HAL-true,16-MX_TIM2_Init-TIM2-false-HAL-true,17-MX_USART2_UART_Init-USART2-false-HAL-true,18-MX_UART4_Init-UART4-false-HAL-true
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_TIM3_Init-TIM3-false-HAL-true,6-MX_CRC_Init-CRC-false-HAL-true,7-MX_RNG_Init-RNG-false-HAL-true,8-MX_TIM7_Init-TIM7-false-HAL-true,9-MX_SPI1_Init-SPI1-false-HAL-true,10-MX_TIM6_Init-TIM6-false-HAL-true,11-MX_TIM1_Init-TIM1-false-HAL-true,12-MX_CAN1_Init-CAN1-false-HAL-true,13-MX_USART3_UART_Init-USART3-false-HAL-true,14-MX_USART2_UART_Init-USART2-false-HAL-true
RCC.48MHZClocksFreq_Value=48000000
RCC.AHBFreq_Value=144000000
RCC.APB1CLKDivider=RCC_HCLK_DIV4
@ -269,7 +293,7 @@ USART1.IPParameters=VirtualMode,BaudRate
USART1.VirtualMode=VM_ASYNC
USART2.IPParameters=VirtualMode
USART2.VirtualMode=VM_ASYNC
USART3.BaudRate=9600
USART3.BaudRate=115200
USART3.IPParameters=VirtualMode,BaudRate
USART3.VirtualMode=VM_ASYNC
VP_CRC_VS_CRC.Mode=CRC_Activate

44
usrc/main.cpp

@ -23,11 +23,31 @@ static ZCancmderSubboardIniter initer;
extern void umain();
extern "C" {
void StartDefaultTask(void const* argument) { umain(); }
extern DMA_HandleTypeDef hdma_usart3_rx;
extern DMA_HandleTypeDef hdma_usart3_tx;
}
/*******************************************************************************
* GET_DEVICE_ID *
*******************************************************************************/
static int32_t getDeviceId() { return BOARD_ID; }
static int32_t getDeviceId() {
static bool init = false;
static ZGPIO ID0;
static ZGPIO ID1;
static ZGPIO ID2;
static ZGPIO ID3;
static ZGPIO ID4;
if (!init) {
ID0.initAsInput(ID0_IO, ZGPIO::kMode_nopull, ZGPIO::kIRQ_noIrq, true);
ID1.initAsInput(ID1_IO, ZGPIO::kMode_nopull, ZGPIO::kIRQ_noIrq, true);
ID2.initAsInput(ID2_IO, ZGPIO::kMode_nopull, ZGPIO::kIRQ_noIrq, true);
ID3.initAsInput(ID3_IO, ZGPIO::kMode_nopull, ZGPIO::kIRQ_noIrq, true);
ID4.initAsInput(ID4_IO, ZGPIO::kMode_nopull, ZGPIO::kIRQ_noIrq, true);
init = true;
}
uint8_t id = ID0.getState() * 1 + ID1.getState() * 2 + ID2.getState() * 4 + ID3.getState() * 8 + ID4.getState() * 16;
return id;
}
/*******************************************************************************
* INIT_SUBMODULE *
*******************************************************************************/
@ -53,8 +73,8 @@ static void initsubmodule() {
// g_motor.rotate(1000);
static ZGPIO input[10];
input[0].initAsInput(MOTOR0_REFL /*REFL*/, ZGPIO::kMode_nopull, ZGPIO::kIRQ_noIrq, true);
input[1].initAsInput(MOTOR0_REFR /*REFR*/, ZGPIO::kMode_nopull, ZGPIO::kIRQ_noIrq, true);
input[0].initAsInput(MOTOR0_REFL /*REFL*/, ZGPIO::kMode_nopull, ZGPIO::kIRQ_noIrq, false);
input[1].initAsInput(MOTOR0_REFR /*REFR*/, ZGPIO::kMode_nopull, ZGPIO::kIRQ_noIrq, false);
StepMotorCtrlModule::flash_config_t smcm_cfg = {0};
StepMotorCtrlModule::create_default_cfg(smcm_cfg);
@ -71,6 +91,24 @@ static void initsubmodule() {
g_stepMotorCtrlModule.initialize(initer.get_module_id(1), &g_motor, input, ZARRAY_SIZE(input), nullptr, &smcm_cfg);
initer.register_module(&g_stepMotorCtrlModule);
}
{
// 115200
/*******************************************************************************
* *
*******************************************************************************/
static FeiTeServoMotor feiteservomotor_bus; // 飞特舵机总线
static MiniRobotCtrlModule mini_servo;
// 飞特舵机总线
ZASSERT(huart3.Init.BaudRate == 115200);
feiteservomotor_bus.initialize(&huart3, &hdma_usart3_rx, &hdma_usart3_tx);
static MiniRobotCtrlModule::flash_config_t cfg = {0};
cfg.default_torque = 330;
mini_servo.initialize(initer.get_module_id(2), &feiteservomotor_bus, 1, &cfg);
initer.register_module(&mini_servo);
}
}
/*******************************************************************************

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