17 changed files with 124 additions and 343 deletions
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3.vscode/settings.json
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2README.md
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BINlight_src_ctrl_fpga_port.jic
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11light_src_ctrl_fpga_port.map
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2run_led.cdf
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2run_led.jdi
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48run_led.pin
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BINrun_led.pof
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22run_led.qsf
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BINrun_led.sof
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45source/led0_module.v
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45source/led1_module.v
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45source/led2_module.v
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45source/led3_module.v
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67source/top_module.v
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60source/top_module.v.bak
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70source/top_module_bak2.v
@ -0,0 +1,3 @@ |
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{ |
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"files.encoding": "gbk" |
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} |
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@ -0,0 +1,2 @@ |
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引脚分配参考: |
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https://iflytop1.feishu.cn/docx/SqzLdKLmxoAtMLxLEYec2sIcn4g |
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@ -0,0 +1,11 @@ |
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BLOCK START ADDRESS END ADDRESS |
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Page_0 0x00000000 0x00059D8A |
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Notes: |
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- Data checksum for this conversion is 0x1A5DC668 |
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- All the addresses in this file are byte addresses |
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@ -1,45 +0,0 @@ |
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module led0_module |
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( |
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CLK, RSTn, LED_Out |
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); |
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input CLK; |
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input RSTn; |
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output LED_Out; |
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/*************************************/ |
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parameter T100MS = 23'd5_000_000;//DB4CE15开发板使用的晶振为50MHz，50M*0.01=5_000_000 |
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/*************************************/ |
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reg [22:0]Count1; |
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always @ ( posedge CLK or negedge RSTn ) |
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if( !RSTn ) |
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Count1 <= 23'd0; |
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else if( Count1 == T100MS ) |
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Count1 <= 23'd0; |
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else |
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Count1 <= Count1 + 1'b1; |
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/*************************************/ |
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reg rLED_Out; |
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always @ ( posedge CLK or negedge RSTn ) |
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if( !RSTn ) |
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rLED_Out <= 1'b0; |
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else if( Count1 >= 23'd0 && Count1 < 23'd1_250_000 )//100ms的第一个四分之一，具体请看教程11页的图2.1C |
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rLED_Out <= 1'b1; |
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else |
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rLED_Out <= 1'b0; |
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/***************************************/ |
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assign LED_Out = rLED_Out; |
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/***************************************/ |
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endmodule |
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@ -1,45 +0,0 @@ |
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module led1_module |
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( |
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CLK, RSTn, LED_Out |
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); |
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input CLK; |
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input RSTn; |
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output LED_Out; |
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/*************************************/ |
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parameter T100MS = 23'd5_000_000;//DB4CE15开发板使用的晶振为50MHz，50M*0.01=5_000_000 |
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/*************************************/ |
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reg [22:0]Count1; |
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always @ ( posedge CLK or negedge RSTn ) |
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if( !RSTn ) |
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Count1 <= 23'd0; |
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else if( Count1 == T100MS ) |
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Count1 <= 23'd0; |
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else |
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Count1 <= Count1 + 1'b1; |
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/*************************************/ |
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reg rLED_Out; |
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always @ ( posedge CLK or negedge RSTn ) |
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if( !RSTn ) |
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rLED_Out <= 1'b0; |
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else if( Count1 >= 23'd1_250_000 && Count1 < 23'd2_500_000 )//100ms的第二个四分之一，具体请看教程11页的图2.1C |
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rLED_Out <= 1'b1; |
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else |
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rLED_Out <= 1'b0; |
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/***************************************/ |
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assign LED_Out = rLED_Out; |
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/***************************************/ |
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endmodule |
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@ -1,45 +0,0 @@ |
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module led2_module |
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( |
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CLK, RSTn, LED_Out |
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); |
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input CLK; |
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input RSTn; |
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output LED_Out; |
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/*************************************/ |
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parameter T100MS = 23'd5_000_000;//DB4CE15开发板使用的晶振为50MHz，50M*0.01=5_000_000 |
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/*************************************/ |
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reg [22:0]Count1; |
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always @ ( posedge CLK or negedge RSTn ) |
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if( !RSTn ) |
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Count1 <= 23'd0; |
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else if( Count1 == T100MS ) |
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Count1 <= 23'd0; |
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else |
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Count1 <= Count1 + 1'b1; |
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/*************************************/ |
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reg rLED_Out; |
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always @ ( posedge CLK or negedge RSTn ) |
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if( !RSTn ) |
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rLED_Out <= 1'b0; |
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else if( Count1 >= 23'd2_500_000 && Count1 < 23'd3_750_000 )//100ms的第三个四分之一，具体请看教程11页的图2.1C |
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rLED_Out <= 1'b1; |
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else |
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rLED_Out <= 1'b0; |
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/***************************************/ |
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assign LED_Out = rLED_Out; |
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/***************************************/ |
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endmodule |
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@ -1,45 +0,0 @@ |
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module led3_module |
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( |
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CLK, RSTn, LED_Out |
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); |
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input CLK; |
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input RSTn; |
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output LED_Out; |
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/*************************************/ |
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parameter T100MS = 23'd5_000_000;//DB4CE15开发板使用的晶振为50MHz，50M*0.01=5_000_000 |
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/*************************************/ |
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reg [22:0]Count1; |
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always @ ( posedge CLK or negedge RSTn ) |
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if( !RSTn ) |
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Count1 <= 23'd0; |
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else if( Count1 == T100MS ) |
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Count1 <= 23'd0; |
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else |
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Count1 <= Count1 + 1'b1; |
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/*************************************/ |
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reg rLED_Out; |
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always @ ( posedge CLK or negedge RSTn ) |
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if( !RSTn ) |
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rLED_Out <= 1'b0; |
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else if( Count1 >= 23'd3_750_000 && Count1 < 23'd5_000_000 )//100ms的第四个四分之一，具体请看教程11页的图2.1C |
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rLED_Out <= 1'b1; |
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else |
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rLED_Out <= 1'b0; |
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/***************************************/ |
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assign LED_Out = rLED_Out; |
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/***************************************/ |
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endmodule |
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@ -1,16 +1,69 @@ |
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module top_module ( |
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clk, |
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input clk, |
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//input_from_stm32 |
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input stm32_pc6, // 灯光强度控制PWM |
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input stm32_pc7, // 灯光强度控制PWM |
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input stm32_pc8, // 灯光强度控制PWM |
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input stm32_pc9, // 灯光强度控制PWM |
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input stm32_pa1, // 快门控制 |
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input stm32_pa2, // 快门控制 |
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input stm32_pa3, // 快门控制 |
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input stm32_pa4, // 快门控制 |
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input stm32_pa5, // 快门控制 |
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//output_to_stm32 |
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output stm32_pa0, // 输入捕获 |
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//光强控制引脚 |
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output lt_intensity_1, //灯光强度控制输出 |
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output lt_intensity_2, //灯光强度控制输出 |
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output lt_intensity_3, //灯光强度控制输出 |
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output lt_intensity_4, //灯光强度控制输出 |
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//拍照控制引脚 |
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output lt_on_off_ctrl_1, //指示灯通断控制输出 |
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output lt_on_off_ctrl_2, //指示灯通断控制输出 |
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output lt_on_off_ctrl_3, //指示灯通断控制输出 |
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output lt_on_off_ctrl_4, //指示灯通断控制输出 |
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output camera_shutter_out, //相机快门控制输出 |
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debug_light |
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// 触发输入引脚 |
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input trigger_input0, //触发输入 |
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//测试引脚 |
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// output spi2_miso, //用于测试的SPI输出 |
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output tp5, |
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output tp6, |
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output tp7, |
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output tp8, |
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output [2:0] debug_light |
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); |
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input clk; |
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assign lt_intensity_1 = stm32_pc6; |
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assign lt_intensity_2 = stm32_pc7; |
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assign lt_intensity_3 = stm32_pc8; |
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assign lt_intensity_4 = stm32_pc9; |
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assign lt_on_off_ctrl_1 = stm32_pa1; |
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assign lt_on_off_ctrl_2 = stm32_pa2; |
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assign lt_on_off_ctrl_3 = stm32_pa3; |
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assign lt_on_off_ctrl_4 = stm32_pa4; |
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assign camera_shutter_out = stm32_pa5; |
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output [2:0] debug_light; |
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assign stm32_pa0 = !trigger_input0; |
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assign debug_light[0] = 0; |
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assign debug_light[1] = 1; |
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assign debug_light[0] = 1; |
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assign debug_light[1] = 0; |
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assign debug_light[2] = 0; |
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assign tp8 = !trigger_input0; |
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endmodule |
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@ -1,60 +0,0 @@ |
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module top_module |
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( |
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CLK, RSTn, LED_Out |
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); |
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input CLK; |
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input RSTn; |
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output [3:0]LED_Out; |
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/*******************************/ |
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wire LED0_Out; |
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led0_module U1 |
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( |
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.CLK( CLK ), |
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.RSTn( RSTn ), |
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.LED_Out( LED0_Out ) |
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); |
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/*********************************/ |
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wire LED1_Out; |
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led1_module U2 |
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( |
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.CLK( CLK ), |
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.RSTn( RSTn ), |
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.LED_Out( LED1_Out ) |
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); |
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/*********************************/ |
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wire LED2_Out; |
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led2_module U3 |
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( |
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.CLK( CLK ), |
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.RSTn( RSTn ), |
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.LED_Out( LED2_Out ) |
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); |
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/*********************************/ |
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wire LED3_Out; |
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led3_module U4 |
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( |
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.CLK( CLK ), |
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.RSTn( RSTn ), |
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.LED_Out( LED3_Out ) |
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); |
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/**********************************/ |
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assign LED_Out = { LED3_Out, LED2_Out, LED1_Out, LED0_Out}; |
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/***********************************/ |
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endmodule |
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@ -1,70 +0,0 @@ |
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module top_module |
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( |
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//CLK, |
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//RSTn, |
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PC6, |
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PC7, |
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PC8, |
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PA9, |
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LT_PWM1, |
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LT_PWM2, |
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LT_PWM3, |
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LT_PWM4, |
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EXIN1, |
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EXIN1_to_MCU, |
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PA1, |
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PA2, |
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PA3, |
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PA4, |
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LT_EN1, |
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LT_EN2, |
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LT_EN3, |
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LT_EN4, |
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cam_triger |
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); |
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//input CLK; |
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//input RSTn; |
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input PC6; |
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input PC7; |
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input PC8; |
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input PA9; |
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output LT_PWM1; |
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output LT_PWM2; |
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output LT_PWM3; |
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output LT_PWM4; |
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input EXIN1; |
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output EXIN1_to_MCU; |
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input PA1; |
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input PA2; |
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input PA3; |
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input PA4; |
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output LT_EN1; |
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output LT_EN2; |
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output LT_EN3; |
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output LT_EN4; |
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output cam_triger; |
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/********光源亮度控制***************/ |
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assign LT_PWM1 = PC6; |
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assign LT_PWM2 = PC7; |
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assign LT_PWM3 = PC8; |
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assign LT_PWM4 = PA9; |
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/**********************************/ |
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/********光源使能*******************/ |
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assign LT_EN1 = PA1; |
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assign LT_EN2 = PA2; |
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assign LT_EN3 = PA3; |
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assign LT_EN4 = PA4; |
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/**********************************/ |
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assign EXIN1_to_MCU = EXIN1; |
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/***********************************/ |
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assign cam_triger = PA1 || PA2 || PA3 || PA4; |
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endmodule |
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