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  1. #pragma once
  2. #include <stdint.h>
  3. /**
  4. * @brief XSYNCЭ˿
  5. */
  6. #define IFLYTOP_XSYNC_SERVICE_XSYNC_PORT 19900 // xsync�˶˿�
  7. #define IFLYTOP_XSYNC_SERVICE_PC_PORT 19901 // pc �˶˿�
  8. #define IFLYTOP_XSYNC_TIMECODE_REPORT_XSYNC_PORT 19902 // xsync�˶˿�
  9. #define IFLYTOP_XSYNC_TIMECODE_REPORT_PC_PORT 19903 // pc�˶˿�
  10. #define IFLYTOP_XSYNC_CAMERA_SYNC_PACKET_XSYNC_PORT 13013 // xsync�˶˿�
  11. #define IFLYTOP_XSYNC_CAMERA_SYNC_PACKET_PC_PORT 13014 // pc�˶˿�
  12. /**
  13. * @brief
  14. * Э˵
  15. *
  16. * kxsync_packet_type_reg_read:
  17. * tx: regadd
  18. * rx: ecode,regdata
  19. *
  20. * kxsync_packet_type_reg_write
  21. * tx: regadd,regdata
  22. * rx: ecode,regdata
  23. *
  24. * kxsync_packet_type_reg_read_regs
  25. * tx: regstartadd,nreg
  26. * rx: ecode,regdatas
  27. *
  28. */
  29. typedef enum {
  30. kxsync_packet_type_none = 0,
  31. kxsync_packet_type_reg_read = 1,
  32. kxsync_packet_type_reg_write = 2,
  33. kxsync_packet_type_reg_read_regs = 3,
  34. kxsync_packet_type_timecode_report = 4,
  35. } xsync_protocol_cmd_t;
  36. typedef enum {
  37. kxsync_packet_type_cmd = 0,
  38. kxsync_packet_type_receipt = 1,
  39. kxsync_packet_type_report = 2,
  40. } xsync_protocol_packet_type_t;
  41. typedef enum {
  42. kxs_ec_success = 0,
  43. kxs_ec_overtime = 1,
  44. kxs_ec_socket_fail = 2,
  45. kxs_ec_bind_fail = 3,
  46. kxs_ec_send_fail = 4,
  47. kxs_ec_receive_fail = 5,
  48. kxs_ec_setsockopt_rx_timeout_fail = 6,
  49. kxs_ec_lose_connect = 7,
  50. kxs_ec_param_error = 8,
  51. } xs_error_code_t;
  52. static inline const char* xs_error_code_2_str(xs_error_code_t ecode) {
  53. switch (ecode) {
  54. case kxs_ec_success:
  55. return "success";
  56. case kxs_ec_overtime:
  57. return "overtime";
  58. case kxs_ec_socket_fail:
  59. return "socket fail";
  60. case kxs_ec_bind_fail:
  61. return "bind fail";
  62. case kxs_ec_send_fail:
  63. return "send fail";
  64. case kxs_ec_receive_fail:
  65. return "receive fail";
  66. case kxs_ec_setsockopt_rx_timeout_fail:
  67. return "setsockopt rx timeout fail";
  68. case kxs_ec_lose_connect:
  69. return "lose connect";
  70. case kxs_ec_param_error:
  71. return "param error";
  72. default:
  73. return "unknown error";
  74. }
  75. }
  76. #pragma pack(1)
  77. typedef struct {
  78. uint16_t type;
  79. uint16_t index;
  80. uint16_t cmd;
  81. uint16_t ndata;
  82. uint32_t data[]; // first is always checksum
  83. } iflytop_xsync_packet_header_t;
  84. typedef struct {
  85. uint32_t timecode0;
  86. uint32_t timecode1;
  87. } iflytop_timecode_report_packet_t;
  88. #define XYSNC_REG_DEVICE_INFO_START_ADD 0
  89. #define XYSNC_REG_STM32_CONFIG_START_ADD 16
  90. #define XYSNC_REG_FPGA_REG_START 32
  91. #define REG_ADD_OFF_STM32 (0x0000)
  92. #define REG_ADD_OFF_FPGA_TEST (0x00020)
  93. // �������ļĴ�����ַ
  94. #define REG_ADD_OFF_CONTROL_SENSOR (0x00030)
  95. // ��������
  96. #define REG_ADD_OFF_TTLIN1 (0x0100)
  97. #define REG_ADD_OFF_TTLIN2 (0x0110)
  98. #define REG_ADD_OFF_TTLIN3 (0x0120)
  99. #define REG_ADD_OFF_TTLIN4 (0x0130)
  100. #define REG_ADD_OFF_TIMECODE_IN (0x0140)
  101. #define REG_ADD_OFF_GENLOCK_IN (0x0150)
  102. // ��������
  103. #define REG_ADD_OFF_TTLOUT1 (0x0200)
  104. #define REG_ADD_OFF_TTLOUT2 (0x0210)
  105. #define REG_ADD_OFF_TTLOUT3 (0x0220)
  106. #define REG_ADD_OFF_TTLOUT4 (0x0230)
  107. #define REG_ADD_OFF_TIMECODE_OUT (0x0240)
  108. #define REG_ADD_OFF_GENLOCK_OUT (0x0250)
  109. #define REG_ADD_OFF_STM32_IF (0x0260)
  110. // ��������
  111. #define REG_ADD_OFF_DEBUGER (0x0300)
  112. typedef enum {
  113. /**
  114. * @brief
  115. * REG 0(16) ϢĴ
  116. */
  117. kxsync_reg_software_version = 0,
  118. kxsync_reg_manufacturer0 = 1,
  119. kxsync_reg_manufacturer1 = 2,
  120. kxsync_reg_product_type_id = 3,
  121. kxsync_reg_sn_id0 = 4,
  122. kxsync_reg_sn_id1 = 5,
  123. kxsync_reg_sn_id2 = 6,
  124. kxsync_reg_mac0 = 7,
  125. kxsync_reg_mac1 = 8,
  126. /**
  127. * @brief
  128. * REG 16(32) STM32üĴ0
  129. */
  130. kxsync_reg_stm32_obtaining_ip_mode = XYSNC_REG_STM32_CONFIG_START_ADD + 0,
  131. kxsync_reg_stm32_ip = XYSNC_REG_STM32_CONFIG_START_ADD + 1,
  132. kxsync_reg_stm32_gw = XYSNC_REG_STM32_CONFIG_START_ADD + 2,
  133. kxsync_reg_stm32_netmask = XYSNC_REG_STM32_CONFIG_START_ADD + 3,
  134. kxsync_reg_stm32_config0 = XYSNC_REG_STM32_CONFIG_START_ADD + 4, // bit0: timecode report enable, bit1: camera sync report enable
  135. kxsync_reg_stm32_camera_sync_signal_count = XYSNC_REG_STM32_CONFIG_START_ADD + 5, // д������ֵ֮������
  136. kxsync_reg_stm32_camera_sync_signal_report_period = XYSNC_REG_STM32_CONFIG_START_ADD + 6, // ����֡�ϱ�һ��
  137. kxsync_reg_stm32_action0 = XYSNC_REG_STM32_CONFIG_START_ADD + 14, // action reg
  138. kxsync_reg_stm32_action_val0 = XYSNC_REG_STM32_CONFIG_START_ADD + 15, // action val reg
  139. /**
  140. * @brief
  141. * REG 48(32) FPGAüĴ0
  142. */
  143. kxsync_fpga_reg_test_reg0 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 0,
  144. kxsync_fpga_reg_test_reg1 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 1,
  145. kxsync_fpga_reg_test_reg2 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 2,
  146. kxsync_fpga_reg_test_reg3 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 3,
  147. kxsync_fpga_reg_test_reg4 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 4,
  148. kxsync_fpga_reg_test_reg5 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 5,
  149. kxsync_fpga_reg_test_reg6 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 6,
  150. kxsync_fpga_reg_test_reg7 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 7,
  151. kxsync_fpga_reg_test_reg8 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 8,
  152. kxsync_fpga_reg_test_reg9 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 9,
  153. kxsync_fpga_reg_test_rega = XYSNC_REG_FPGA_REG_START + 16 * 0 + 10,
  154. kxsync_fpga_reg_test_regb = XYSNC_REG_FPGA_REG_START + 16 * 0 + 11,
  155. kxsync_fpga_reg_test_regc = XYSNC_REG_FPGA_REG_START + 16 * 0 + 12,
  156. kxsync_fpga_reg_test_regd = XYSNC_REG_FPGA_REG_START + 16 * 0 + 13,
  157. kxsync_fpga_reg_test_rege = XYSNC_REG_FPGA_REG_START + 16 * 0 + 14,
  158. kxsync_fpga_reg_test_regf = XYSNC_REG_FPGA_REG_START + 16 * 0 + 15,
  159. /**
  160. * @brief TTLģ
  161. */
  162. kxsync_reg_ttlout1_input_sig_slt = REG_ADD_OFF_TTLOUT1 + 0,
  163. kxsync_reg_ttlout1_output_sig_slt = REG_ADD_OFF_TTLOUT1 + 1,
  164. kxsync_reg_ttlout1_config = REG_ADD_OFF_TTLOUT1 + 2,
  165. kxsync_reg_ttlout1_pulse_mode_duration = REG_ADD_OFF_TTLOUT1 + 3,
  166. kxsync_reg_ttlout1_pulse_mode_delay = REG_ADD_OFF_TTLOUT1 + 4,
  167. kxsync_reg_ttlout2_input_sig_slt = REG_ADD_OFF_TTLOUT2 + 0,
  168. kxsync_reg_ttlout2_output_sig_slt = REG_ADD_OFF_TTLOUT2 + 1,
  169. kxsync_reg_ttlout2_config = REG_ADD_OFF_TTLOUT2 + 2,
  170. kxsync_reg_ttlout2_pulse_mode_duration = REG_ADD_OFF_TTLOUT2 + 3,
  171. kxsync_reg_ttlout2_pulse_mode_delay = REG_ADD_OFF_TTLOUT2 + 4,
  172. kxsync_reg_ttlout3_input_sig_slt = REG_ADD_OFF_TTLOUT3 + 0,
  173. kxsync_reg_ttlout3_output_sig_slt = REG_ADD_OFF_TTLOUT3 + 1,
  174. kxsync_reg_ttlout3_config = REG_ADD_OFF_TTLOUT3 + 2,
  175. kxsync_reg_ttlout3_pulse_mode_duration = REG_ADD_OFF_TTLOUT3 + 3,
  176. kxsync_reg_ttlout3_pulse_mode_delay = REG_ADD_OFF_TTLOUT3 + 4,
  177. kxsync_reg_ttlout4_input_sig_slt = REG_ADD_OFF_TTLOUT4 + 0,
  178. kxsync_reg_ttlout4_output_sig_slt = REG_ADD_OFF_TTLOUT4 + 1,
  179. kxsync_reg_ttlout4_config = REG_ADD_OFF_TTLOUT4 + 2,
  180. kxsync_reg_ttlout4_pulse_mode_duration = REG_ADD_OFF_TTLOUT4 + 3,
  181. kxsync_reg_ttlout4_pulse_mode_delay = REG_ADD_OFF_TTLOUT4 + 4,
  182. } xsync_reg_add_t;
  183. #define KXSYNC_REG_STM32_CONFIG0_MASK_TIMECODE_REPORT_ENABLE 0x01
  184. #define KXSYNC_REG_STM32_CONFIG0_MASK_CAMERA_SYNC_REPORT_ENABLE 0x02
  185. typedef enum {
  186. xsync_stm32_action_none, //
  187. xsync_stm32_action_generator_new_mac, //
  188. xsync_stm32_action_factory_reset, //
  189. xsync_stm32_action_reboot, //
  190. xsync_stm32_action_storage_cfg, //
  191. } xsync_stm32_action_t;
  192. typedef enum {
  193. kxsync_device_type_none = 0,
  194. kxsync_device_type_xsync = 1,
  195. kxsync_device_type_puck_station = 2,
  196. kxsync_device_type_encoder = 3,
  197. } xsync_device_type_t;
  198. typedef enum { obtaining_ip_mode_type_static = 0, obtaining_ip_mode_type_dhcp = 1 } obtaining_ip_mode_t;
  199. static inline const char* obtaining_ip_mode_to_string(obtaining_ip_mode_t mode) {
  200. switch (mode) {
  201. case obtaining_ip_mode_type_static:
  202. return "static";
  203. case obtaining_ip_mode_type_dhcp:
  204. return "dhcp";
  205. default:
  206. return "unknown";
  207. }
  208. }
  209. #pragma pack()