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Merge branch 'master' of 192.168.1.3:p_lusterinc/iflytop_xsync_protocol

master
zhaohe 2 years ago
parent
commit
df640edf70
  1. 55
      iflytop_xsync_protocol.h

55
iflytop_xsync_protocol.h

@ -53,6 +53,7 @@ typedef enum {
kxs_ec_receive_fail = 5,
kxs_ec_setsockopt_rx_timeout_fail = 6,
kxs_ec_lose_connect = 7,
kxs_ec_param_error = 8,
} xs_error_code_t;
static inline const char* xs_error_code_2_str(xs_error_code_t ecode) {
@ -73,6 +74,8 @@ static inline const char* xs_error_code_2_str(xs_error_code_t ecode) {
return "setsockopt rx timeout fail";
case kxs_ec_lose_connect:
return "lose connect";
case kxs_ec_param_error:
return "param error";
default:
return "unknown error";
}
@ -97,6 +100,28 @@ typedef struct {
#define XYSNC_REG_STM32_CONFIG_START_ADD 16
#define XYSNC_REG_FPGA_REG_START 32
#define REG_ADD_OFF_STM32 (0x0000)
#define REG_ADD_OFF_FPGA_TEST (0x00020)
//
#define REG_ADD_OFF_CONTROL_SENSOR (0x00030)
//
#define REG_ADD_OFF_TTLIN1 (0x0100)
#define REG_ADD_OFF_TTLIN2 (0x0110)
#define REG_ADD_OFF_TTLIN3 (0x0120)
#define REG_ADD_OFF_TTLIN4 (0x0130)
#define REG_ADD_OFF_TIMECODE_IN (0x0140)
#define REG_ADD_OFF_GENLOCK_IN (0x0150)
//
#define REG_ADD_OFF_TTLOUT1 (0x0200)
#define REG_ADD_OFF_TTLOUT2 (0x0210)
#define REG_ADD_OFF_TTLOUT3 (0x0220)
#define REG_ADD_OFF_TTLOUT4 (0x0230)
#define REG_ADD_OFF_TIMECODE_OUT (0x0240)
#define REG_ADD_OFF_GENLOCK_OUT (0x0250)
#define REG_ADD_OFF_STM32_IF (0x0260)
//
#define REG_ADD_OFF_DEBUGER (0x0300)
typedef enum {
/**
* @brief
@ -148,6 +173,34 @@ typedef enum {
kxsync_fpga_reg_test_rege = XYSNC_REG_FPGA_REG_START + 16 * 0 + 14,
kxsync_fpga_reg_test_regf = XYSNC_REG_FPGA_REG_START + 16 * 0 + 15,
/**
* @brief TTL输出模块
*/
kxsync_reg_ttlout1_input_sig_slt = REG_ADD_OFF_TTLOUT1 + 0,
kxsync_reg_ttlout1_output_sig_slt = REG_ADD_OFF_TTLOUT1 + 1,
kxsync_reg_ttlout1_config = REG_ADD_OFF_TTLOUT1 + 2,
kxsync_reg_ttlout1_pulse_mode_duration = REG_ADD_OFF_TTLOUT1 + 3,
kxsync_reg_ttlout1_pulse_mode_delay = REG_ADD_OFF_TTLOUT1 + 4,
kxsync_reg_ttlout2_input_sig_slt = REG_ADD_OFF_TTLOUT2 + 0,
kxsync_reg_ttlout2_output_sig_slt = REG_ADD_OFF_TTLOUT2 + 1,
kxsync_reg_ttlout2_config = REG_ADD_OFF_TTLOUT2 + 2,
kxsync_reg_ttlout2_pulse_mode_duration = REG_ADD_OFF_TTLOUT2 + 3,
kxsync_reg_ttlout2_pulse_mode_delay = REG_ADD_OFF_TTLOUT2 + 4,
kxsync_reg_ttlout3_input_sig_slt = REG_ADD_OFF_TTLOUT3 + 0,
kxsync_reg_ttlout3_output_sig_slt = REG_ADD_OFF_TTLOUT3 + 1,
kxsync_reg_ttlout3_config = REG_ADD_OFF_TTLOUT3 + 2,
kxsync_reg_ttlout3_pulse_mode_duration = REG_ADD_OFF_TTLOUT3 + 3,
kxsync_reg_ttlout3_pulse_mode_delay = REG_ADD_OFF_TTLOUT3 + 4,
kxsync_reg_ttlout4_input_sig_slt = REG_ADD_OFF_TTLOUT4 + 0,
kxsync_reg_ttlout4_output_sig_slt = REG_ADD_OFF_TTLOUT4 + 1,
kxsync_reg_ttlout4_config = REG_ADD_OFF_TTLOUT4 + 2,
kxsync_reg_ttlout4_pulse_mode_duration = REG_ADD_OFF_TTLOUT4 + 3,
kxsync_reg_ttlout4_pulse_mode_delay = REG_ADD_OFF_TTLOUT4 + 4,
} xsync_reg_add_t;
#define KXSYNC_REG_STM32_CONFIG0_MASK_TIMECODE_REPORT_ENABLE 0x01
@ -157,7 +210,7 @@ typedef enum {
xsync_stm32_action_none, //
xsync_stm32_action_generator_new_mac, //
xsync_stm32_action_factory_reset, //
xsync_stm32_action_reboot, //
xsync_stm32_action_Basic_reboot, //
xsync_stm32_action_storage_cfg, //
} xsync_stm32_action_t;

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