Browse Source

add internal sig generator ctrl

master
zhaohe 1 year ago
parent
commit
3cb822d7fa
  1. 8
      include/ixsync.hpp
  2. 47
      include/xsync_regs.hpp
  3. 13
      src/xsync_v2.cpp

8
include/ixsync.hpp

@ -201,6 +201,10 @@ class IXsync {
*
*/
virtual xs_error_code_t InternalSigSrouce_start() = 0;
virtual xs_error_code_t InternalSigSrouce_stop() = 0;
virtual xs_error_code_t InternalSigSrouce_readState(bool &en) = 0;
virtual xs_error_code_t InternalTimecode_setFormat(TimecodeFormat_t format) = 0;
virtual xs_error_code_t InternalTimecode_getFormat(TimecodeFormat_t &format) = 0;
virtual xs_error_code_t InternalTimecode_setCode(XsyncTimecode_t timecode) = 0;
@ -212,6 +216,10 @@ class IXsync {
virtual xs_error_code_t InternalClock_setFreq(float freq) = 0;
virtual xs_error_code_t InternalClock_getFreq(float &freq) = 0;
/*******************************************************************************
* *
*******************************************************************************/
virtual xs_error_code_t SysTimecode_setSource(uint32_t sig) = 0;
virtual xs_error_code_t SysTimecode_getSource(uint32_t &sig) = 0;
virtual xs_error_code_t SysTimecode_readFormat(TimecodeFormat_t &format) = 0;

47
include/xsync_regs.hpp

@ -16,24 +16,26 @@ using namespace std;
#define REG_ADD_OFF_STM32 (0x0000)
#define REG_ADD_OFF_STM32_CONFIG_START_ADD (0x0010)
#define REGADDOFF__FPGA_INFO (0x0020)
#define REGADDOFF__TTLIN (0x0100)
#define REGADDOFF__EXTERNAL_TIMECODE (0x0120)
#define REGADDOFF__EXTERNAL_GENLOCK (0x0130)
#define REGADDOFF__INTERNAL_TIMECODE (0x0300)
#define REGADDOFF__INTERNAL_GENLOCK (0x0310)
#define REGADDOFF__INTERNAL_CLOCK (0x0320)
#define REGADDOFF__TTLOUT1 (0x0200)
#define REGADDOFF__TTLOUT2 (0x0210)
#define REGADDOFF__TTLOUT3 (0x0220)
#define REGADDOFF__TTLOUT4 (0x0230)
#define REGADDOFF__TIMECODE_OUT (0x0240)
#define REGADDOFF__GENLOCK_OUT (0x0250)
#define REGADDOFF__CAMERA_SYNC_OUT (0x0260)
#define REGADDOFF__SYS_TIMECODE (0x0400)
#define REGADDOFF__SYS_GENLOCK (0x0410)
#define REGADDOFF__SYS_CLOCK (0x0420)
#define REGADDOFF__RECORD_SIG_GENERATOR (0x0500)
#define REGADDOFF__FPGA_INFO (0x0020)
#define REGADDOFF__TTLIN (0x0100)
#define REGADDOFF__EXTERNAL_TIMECODE (0x0120)
#define REGADDOFF__EXTERNAL_GENLOCK (0x0130)
#define REGADDOFF__INTERNAL_TIMECODE (0x0300)
#define REGADDOFF__INTERNAL_GENLOCK (0x0310)
#define REGADDOFF__INTERNAL_CLOCK (0x0320)
#define REGADDOFF__INTERNAL_SIG_EN_CONTRLER (0x03A0)
#define REGADDOFF__TTLOUT1 (0x0200)
#define REGADDOFF__TTLOUT2 (0x0210)
#define REGADDOFF__TTLOUT3 (0x0220)
#define REGADDOFF__TTLOUT4 (0x0230)
#define REGADDOFF__TIMECODE_OUT (0x0240)
#define REGADDOFF__GENLOCK_OUT (0x0250)
#define REGADDOFF__CAMERA_SYNC_OUT (0x0260)
#define REGADDOFF__SYS_TIMECODE (0x0400)
#define REGADDOFF__SYS_GENLOCK (0x0410)
#define REGADDOFF__SYS_CLOCK (0x0420)
#define REGADDOFF__RECORD_SIG_GENERATOR (0x0500)
#define REGADDOFF__DELAYER (0x0600)
typedef enum {
/**
@ -232,6 +234,15 @@ typedef enum {
internal_clock_en = REGADDOFF__INTERNAL_CLOCK + 2,
internal_clock_freq = REGADDOFF__INTERNAL_CLOCK + 3,
// REGADDOFF__INTERNAL_SIG_EN_CONTRLER
/*******************************************************************************
* *
*******************************************************************************/
internal_sig_en_contrler_module = REGADDOFF__INTERNAL_SIG_EN_CONTRLER + 0,
internal_sig_en_contrler_en = REGADDOFF__INTERNAL_SIG_EN_CONTRLER + 1,
/*******************************************************************************
* SYSCLOCK *
*******************************************************************************/

13
src/xsync_v2.cpp

@ -317,6 +317,19 @@ class Xsync : public IXsync {
virtual xs_error_code_t ExternalGenlock_detectFreq(float &freq) override;
virtual xs_error_code_t InternalSigSrouce_start() override { //
DO_XSYNC(reg_write(reg::internal_sig_en_contrler_en, 0x7, 10));
}
virtual xs_error_code_t InternalSigSrouce_stop() override { //
DO_XSYNC(reg_write(reg::internal_sig_en_contrler_en, 0x0, 10));
}
virtual xs_error_code_t InternalSigSrouce_readState(bool &en) override {
uint32_t en_u32;
DO_XSYNC(reg_read(reg::internal_sig_en_contrler_en, en_u32, 10));
en = en_u32;
return kxs_ec_success;
}
virtual xs_error_code_t InternalTimecode_setFormat(TimecodeFormat_t format) override;
virtual xs_error_code_t InternalTimecode_getFormat(TimecodeFormat_t &format) override;
virtual xs_error_code_t InternalTimecode_setCode(XsyncTimecode_t timecode) override;

Loading…
Cancel
Save