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166 lines
6.9 KiB
166 lines
6.9 KiB
#pragma once
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#include <fstream>
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#include <functional>
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#include <iostream>
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#include <list>
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#include <map>
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#include <memory>
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#include <set>
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#include <sstream>
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#include <string>
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#include <vector>
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namespace xsync {
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namespace reg {
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using namespace std;
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#define REG_ADD_OFF_STM32 (0x0000)
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#define REG_ADD_OFF_STM32_CONFIG_START_ADD (0x0010)
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#define REG_ADD_OFF_FPGA_TEST (0x00020)
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// 控制中心寄存器地址
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#define REG_ADD_OFF_SIG_GENERATOR (0x00030)
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// 输入组件
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#define REG_ADD_OFF_TTLIN1 (0x0100)
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#define REG_ADD_OFF_TIMECODE_IN (0x0140)
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#define REG_ADD_OFF_GENLOCK_IN (0x0150)
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// 输出组件
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#define REG_ADD_OFF_TTLOUT1 (0x0200)
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#define REG_ADD_OFF_TTLOUT2 (0x0210)
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#define REG_ADD_OFF_TTLOUT3 (0x0220)
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#define REG_ADD_OFF_TTLOUT4 (0x0230)
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#define REG_ADD_OFF_TIMECODE_OUT (0x0240)
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#define REG_ADD_OFF_GENLOCK_OUT (0x0250)
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#define REG_ADD_OFF_CAMERA_SYNC_OUT (0x0260)
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// 调试组件
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#define REG_ADD_OFF_DEBUGER (0x0300)
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typedef enum {
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/**
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* @brief
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* REG 0(16) 设备信息基础寄存器
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*/
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ksoftware_version = 0,
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kmanufacturer0 = 1,
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kmanufacturer1 = 2,
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kproduct_type_id = 3,
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ksn_id0 = 4,
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ksn_id1 = 5,
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ksn_id2 = 6,
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kmac0 = 7,
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kmac1 = 8,
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/**
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* @brief
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* REG 16(32) STM32配置寄存器0
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*/
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kstm32_obtaining_ip_mode = REG_ADD_OFF_STM32_CONFIG_START_ADD + 0,
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kstm32_ip = REG_ADD_OFF_STM32_CONFIG_START_ADD + 1,
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kstm32_gw = REG_ADD_OFF_STM32_CONFIG_START_ADD + 2,
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kstm32_netmask = REG_ADD_OFF_STM32_CONFIG_START_ADD + 3,
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kstm32_config0 = REG_ADD_OFF_STM32_CONFIG_START_ADD + 4, // bit0: timecode report enable, bit1: camera sync report enable
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kstm32_camera_sync_signal_count = REG_ADD_OFF_STM32_CONFIG_START_ADD + 5, // 写任意数值之后清零
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kstm32_camera_sync_signal_count_report_period = REG_ADD_OFF_STM32_CONFIG_START_ADD + 6, // 上报周期，单位为帧数
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kstm32_action0 = REG_ADD_OFF_STM32_CONFIG_START_ADD + 14, // action reg
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kstm32_action_val0 = REG_ADD_OFF_STM32_CONFIG_START_ADD + 15, // action val reg
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/**
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* @brief
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* REG 48(32) FPGA配置寄存器0
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*/
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kfpga_test_reg0 = REG_ADD_OFF_FPGA_TEST + 0,
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kfpga_test_reg1 = REG_ADD_OFF_FPGA_TEST + 1,
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kfpga_test_reg2 = REG_ADD_OFF_FPGA_TEST + 2,
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kfpga_test_reg3 = REG_ADD_OFF_FPGA_TEST + 3,
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kfpga_test_reg4 = REG_ADD_OFF_FPGA_TEST + 4,
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kfpga_test_reg5 = REG_ADD_OFF_FPGA_TEST + 5,
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kfpga_test_reg6 = REG_ADD_OFF_FPGA_TEST + 6,
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kfpga_test_reg7 = REG_ADD_OFF_FPGA_TEST + 7,
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kfpga_test_reg8 = REG_ADD_OFF_FPGA_TEST + 8,
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kfpga_test_reg9 = REG_ADD_OFF_FPGA_TEST + 9,
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kfpga_test_rega = REG_ADD_OFF_FPGA_TEST + 10,
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kfpga_test_regb = REG_ADD_OFF_FPGA_TEST + 11,
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kfpga_test_regc = REG_ADD_OFF_FPGA_TEST + 12,
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kfpga_test_regd = REG_ADD_OFF_FPGA_TEST + 13,
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kfpga_test_rege = REG_ADD_OFF_FPGA_TEST + 14,
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kfpga_test_regf = REG_ADD_OFF_FPGA_TEST + 15,
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/**
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* @brief 信号发生器模块
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*/
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kSigGenerator_ctl = REG_ADD_OFF_SIG_GENERATOR + 0, // 控制模式选择寄存器
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kSigGenerator_genlock_format = REG_ADD_OFF_SIG_GENERATOR + 2, // genlock格式寄存器
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kSigGenerator_timecode_format = REG_ADD_OFF_SIG_GENERATOR + 3, // timecode格式寄存器
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kSigGenerator_control_trigger_reg = REG_ADD_OFF_SIG_GENERATOR + 4, // StartSigCtrl[0]
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kSigGenerator_timecode0 = REG_ADD_OFF_SIG_GENERATOR + 6, // timecode0
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kSigGenerator_timecode1 = REG_ADD_OFF_SIG_GENERATOR + 7, // timecode1
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kSigGenerator_timecode_start0 = REG_ADD_OFF_SIG_GENERATOR + 8, // 时码启动寄存器0
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kSigGenerator_timecode_start1 = REG_ADD_OFF_SIG_GENERATOR + 9, // 时码启动寄存器1
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kSigGenerator_work_state = REG_ADD_OFF_SIG_GENERATOR + 12, // 工作状态 read only
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/**
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* @brief TTL输出模块
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*/
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kttlout1_input_sig_slt = REG_ADD_OFF_TTLOUT1 + 0,
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kttlout1_output_sig_slt = REG_ADD_OFF_TTLOUT1 + 1,
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kttlout1_config = REG_ADD_OFF_TTLOUT1 + 2,
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kttlout1_pulse_mode_duration = REG_ADD_OFF_TTLOUT1 + 3,
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kttlout1_pulse_mode_delay = REG_ADD_OFF_TTLOUT1 + 4,
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kttlout2_input_sig_slt = REG_ADD_OFF_TTLOUT2 + 0,
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kttlout2_output_sig_slt = REG_ADD_OFF_TTLOUT2 + 1,
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kttlout2_config = REG_ADD_OFF_TTLOUT2 + 2,
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kttlout2_pulse_mode_duration = REG_ADD_OFF_TTLOUT2 + 3,
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kttlout2_pulse_mode_delay = REG_ADD_OFF_TTLOUT2 + 4,
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kttlout3_input_sig_slt = REG_ADD_OFF_TTLOUT3 + 0,
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kttlout3_output_sig_slt = REG_ADD_OFF_TTLOUT3 + 1,
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kttlout3_config = REG_ADD_OFF_TTLOUT3 + 2,
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kttlout3_pulse_mode_duration = REG_ADD_OFF_TTLOUT3 + 3,
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kttlout3_pulse_mode_delay = REG_ADD_OFF_TTLOUT3 + 4,
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kttlout4_input_sig_slt = REG_ADD_OFF_TTLOUT4 + 0,
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kttlout4_output_sig_slt = REG_ADD_OFF_TTLOUT4 + 1,
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kttlout4_config = REG_ADD_OFF_TTLOUT4 + 2,
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kttlout4_pulse_mode_duration = REG_ADD_OFF_TTLOUT4 + 3,
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kttlout4_pulse_mode_delay = REG_ADD_OFF_TTLOUT4 + 4,
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/**
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* @brief 时码输出控制模块
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* REG_ADD_OFF_TIMECODE_OUT
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*/
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ktimecode_out_timecode_select = REG_ADD_OFF_TIMECODE_OUT + 0,
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ktimecode_out_timecode0 = REG_ADD_OFF_TIMECODE_OUT + 1,
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ktimecode_out_timecode1 = REG_ADD_OFF_TIMECODE_OUT + 2,
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ktimecode_out_timecode_format = REG_ADD_OFF_TIMECODE_OUT + 3,
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ktimecode_out_bnc_outut_level_select = REG_ADD_OFF_TIMECODE_OUT + 4,
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ktimecode_out_headphone_outut_level_select = REG_ADD_OFF_TIMECODE_OUT + 5,
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kcamera_sync_out_camera_sync_select = REG_ADD_OFF_CAMERA_SYNC_OUT + 0,
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/*******************************************************************************
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* 时码输入模块 *
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*******************************************************************************/
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ktimecode_in_timecode_sig_selt = REG_ADD_OFF_TIMECODE_IN + 0,
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ktimecode_in_timecode_format = REG_ADD_OFF_TIMECODE_IN + 1,
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ktimecode_in_timecode0 = REG_ADD_OFF_TIMECODE_IN + 2,
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ktimecode_in_timecode1 = REG_ADD_OFF_TIMECODE_IN + 3,
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/*******************************************************************************
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* TTL输入模块 *
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*******************************************************************************/
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kttlin_en = REG_ADD_OFF_TTLIN1 + 0,
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kttlin1_devide_factor = REG_ADD_OFF_TTLIN1 + 1,
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kttlin2_devide_factor = REG_ADD_OFF_TTLIN1 + 2,
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kttlin3_devide_factor = REG_ADD_OFF_TTLIN1 + 3,
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kttlin4_devide_factor = REG_ADD_OFF_TTLIN1 + 4,
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kttlin1_filter_factor = REG_ADD_OFF_TTLIN1 + 5,
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kttlin2_filter_factor = REG_ADD_OFF_TTLIN1 + 6,
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kttlin3_filter_factor = REG_ADD_OFF_TTLIN1 + 7,
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kttlin4_filter_factor = REG_ADD_OFF_TTLIN1 + 8,
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} RegAdd_t;
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} // namespace reg
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} // namespace xsync
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