diff --git a/README.md b/README.md index f0e95dc..caa7957 100644 --- a/README.md +++ b/README.md @@ -4,7 +4,7 @@ https://iflytop1.feishu.cn/docx/Fk3CdIRNZoal1XxCGgjc9q1Dn1f https://iflytop1.feishu.cn/wiki/DyHLwd2pLicjXxkWNEvc7vI7n2b -cfg_gen_sfc -device_name W25Q128Q -opcode 107 -sbit_start_address 0 -sbit D:/workspace/p_lusterinc/xsync_fpge/generate_bitstream/Top.sbit +cfg_gen_sfc -device_name W25Q128Q -opcode 107 -sbit_start_address 0 -sbit ./generate_bitstream/Top.sbit ``` diff --git a/constraint_check/constraint_check.ccr b/constraint_check/constraint_check.ccr index 20a4fa9..1ccb31e 100644 --- a/constraint_check/constraint_check.ccr +++ b/constraint_check/constraint_check.ccr @@ -1,4 +1,4 @@ -##### Written on 2024/08/28 22:14:17 ############################### +##### Written on 2024/08/29 09:31:59 ############################### ##### INFO ################################################## diff --git a/multiseed_summary.csv b/multiseed_summary.csv index 209d27c..072c4ec 100644 --- a/multiseed_summary.csv +++ b/multiseed_summary.csv @@ -3,7 +3,7 @@ project name,xsync.pds Single Seed: Seed,State,Convergence,Setup(Slow),Setup(Fast),Hold(Slow),Hold(Fast),Recovery(Slow),Recovery(Fast),Removal(Slow),Removal(Fast),PBM-GP,PBM-PreGP,PBM-PostGP,LP,Total Placement Cpu Time,Detailed routing,Total Routing Cpu Time,Wire Length After Post-GP,Wire Length After LP,Wire Length After DP,Routing Arc Length,Worst Slack After GP Timing,Worst Slack After LP Timing,Worst Slack Before RP,Worst Slack Before DP,Worst Slack After DP,Worst Slack After Placement,Worst Slack After TA By Preroute,TNS After DP,TNS Before Route,Setup(Slow) Total Failing TNS,Setup(Slow) Total Failing Endpoints,Hold(Slow) Total Failing THS,Hold(Slow) Total Failing Endpoints,Power -single,NA,NA,NA,NA,NA,NA,NA,NA,NA,NA,NA,NA,NA,0.83,13.73,15.14,20.03,NA,NA,NA,195954,NA,NA,991796,991796,991796,991796,NA,0,0,NA,NA,NA,NA,NA +single,NA,NA,NA,NA,NA,NA,NA,NA,NA,NA,NA,NA,NA,0.48,55.33,10.75,15.23,NA,NA,NA,195954,NA,NA,991796,991796,991796,991796,NA,0,0,NA,NA,NA,NA,NA Pass Rate/Convergence Rate,0.00%,0.00% Synthesize: @@ -11,7 +11,7 @@ control_set,424 Synthesize Performance Summary: slack category,Synthesize Setup WNS,Synthesize Setup TNS,Synthesize Recovery WNS,Synthesize Recovery TNS slack value,992.726,0.000,996.032,0.000 -Synthesize Process Cpu Time,0h:0m:12s +Synthesize Process Cpu Time,0h:0m:19s Device Map: Device Map Resource Usage Summary: @@ -19,7 +19,7 @@ Logic Utilization,LUT,FF,DRM,APM,Distributed RAM,HSSTHP,USCM,HCKB,RCKB Used,12576,10121,0,0,0,NA,1,0,0 Available,66600,133200,155,240,19900,NA,32,96,24 Utilization(%),19%,8%,0%,0%,0%,NA,4%,0%,0% -Device Map Process Cpu Time,0h:0m:5s +Device Map Process Cpu Time,0h:0m:32s Project Configurations: top module,Top diff --git a/release/v1.0.0/Top.sbit b/release/v1.0.0/Top.sbit new file mode 100644 index 0000000..0fa79a1 Binary files /dev/null and b/release/v1.0.0/Top.sbit differ diff --git a/release/v1.0.0/Top.sfc b/release/v1.0.0/Top.sfc new file mode 100644 index 0000000..0154bd4 Binary files /dev/null and b/release/v1.0.0/Top.sfc differ diff --git a/source/src/config.v b/source/src/config.v index c84bbbe..773f303 100644 --- a/source/src/config.v +++ b/source/src/config.v @@ -43,4 +43,4 @@ `define TTL_OUTPUT_TRIGGER_MODE_SIG_WIDTH 32'd1000 `define FREQ_DETECT_BIAS_DEFAULT 32'd10 `define EXT_TIMECODE_FREQ_DETECT_BIAS_DEFAULT 32'd500 -`define VERSION 32'd5 +`define VERSION 32'h00010000 //32'h main(2byte) sub(1byte) fix(1byte) diff --git a/xsync.pds b/xsync.pds index a973b81..a38967a 100644 --- a/xsync.pds +++ b/xsync.pds @@ -1,5 +1,5 @@ (_flow fab_demo "2022.2-SP4.2" - (_comment "Generated by Fabric Compiler (version on 2022.2-SP4.2) at Wed Aug 28 22:21:19 2024") + (_comment "Generated by Fabric Compiler (version on 2022.2-SP4.2) at Thu Aug 29 09:38:41 2024") (_version "1.1.0") (_status "initial") (_project @@ -322,17 +322,17 @@ (_db_output (_file "compile/Top_comp.adf" (_format adif) - (_timespec "2024-08-28T22:14:10") + (_timespec "2024-08-29T09:31:51") ) ) (_output (_file "compile/Top.cmr" (_format verilog) - (_timespec "2024-08-28T22:14:10") + (_timespec "2024-08-29T09:31:51") ) (_file "compile/cmr.db" (_format text) - (_timespec "2024-08-28T22:14:10") + (_timespec "2024-08-29T09:31:51") ) ) ) @@ -347,25 +347,25 @@ (_db_output (_file "synthesize/Top_syn.adf" (_format adif) - (_timespec "2024-08-28T22:16:16") + (_timespec "2024-08-29T09:32:28") ) ) (_output (_file "synthesize/Top_syn.vm" (_format structural_verilog) - (_timespec "2024-08-28T22:16:27") + (_timespec "2024-08-29T09:32:30") ) (_file "synthesize/Top_controlsets.txt" (_format text) - (_timespec "2024-08-28T22:16:02") + (_timespec "2024-08-29T09:32:25") ) (_file "synthesize/snr.db" (_format text) - (_timespec "2024-08-28T22:16:33") + (_timespec "2024-08-29T09:32:32") ) (_file "synthesize/Top.snr" (_format text) - (_timespec "2024-08-28T22:16:33") + (_timespec "2024-08-29T09:32:31") ) ) ) @@ -386,21 +386,21 @@ (_db_output (_file "device_map/Top_map.adf" (_format adif) - (_timespec "2024-08-28T22:17:03") + (_timespec "2024-08-29T09:33:33") ) ) (_output (_file "device_map/Top_dmr.prt" (_format text) - (_timespec "2024-08-28T22:16:42") + (_timespec "2024-08-29T09:33:07") ) (_file "device_map/Top.dmr" (_format text) - (_timespec "2024-08-28T22:17:03") + (_timespec "2024-08-29T09:33:33") ) (_file "device_map/dmr.db" (_format text) - (_timespec "2024-08-28T22:17:03") + (_timespec "2024-08-29T09:33:33") ) ) ) @@ -409,7 +409,7 @@ (_input (_file "device_map/xsync.pcf" (_format pcf) - (_timespec "2024-08-28T22:17:03") + (_timespec "2024-08-29T09:33:33") ) ) ) @@ -430,33 +430,33 @@ (_db_output (_file "place_route/Top_pnr.adf" (_format adif) - (_timespec "2024-08-28T22:20:11") + (_timespec "2024-08-29T09:36:55") ) ) (_output (_file "place_route/clock_utilization.txt" (_format text) - (_timespec "2024-08-28T22:19:38") + (_timespec "2024-08-29T09:36:43") ) (_file "place_route/Top_plc.adf" (_format adif) - (_timespec "2024-08-28T22:18:13") + (_timespec "2024-08-29T09:36:04") ) (_file "place_route/Top.prr" (_format text) - (_timespec "2024-08-28T22:20:11") + (_timespec "2024-08-29T09:36:55") ) (_file "place_route/Top_prr.prt" (_format text) - (_timespec "2024-08-28T22:19:38") + (_timespec "2024-08-29T09:36:43") ) (_file "place_route/Top_pnr.netlist" (_format text) - (_timespec "2024-08-28T22:20:11") + (_timespec "2024-08-29T09:36:55") ) (_file "place_route/prr.db" (_format text) - (_timespec "2024-08-28T22:20:12") + (_timespec "2024-08-29T09:36:55") ) ) ) @@ -492,19 +492,19 @@ (_output (_file "generate_bitstream/Top.sbit" (_format text) - (_timespec "2024-08-28T22:21:15") + (_timespec "2024-08-29T09:38:37") ) (_file "generate_bitstream/Top.smsk" (_format text) - (_timespec "2024-08-28T22:21:16") + (_timespec "2024-08-29T09:38:37") ) (_file "generate_bitstream/bgr.db" (_format text) - (_timespec "2024-08-28T22:21:19") + (_timespec "2024-08-29T09:38:40") ) (_file "generate_bitstream/Top.bgr" (_format text) - (_timespec "2024-08-28T22:21:18") + (_timespec "2024-08-29T09:38:40") ) ) ) diff --git a/xsync.pds.lock b/xsync.pds.lock index d93ad85..3d5d5a2 100644 --- a/xsync.pds.lock +++ b/xsync.pds.lock @@ -1,4 +1,4 @@ -25920 +17672 pds ZHAOHE f8caf121-d1d2-4c26-8a45-7e1d59cde8b6