diff --git a/constraint_check/constraint_check.ccr b/constraint_check/constraint_check.ccr index e158f5d..7acdbcf 100644 --- a/constraint_check/constraint_check.ccr +++ b/constraint_check/constraint_check.ccr @@ -1,4 +1,4 @@ -##### Written on 2024/08/25 22:23:43 ############################### +##### Written on 2024/08/25 23:04:22 ############################### ##### INFO ################################################## diff --git a/multiseed_summary.csv b/multiseed_summary.csv index c1a470d..2bd9ba6 100644 --- a/multiseed_summary.csv +++ b/multiseed_summary.csv @@ -3,7 +3,7 @@ project name,xsync.pds Single Seed: Seed,State,Convergence,Setup(Slow),Setup(Fast),Hold(Slow),Hold(Fast),Recovery(Slow),Recovery(Fast),Removal(Slow),Removal(Fast),PBM-GP,PBM-PreGP,PBM-PostGP,LP,Total Placement Cpu Time,Detailed routing,Total Routing Cpu Time,Wire Length After Post-GP,Wire Length After LP,Wire Length After DP,Routing Arc Length,Worst Slack After GP Timing,Worst Slack After LP Timing,Worst Slack Before RP,Worst Slack Before DP,Worst Slack After DP,Worst Slack After Placement,Worst Slack After TA By Preroute,TNS After DP,TNS Before Route,Setup(Slow) Total Failing TNS,Setup(Slow) Total Failing Endpoints,Hold(Slow) Total Failing THS,Hold(Slow) Total Failing Endpoints,Power -single,NA,NA,NA,NA,NA,NA,NA,NA,NA,NA,NA,NA,NA,0.05,3.50,0.03,4.64,NA,NA,NA,665,NA,NA,997980,997980,997980,997980,NA,0,0,NA,NA,NA,NA,NA +single,NA,NA,NA,NA,NA,NA,NA,NA,NA,NA,NA,NA,NA,0.02,1.62,0.02,2.08,NA,NA,NA,665,NA,NA,997980,997980,997980,997980,NA,0,0,NA,NA,NA,NA,NA Pass Rate/Convergence Rate,0.00%,0.00% Synthesize: @@ -19,7 +19,7 @@ Logic Utilization,LUT,FF,DRM,APM,Distributed RAM,HSSTHP,USCM,HCKB,RCKB Used,45,29,0,0,0,NA,1,0,0 Available,66600,133200,155,240,19900,NA,32,96,24 Utilization(%),1%,1%,0%,0%,0%,NA,4%,0%,0% -Device Map Process Cpu Time,0h:0m:2s +Device Map Process Cpu Time,0h:0m:3s Project Configurations: top module,Top diff --git a/xsync.csv b/xsync.csv index b5aa1a8..07ff4ec 100644 --- a/xsync.csv +++ b/xsync.csv @@ -1,68 +1,54 @@ NAME,PAP_IO_DIRECTION,PAP_IO_LOC,PAP_IO_VCCIO,PAP_IO_STANDARD,PAP_IO_NONE -ex_clk,INPUT,R4,3.3,LVCMOS15,TRUE -ex_rst_n,INPUT,U7,NA,NA,TRUE -genlock_in_hsync,INPUT,M15,NA,NA,NA -genlock_in_vsync,INPUT,M16,NA,NA,NA -genlock_in_fsync,INPUT,L16,NA,NA,NA -genlock_in_state_led,OUTPUT,NA,NA,NA,NA -genlock_out_dac[0],OUTPUT,E14,NA,NA,NA -genlock_out_dac[1],OUTPUT,E13,NA,NA,NA -genlock_out_dac[2],OUTPUT,F14,NA,NA,NA -genlock_out_dac[3],OUTPUT,F13,NA,NA,NA -genlock_out_dac[4],OUTPUT,C22,NA,NA,NA -genlock_out_dac[5],OUTPUT,B22,NA,NA,NA -genlock_out_dac[6],OUTPUT,C20,NA,NA,NA -genlock_out_dac[7],OUTPUT,D20,NA,NA,NA -genlock_out_dac[8],OUTPUT,C19,NA,NA,NA -genlock_out_dac_clk,OUTPUT,C18,NA,NA,NA -genlock_out_dac_state_led,OUTPUT,NA,NA,NA,NA -sync_ttl_in1,INPUT,K18,NA,NA,NA -sync_ttl_in1_state_led,OUTPUT,NA,NA,NA,NA -sync_ttl_in2,INPUT,K19,NA,NA,NA -sync_ttl_in2_state_led,OUTPUT,NA,NA,NA,NA -sync_ttl_in3,INPUT,M13,NA,NA,NA -sync_ttl_in3_state_led,OUTPUT,NA,NA,NA,NA -sync_ttl_in4,INPUT,L13,NA,NA,NA -sync_ttl_in4_state_led,OUTPUT,NA,NA,NA,NA -sync_ttl_out1,OUTPUT,AA8,NA,NA,NA -sync_ttl_out1_state_led,OUTPUT,NA,NA,NA,NA -sync_ttl_out2,OUTPUT,V9,NA,NA,NA -sync_ttl_out2_state_led,OUTPUT,NA,NA,NA,NA -sync_ttl_out3,OUTPUT,V8,NA,NA,NA -sync_ttl_out3_state_led,OUTPUT,NA,NA,NA,NA -sync_ttl_out4,OUTPUT,T6,NA,NA,NA -sync_ttl_out4_state_led,OUTPUT,NA,NA,NA,NA -timecode_headphone_in,INPUT,L15,NA,NA,NA -timecode_headphone_in_state_led,OUTPUT,NA,NA,NA,NA -timecode_bnc_in,INPUT,L14,NA,NA,NA -timecode_bnc_in_state_led,OUTPUT,NA,NA,NA,NA -timecode_out_bnc,OUTPUT,W9,NA,NA,NA -timecode_out_bnc_select,OUTPUT,R6,NA,NA,NA -timecode_out_bnc_state_led,OUTPUT,NA,NA,NA,NA -timecode_out_headphone,OUTPUT,Y9,NA,NA,NA -timecode_out_headphone_select,OUTPUT,T3,NA,NA,NA -timecode_out_headphone_state_led,OUTPUT,NA,NA,NA,NA -stm32if_start_signal_out,OUTPUT,Y21,NA,NA,NA -stm32if_camera_sync_out,OUTPUT,Y22,NA,NA,NA -stm32if_timecode_sync_out,OUTPUT,AB20,NA,NA,NA -spi1_cs_pin,INPUT,W7,NA,NA,NA -spi1_clk_pin,INPUT,V7,NA,NA,NA -spi1_rx_pin,INPUT,Y7,NA,NA,NA -spi1_tx_pin,OUTPUT,Y8,NA,NA,NA -debug_signal_output[0],OUTPUT,Y11,NA,NA,NA -debug_signal_output[1],OUTPUT,Y12,NA,NA,NA -debug_signal_output[2],OUTPUT,AA10,NA,NA,NA -debug_signal_output[3],OUTPUT,AA11,NA,NA,NA -debug_signal_output[4],OUTPUT,AB11,NA,NA,NA -debug_signal_output[5],OUTPUT,AB12,NA,NA,NA -debug_signal_output[6],OUTPUT,W11,NA,NA,NA -debug_signal_output[7],OUTPUT,W12,NA,NA,NA -debug_signal_output[8],OUTPUT,AA13,NA,NA,NA -debug_signal_output[9],OUTPUT,AB13,NA,NA,NA -debug_signal_output[10],OUTPUT,Y13,NA,NA,NA -debug_signal_output[11],OUTPUT,AA14,NA,NA,NA -debug_signal_output[12],OUTPUT,AA15,NA,NA,NA -debug_signal_output[13],OUTPUT,AB15,NA,NA,NA -debug_signal_output[14],OUTPUT,Y16,NA,NA,NA -debug_signal_output[15],OUTPUT,AA16,NA,NA,NA -core_board_debug_led,OUTPUT,W5,NA,NA,NA \ No newline at end of file +ex_clk,INPUT,R4,1.5,LVCMOS15,TRUE +ex_rst_n,INPUT,U7,1.5,LVCMOS15,TRUE +genlock_in_hsync,INPUT,M15,1.5,LVCMOS15,NA +genlock_in_vsync,INPUT,M16,1.5,LVCMOS15,NA +genlock_in_fsync,INPUT,L16,1.5,LVCMOS15,NA +genlock_out_dac[0],OUTPUT,E14,1.5,LVCMOS15,NA +genlock_out_dac[1],OUTPUT,E13,1.5,LVCMOS15,NA +genlock_out_dac[2],OUTPUT,F14,1.5,LVCMOS15,NA +genlock_out_dac[3],OUTPUT,F13,1.5,LVCMOS15,NA +genlock_out_dac[4],OUTPUT,C22,1.5,LVCMOS15,NA +genlock_out_dac[5],OUTPUT,B22,1.5,LVCMOS15,NA +genlock_out_dac[6],OUTPUT,C20,1.5,LVCMOS15,NA +genlock_out_dac[7],OUTPUT,D20,1.5,LVCMOS15,NA +genlock_out_dac[8],OUTPUT,C19,1.5,LVCMOS15,NA +genlock_out_dac_clk,OUTPUT,C18,1.5,LVCMOS15,NA +sync_ttl_in1,INPUT,K18,1.5,LVCMOS15,NA +sync_ttl_in2,INPUT,K19,1.5,LVCMOS15,NA +sync_ttl_in3,INPUT,M13,1.5,LVCMOS15,NA +sync_ttl_in4,INPUT,L13,1.5,LVCMOS15,NA +sync_ttl_out1,OUTPUT,AA8,1.5,LVCMOS15,NA +sync_ttl_out2,OUTPUT,V9,1.5,LVCMOS15,NA +sync_ttl_out3,OUTPUT,V8,1.5,LVCMOS15,NA +sync_ttl_out4,OUTPUT,T6,1.5,LVCMOS15,NA +timecode_headphone_in,INPUT,L15,1.5,LVCMOS15,NA +timecode_bnc_in,INPUT,L14,1.5,LVCMOS15,NA +timecode_out_bnc,OUTPUT,W9,1.5,LVCMOS15,NA +timecode_out_bnc_select,OUTPUT,R6,1.5,LVCMOS15,NA +timecode_out_headphone,OUTPUT,Y9,1.5,LVCMOS15,NA +timecode_out_headphone_select,OUTPUT,T3,1.5,LVCMOS15,NA +stm32if_start_signal_out,OUTPUT,Y21,1.5,LVCMOS15,NA +stm32if_camera_sync_out,OUTPUT,Y22,1.5,LVCMOS15,NA +stm32if_timecode_sync_out,OUTPUT,AB20,1.5,LVCMOS15,NA +spi1_cs_pin,INPUT,W7,1.5,LVCMOS15,NA +spi1_clk_pin,INPUT,V7,1.5,LVCMOS15,NA +spi1_rx_pin,INPUT,Y7,1.5,LVCMOS15,NA +spi1_tx_pin,OUTPUT,Y8,1.5,LVCMOS15,NA +debug_signal_output[0],OUTPUT,Y11,1.5,LVCMOS15,NA +debug_signal_output[1],OUTPUT,Y12,1.5,LVCMOS15,NA +debug_signal_output[2],OUTPUT,AA10,1.5,LVCMOS15,NA +debug_signal_output[3],OUTPUT,AA11,1.5,LVCMOS15,NA +debug_signal_output[4],OUTPUT,AB11,1.5,LVCMOS15,NA +debug_signal_output[5],OUTPUT,AB12,1.5,LVCMOS15,NA +debug_signal_output[6],OUTPUT,W11,1.5,LVCMOS15,NA +debug_signal_output[7],OUTPUT,W12,1.5,LVCMOS15,NA +debug_signal_output[8],OUTPUT,AA13,1.5,LVCMOS15,NA +debug_signal_output[9],OUTPUT,AB13,1.5,LVCMOS15,NA +debug_signal_output[10],OUTPUT,Y13,1.5,LVCMOS15,NA +debug_signal_output[11],OUTPUT,AA14,1.5,LVCMOS15,NA +debug_signal_output[12],OUTPUT,AA15,1.5,LVCMOS15,NA +debug_signal_output[13],OUTPUT,AB15,1.5,LVCMOS15,NA +debug_signal_output[14],OUTPUT,Y16,1.5,LVCMOS15,NA +debug_signal_output[15],OUTPUT,AA16,1.5,LVCMOS15,NA +core_board_debug_led,OUTPUT,W5,1.5,LVCMOS15,NA \ No newline at end of file diff --git a/xsync.fdc b/xsync.fdc index 8603256..4b353ba 100644 --- a/xsync.fdc +++ b/xsync.fdc @@ -1,292 +1,292 @@ define_attribute {p:ex_clk} {PAP_IO_DIRECTION} {INPUT} define_attribute {p:ex_clk} {PAP_IO_LOC} {R4} -define_attribute {p:ex_clk} {PAP_IO_VCCIO} {3.3} +define_attribute {p:ex_clk} {PAP_IO_VCCIO} {1.5} define_attribute {p:ex_clk} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:ex_clk} {PAP_IO_NONE} {TRUE} define_attribute {p:ex_rst_n} {PAP_IO_DIRECTION} {INPUT} define_attribute {p:ex_rst_n} {PAP_IO_LOC} {U7} +define_attribute {p:ex_rst_n} {PAP_IO_VCCIO} {1.5} +define_attribute {p:ex_rst_n} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:ex_rst_n} {PAP_IO_NONE} {TRUE} -define_attribute {p:ex_rst_n} {PAP_IO_VCCIO} {3.3} -define_attribute {p:ex_rst_n} {PAP_IO_STANDARD} {LVTTL33} define_attribute {p:genlock_in_hsync} {PAP_IO_DIRECTION} {INPUT} define_attribute {p:genlock_in_hsync} {PAP_IO_LOC} {M15} -define_attribute {p:genlock_in_hsync} {PAP_IO_VCCIO} {3.3} -define_attribute {p:genlock_in_hsync} {PAP_IO_STANDARD} {LVTTL33} +define_attribute {p:genlock_in_hsync} {PAP_IO_VCCIO} {1.5} +define_attribute {p:genlock_in_hsync} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:genlock_in_vsync} {PAP_IO_DIRECTION} {INPUT} define_attribute {p:genlock_in_vsync} {PAP_IO_LOC} {M16} -define_attribute {p:genlock_in_vsync} {PAP_IO_VCCIO} {3.3} -define_attribute {p:genlock_in_vsync} {PAP_IO_STANDARD} {LVTTL33} +define_attribute {p:genlock_in_vsync} {PAP_IO_VCCIO} {1.5} +define_attribute {p:genlock_in_vsync} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:genlock_in_fsync} {PAP_IO_DIRECTION} {INPUT} define_attribute {p:genlock_in_fsync} {PAP_IO_LOC} {L16} -define_attribute {p:genlock_in_fsync} {PAP_IO_VCCIO} {3.3} -define_attribute {p:genlock_in_fsync} {PAP_IO_STANDARD} {LVTTL33} +define_attribute {p:genlock_in_fsync} {PAP_IO_VCCIO} {1.5} +define_attribute {p:genlock_in_fsync} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:genlock_out_dac[0]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:genlock_out_dac[0]} {PAP_IO_LOC} {E14} -define_attribute {p:genlock_out_dac[0]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:genlock_out_dac[0]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:genlock_out_dac[0]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:genlock_out_dac[0]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:genlock_out_dac[0]} {PAP_IO_DRIVE} {4} define_attribute {p:genlock_out_dac[0]} {PAP_IO_SLEW} {SLOW} define_attribute {p:genlock_out_dac[1]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:genlock_out_dac[1]} {PAP_IO_LOC} {E13} -define_attribute {p:genlock_out_dac[1]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:genlock_out_dac[1]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:genlock_out_dac[1]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:genlock_out_dac[1]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:genlock_out_dac[1]} {PAP_IO_DRIVE} {4} define_attribute {p:genlock_out_dac[1]} {PAP_IO_SLEW} {SLOW} define_attribute {p:genlock_out_dac[2]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:genlock_out_dac[2]} {PAP_IO_LOC} {F14} -define_attribute {p:genlock_out_dac[2]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:genlock_out_dac[2]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:genlock_out_dac[2]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:genlock_out_dac[2]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:genlock_out_dac[2]} {PAP_IO_DRIVE} {4} define_attribute {p:genlock_out_dac[2]} {PAP_IO_SLEW} {SLOW} define_attribute {p:genlock_out_dac[3]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:genlock_out_dac[3]} {PAP_IO_LOC} {F13} -define_attribute {p:genlock_out_dac[3]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:genlock_out_dac[3]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:genlock_out_dac[3]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:genlock_out_dac[3]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:genlock_out_dac[3]} {PAP_IO_DRIVE} {4} define_attribute {p:genlock_out_dac[3]} {PAP_IO_SLEW} {SLOW} define_attribute {p:genlock_out_dac[4]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:genlock_out_dac[4]} {PAP_IO_LOC} {C22} -define_attribute {p:genlock_out_dac[4]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:genlock_out_dac[4]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:genlock_out_dac[4]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:genlock_out_dac[4]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:genlock_out_dac[4]} {PAP_IO_DRIVE} {4} define_attribute {p:genlock_out_dac[4]} {PAP_IO_SLEW} {SLOW} define_attribute {p:genlock_out_dac[5]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:genlock_out_dac[5]} {PAP_IO_LOC} {B22} -define_attribute {p:genlock_out_dac[5]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:genlock_out_dac[5]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:genlock_out_dac[5]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:genlock_out_dac[5]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:genlock_out_dac[5]} {PAP_IO_DRIVE} {4} define_attribute {p:genlock_out_dac[5]} {PAP_IO_SLEW} {SLOW} define_attribute {p:genlock_out_dac[6]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:genlock_out_dac[6]} {PAP_IO_LOC} {C20} -define_attribute {p:genlock_out_dac[6]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:genlock_out_dac[6]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:genlock_out_dac[6]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:genlock_out_dac[6]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:genlock_out_dac[6]} {PAP_IO_DRIVE} {4} define_attribute {p:genlock_out_dac[6]} {PAP_IO_SLEW} {SLOW} define_attribute {p:genlock_out_dac[7]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:genlock_out_dac[7]} {PAP_IO_LOC} {D20} -define_attribute {p:genlock_out_dac[7]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:genlock_out_dac[7]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:genlock_out_dac[7]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:genlock_out_dac[7]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:genlock_out_dac[7]} {PAP_IO_DRIVE} {4} define_attribute {p:genlock_out_dac[7]} {PAP_IO_SLEW} {SLOW} define_attribute {p:genlock_out_dac[8]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:genlock_out_dac[8]} {PAP_IO_LOC} {C19} -define_attribute {p:genlock_out_dac[8]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:genlock_out_dac[8]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:genlock_out_dac[8]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:genlock_out_dac[8]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:genlock_out_dac[8]} {PAP_IO_DRIVE} {4} define_attribute {p:genlock_out_dac[8]} {PAP_IO_SLEW} {SLOW} define_attribute {p:genlock_out_dac_clk} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:genlock_out_dac_clk} {PAP_IO_LOC} {C18} -define_attribute {p:genlock_out_dac_clk} {PAP_IO_VCCIO} {3.3} -define_attribute {p:genlock_out_dac_clk} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:genlock_out_dac_clk} {PAP_IO_VCCIO} {1.5} +define_attribute {p:genlock_out_dac_clk} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:genlock_out_dac_clk} {PAP_IO_DRIVE} {4} define_attribute {p:genlock_out_dac_clk} {PAP_IO_SLEW} {SLOW} define_attribute {p:sync_ttl_in1} {PAP_IO_DIRECTION} {INPUT} define_attribute {p:sync_ttl_in1} {PAP_IO_LOC} {K18} -define_attribute {p:sync_ttl_in1} {PAP_IO_VCCIO} {3.3} -define_attribute {p:sync_ttl_in1} {PAP_IO_STANDARD} {LVTTL33} +define_attribute {p:sync_ttl_in1} {PAP_IO_VCCIO} {1.5} +define_attribute {p:sync_ttl_in1} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:sync_ttl_in2} {PAP_IO_DIRECTION} {INPUT} define_attribute {p:sync_ttl_in2} {PAP_IO_LOC} {K19} -define_attribute {p:sync_ttl_in2} {PAP_IO_VCCIO} {3.3} -define_attribute {p:sync_ttl_in2} {PAP_IO_STANDARD} {LVTTL33} +define_attribute {p:sync_ttl_in2} {PAP_IO_VCCIO} {1.5} +define_attribute {p:sync_ttl_in2} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:sync_ttl_in3} {PAP_IO_DIRECTION} {INPUT} define_attribute {p:sync_ttl_in3} {PAP_IO_LOC} {M13} -define_attribute {p:sync_ttl_in3} {PAP_IO_VCCIO} {3.3} -define_attribute {p:sync_ttl_in3} {PAP_IO_STANDARD} {LVTTL33} +define_attribute {p:sync_ttl_in3} {PAP_IO_VCCIO} {1.5} +define_attribute {p:sync_ttl_in3} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:sync_ttl_in4} {PAP_IO_DIRECTION} {INPUT} define_attribute {p:sync_ttl_in4} {PAP_IO_LOC} {L13} -define_attribute {p:sync_ttl_in4} {PAP_IO_VCCIO} {3.3} -define_attribute {p:sync_ttl_in4} {PAP_IO_STANDARD} {LVTTL33} +define_attribute {p:sync_ttl_in4} {PAP_IO_VCCIO} {1.5} +define_attribute {p:sync_ttl_in4} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:sync_ttl_out1} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:sync_ttl_out1} {PAP_IO_LOC} {AA8} -define_attribute {p:sync_ttl_out1} {PAP_IO_VCCIO} {3.3} -define_attribute {p:sync_ttl_out1} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:sync_ttl_out1} {PAP_IO_VCCIO} {1.5} +define_attribute {p:sync_ttl_out1} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:sync_ttl_out1} {PAP_IO_DRIVE} {4} define_attribute {p:sync_ttl_out1} {PAP_IO_SLEW} {SLOW} define_attribute {p:sync_ttl_out2} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:sync_ttl_out2} {PAP_IO_LOC} {V9} -define_attribute {p:sync_ttl_out2} {PAP_IO_VCCIO} {3.3} -define_attribute {p:sync_ttl_out2} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:sync_ttl_out2} {PAP_IO_VCCIO} {1.5} +define_attribute {p:sync_ttl_out2} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:sync_ttl_out2} {PAP_IO_DRIVE} {4} define_attribute {p:sync_ttl_out2} {PAP_IO_SLEW} {SLOW} define_attribute {p:sync_ttl_out3} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:sync_ttl_out3} {PAP_IO_LOC} {V8} -define_attribute {p:sync_ttl_out3} {PAP_IO_VCCIO} {3.3} -define_attribute {p:sync_ttl_out3} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:sync_ttl_out3} {PAP_IO_VCCIO} {1.5} +define_attribute {p:sync_ttl_out3} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:sync_ttl_out3} {PAP_IO_DRIVE} {4} define_attribute {p:sync_ttl_out3} {PAP_IO_SLEW} {SLOW} define_attribute {p:sync_ttl_out4} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:sync_ttl_out4} {PAP_IO_LOC} {T6} -define_attribute {p:sync_ttl_out4} {PAP_IO_VCCIO} {3.3} -define_attribute {p:sync_ttl_out4} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:sync_ttl_out4} {PAP_IO_VCCIO} {1.5} +define_attribute {p:sync_ttl_out4} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:sync_ttl_out4} {PAP_IO_DRIVE} {4} define_attribute {p:sync_ttl_out4} {PAP_IO_SLEW} {SLOW} define_attribute {p:timecode_headphone_in} {PAP_IO_DIRECTION} {INPUT} define_attribute {p:timecode_headphone_in} {PAP_IO_LOC} {L15} -define_attribute {p:timecode_headphone_in} {PAP_IO_VCCIO} {3.3} -define_attribute {p:timecode_headphone_in} {PAP_IO_STANDARD} {LVTTL33} +define_attribute {p:timecode_headphone_in} {PAP_IO_VCCIO} {1.5} +define_attribute {p:timecode_headphone_in} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:timecode_bnc_in} {PAP_IO_DIRECTION} {INPUT} define_attribute {p:timecode_bnc_in} {PAP_IO_LOC} {L14} -define_attribute {p:timecode_bnc_in} {PAP_IO_VCCIO} {3.3} -define_attribute {p:timecode_bnc_in} {PAP_IO_STANDARD} {LVTTL33} +define_attribute {p:timecode_bnc_in} {PAP_IO_VCCIO} {1.5} +define_attribute {p:timecode_bnc_in} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:timecode_out_bnc} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:timecode_out_bnc} {PAP_IO_LOC} {W9} -define_attribute {p:timecode_out_bnc} {PAP_IO_VCCIO} {3.3} -define_attribute {p:timecode_out_bnc} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:timecode_out_bnc} {PAP_IO_VCCIO} {1.5} +define_attribute {p:timecode_out_bnc} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:timecode_out_bnc} {PAP_IO_DRIVE} {4} define_attribute {p:timecode_out_bnc} {PAP_IO_SLEW} {SLOW} define_attribute {p:timecode_out_bnc_select} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:timecode_out_bnc_select} {PAP_IO_LOC} {R6} -define_attribute {p:timecode_out_bnc_select} {PAP_IO_VCCIO} {3.3} -define_attribute {p:timecode_out_bnc_select} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:timecode_out_bnc_select} {PAP_IO_VCCIO} {1.5} +define_attribute {p:timecode_out_bnc_select} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:timecode_out_bnc_select} {PAP_IO_DRIVE} {4} define_attribute {p:timecode_out_bnc_select} {PAP_IO_SLEW} {SLOW} define_attribute {p:timecode_out_headphone} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:timecode_out_headphone} {PAP_IO_LOC} {Y9} -define_attribute {p:timecode_out_headphone} {PAP_IO_VCCIO} {3.3} -define_attribute {p:timecode_out_headphone} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:timecode_out_headphone} {PAP_IO_VCCIO} {1.5} +define_attribute {p:timecode_out_headphone} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:timecode_out_headphone} {PAP_IO_DRIVE} {4} define_attribute {p:timecode_out_headphone} {PAP_IO_SLEW} {SLOW} define_attribute {p:timecode_out_headphone_select} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:timecode_out_headphone_select} {PAP_IO_LOC} {T3} -define_attribute {p:timecode_out_headphone_select} {PAP_IO_VCCIO} {3.3} -define_attribute {p:timecode_out_headphone_select} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:timecode_out_headphone_select} {PAP_IO_VCCIO} {1.5} +define_attribute {p:timecode_out_headphone_select} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:timecode_out_headphone_select} {PAP_IO_DRIVE} {4} define_attribute {p:timecode_out_headphone_select} {PAP_IO_SLEW} {SLOW} define_attribute {p:stm32if_start_signal_out} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:stm32if_start_signal_out} {PAP_IO_LOC} {Y21} -define_attribute {p:stm32if_start_signal_out} {PAP_IO_VCCIO} {3.3} -define_attribute {p:stm32if_start_signal_out} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:stm32if_start_signal_out} {PAP_IO_VCCIO} {1.5} +define_attribute {p:stm32if_start_signal_out} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:stm32if_start_signal_out} {PAP_IO_DRIVE} {4} define_attribute {p:stm32if_start_signal_out} {PAP_IO_SLEW} {SLOW} define_attribute {p:stm32if_camera_sync_out} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:stm32if_camera_sync_out} {PAP_IO_LOC} {Y22} -define_attribute {p:stm32if_camera_sync_out} {PAP_IO_VCCIO} {3.3} -define_attribute {p:stm32if_camera_sync_out} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:stm32if_camera_sync_out} {PAP_IO_VCCIO} {1.5} +define_attribute {p:stm32if_camera_sync_out} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:stm32if_camera_sync_out} {PAP_IO_DRIVE} {4} define_attribute {p:stm32if_camera_sync_out} {PAP_IO_SLEW} {SLOW} define_attribute {p:stm32if_timecode_sync_out} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:stm32if_timecode_sync_out} {PAP_IO_LOC} {AB20} -define_attribute {p:stm32if_timecode_sync_out} {PAP_IO_VCCIO} {3.3} -define_attribute {p:stm32if_timecode_sync_out} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:stm32if_timecode_sync_out} {PAP_IO_VCCIO} {1.5} +define_attribute {p:stm32if_timecode_sync_out} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:stm32if_timecode_sync_out} {PAP_IO_DRIVE} {4} define_attribute {p:stm32if_timecode_sync_out} {PAP_IO_SLEW} {SLOW} define_attribute {p:spi1_cs_pin} {PAP_IO_DIRECTION} {INPUT} define_attribute {p:spi1_cs_pin} {PAP_IO_LOC} {W7} -define_attribute {p:spi1_cs_pin} {PAP_IO_VCCIO} {3.3} -define_attribute {p:spi1_cs_pin} {PAP_IO_STANDARD} {LVTTL33} +define_attribute {p:spi1_cs_pin} {PAP_IO_VCCIO} {1.5} +define_attribute {p:spi1_cs_pin} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:spi1_clk_pin} {PAP_IO_DIRECTION} {INPUT} define_attribute {p:spi1_clk_pin} {PAP_IO_LOC} {V7} -define_attribute {p:spi1_clk_pin} {PAP_IO_VCCIO} {3.3} -define_attribute {p:spi1_clk_pin} {PAP_IO_STANDARD} {LVTTL33} +define_attribute {p:spi1_clk_pin} {PAP_IO_VCCIO} {1.5} +define_attribute {p:spi1_clk_pin} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:spi1_rx_pin} {PAP_IO_DIRECTION} {INPUT} define_attribute {p:spi1_rx_pin} {PAP_IO_LOC} {Y7} -define_attribute {p:spi1_rx_pin} {PAP_IO_VCCIO} {3.3} -define_attribute {p:spi1_rx_pin} {PAP_IO_STANDARD} {LVTTL33} +define_attribute {p:spi1_rx_pin} {PAP_IO_VCCIO} {1.5} +define_attribute {p:spi1_rx_pin} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:spi1_tx_pin} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:spi1_tx_pin} {PAP_IO_LOC} {Y8} -define_attribute {p:spi1_tx_pin} {PAP_IO_VCCIO} {3.3} -define_attribute {p:spi1_tx_pin} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:spi1_tx_pin} {PAP_IO_VCCIO} {1.5} +define_attribute {p:spi1_tx_pin} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:spi1_tx_pin} {PAP_IO_DRIVE} {4} define_attribute {p:spi1_tx_pin} {PAP_IO_SLEW} {SLOW} define_attribute {p:debug_signal_output[0]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:debug_signal_output[0]} {PAP_IO_LOC} {Y11} -define_attribute {p:debug_signal_output[0]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:debug_signal_output[0]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:debug_signal_output[0]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:debug_signal_output[0]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:debug_signal_output[0]} {PAP_IO_DRIVE} {4} define_attribute {p:debug_signal_output[0]} {PAP_IO_SLEW} {SLOW} define_attribute {p:debug_signal_output[1]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:debug_signal_output[1]} {PAP_IO_LOC} {Y12} -define_attribute {p:debug_signal_output[1]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:debug_signal_output[1]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:debug_signal_output[1]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:debug_signal_output[1]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:debug_signal_output[1]} {PAP_IO_DRIVE} {4} define_attribute {p:debug_signal_output[1]} {PAP_IO_SLEW} {SLOW} define_attribute {p:debug_signal_output[2]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:debug_signal_output[2]} {PAP_IO_LOC} {AA10} -define_attribute {p:debug_signal_output[2]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:debug_signal_output[2]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:debug_signal_output[2]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:debug_signal_output[2]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:debug_signal_output[2]} {PAP_IO_DRIVE} {4} define_attribute {p:debug_signal_output[2]} {PAP_IO_SLEW} {SLOW} define_attribute {p:debug_signal_output[3]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:debug_signal_output[3]} {PAP_IO_LOC} {AA11} -define_attribute {p:debug_signal_output[3]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:debug_signal_output[3]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:debug_signal_output[3]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:debug_signal_output[3]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:debug_signal_output[3]} {PAP_IO_DRIVE} {4} define_attribute {p:debug_signal_output[3]} {PAP_IO_SLEW} {SLOW} define_attribute {p:debug_signal_output[4]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:debug_signal_output[4]} {PAP_IO_LOC} {AB11} -define_attribute {p:debug_signal_output[4]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:debug_signal_output[4]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:debug_signal_output[4]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:debug_signal_output[4]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:debug_signal_output[4]} {PAP_IO_DRIVE} {4} define_attribute {p:debug_signal_output[4]} {PAP_IO_SLEW} {SLOW} define_attribute {p:debug_signal_output[5]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:debug_signal_output[5]} {PAP_IO_LOC} {AB12} -define_attribute {p:debug_signal_output[5]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:debug_signal_output[5]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:debug_signal_output[5]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:debug_signal_output[5]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:debug_signal_output[5]} {PAP_IO_DRIVE} {4} define_attribute {p:debug_signal_output[5]} {PAP_IO_SLEW} {SLOW} define_attribute {p:debug_signal_output[6]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:debug_signal_output[6]} {PAP_IO_LOC} {W11} -define_attribute {p:debug_signal_output[6]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:debug_signal_output[6]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:debug_signal_output[6]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:debug_signal_output[6]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:debug_signal_output[6]} {PAP_IO_DRIVE} {4} define_attribute {p:debug_signal_output[6]} {PAP_IO_SLEW} {SLOW} define_attribute {p:debug_signal_output[7]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:debug_signal_output[7]} {PAP_IO_LOC} {W12} -define_attribute {p:debug_signal_output[7]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:debug_signal_output[7]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:debug_signal_output[7]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:debug_signal_output[7]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:debug_signal_output[7]} {PAP_IO_DRIVE} {4} define_attribute {p:debug_signal_output[7]} {PAP_IO_SLEW} {SLOW} define_attribute {p:debug_signal_output[8]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:debug_signal_output[8]} {PAP_IO_LOC} {AA13} -define_attribute {p:debug_signal_output[8]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:debug_signal_output[8]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:debug_signal_output[8]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:debug_signal_output[8]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:debug_signal_output[8]} {PAP_IO_DRIVE} {4} define_attribute {p:debug_signal_output[8]} {PAP_IO_SLEW} {SLOW} define_attribute {p:debug_signal_output[9]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:debug_signal_output[9]} {PAP_IO_LOC} {AB13} -define_attribute {p:debug_signal_output[9]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:debug_signal_output[9]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:debug_signal_output[9]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:debug_signal_output[9]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:debug_signal_output[9]} {PAP_IO_DRIVE} {4} define_attribute {p:debug_signal_output[9]} {PAP_IO_SLEW} {SLOW} define_attribute {p:debug_signal_output[10]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:debug_signal_output[10]} {PAP_IO_LOC} {Y13} -define_attribute {p:debug_signal_output[10]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:debug_signal_output[10]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:debug_signal_output[10]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:debug_signal_output[10]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:debug_signal_output[10]} {PAP_IO_DRIVE} {4} define_attribute {p:debug_signal_output[10]} {PAP_IO_SLEW} {SLOW} define_attribute {p:debug_signal_output[11]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:debug_signal_output[11]} {PAP_IO_LOC} {AA14} -define_attribute {p:debug_signal_output[11]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:debug_signal_output[11]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:debug_signal_output[11]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:debug_signal_output[11]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:debug_signal_output[11]} {PAP_IO_DRIVE} {4} define_attribute {p:debug_signal_output[11]} {PAP_IO_SLEW} {SLOW} define_attribute {p:debug_signal_output[12]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:debug_signal_output[12]} {PAP_IO_LOC} {AA15} -define_attribute {p:debug_signal_output[12]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:debug_signal_output[12]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:debug_signal_output[12]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:debug_signal_output[12]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:debug_signal_output[12]} {PAP_IO_DRIVE} {4} define_attribute {p:debug_signal_output[12]} {PAP_IO_SLEW} {SLOW} define_attribute {p:debug_signal_output[13]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:debug_signal_output[13]} {PAP_IO_LOC} {AB15} -define_attribute {p:debug_signal_output[13]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:debug_signal_output[13]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:debug_signal_output[13]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:debug_signal_output[13]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:debug_signal_output[13]} {PAP_IO_DRIVE} {4} define_attribute {p:debug_signal_output[13]} {PAP_IO_SLEW} {SLOW} define_attribute {p:debug_signal_output[14]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:debug_signal_output[14]} {PAP_IO_LOC} {Y16} -define_attribute {p:debug_signal_output[14]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:debug_signal_output[14]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:debug_signal_output[14]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:debug_signal_output[14]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:debug_signal_output[14]} {PAP_IO_DRIVE} {4} define_attribute {p:debug_signal_output[14]} {PAP_IO_SLEW} {SLOW} define_attribute {p:debug_signal_output[15]} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:debug_signal_output[15]} {PAP_IO_LOC} {AA16} -define_attribute {p:debug_signal_output[15]} {PAP_IO_VCCIO} {3.3} -define_attribute {p:debug_signal_output[15]} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:debug_signal_output[15]} {PAP_IO_VCCIO} {1.5} +define_attribute {p:debug_signal_output[15]} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:debug_signal_output[15]} {PAP_IO_DRIVE} {4} define_attribute {p:debug_signal_output[15]} {PAP_IO_SLEW} {SLOW} define_attribute {p:core_board_debug_led} {PAP_IO_DIRECTION} {OUTPUT} define_attribute {p:core_board_debug_led} {PAP_IO_LOC} {W5} -define_attribute {p:core_board_debug_led} {PAP_IO_VCCIO} {3.3} -define_attribute {p:core_board_debug_led} {PAP_IO_STANDARD} {LVCMOS33} +define_attribute {p:core_board_debug_led} {PAP_IO_VCCIO} {1.5} +define_attribute {p:core_board_debug_led} {PAP_IO_STANDARD} {LVCMOS15} define_attribute {p:core_board_debug_led} {PAP_IO_DRIVE} {4} define_attribute {p:core_board_debug_led} {PAP_IO_SLEW} {SLOW} diff --git a/xsync.pds b/xsync.pds index 9938abb..313e504 100644 --- a/xsync.pds +++ b/xsync.pds @@ -1,5 +1,5 @@ (_flow fab_demo "2022.2-SP4.2" - (_comment "Generated by Fabric Compiler (version on 2022.2-SP4.2) at Sun Aug 25 22:25:16 2024") + (_comment "Generated by Fabric Compiler (version on 2022.2-SP4.2) at Sun Aug 25 23:05:00 2024") (_version "1.1.0") (_status "initial") (_project @@ -263,7 +263,7 @@ (_input (_file "xsync.fdc" (_format fdc) - (_timespec "2024-08-25T22:23:28") + (_timespec "2024-08-25T23:04:08") ) ) ) @@ -314,17 +314,17 @@ (_db_output (_file "compile/Top_comp.adf" (_format adif) - (_timespec "2024-08-25T22:15:26") + (_timespec "2024-08-25T23:04:16") ) ) (_output (_file "compile/Top.cmr" (_format verilog) - (_timespec "2024-08-25T22:15:26") + (_timespec "2024-08-25T23:04:16") ) (_file "compile/cmr.db" (_format text) - (_timespec "2024-08-25T22:15:26") + (_timespec "2024-08-25T23:04:16") ) ) ) @@ -339,25 +339,25 @@ (_db_output (_file "synthesize/Top_syn.adf" (_format adif) - (_timespec "2024-08-25T22:23:43") + (_timespec "2024-08-25T23:04:22") ) ) (_output (_file "synthesize/Top_syn.vm" (_format structural_verilog) - (_timespec "2024-08-25T22:23:43") + (_timespec "2024-08-25T23:04:22") ) (_file "synthesize/Top_controlsets.txt" (_format text) - (_timespec "2024-08-25T22:23:43") + (_timespec "2024-08-25T23:04:22") ) (_file "synthesize/snr.db" (_format text) - (_timespec "2024-08-25T22:23:44") + (_timespec "2024-08-25T23:04:22") ) (_file "synthesize/Top.snr" (_format text) - (_timespec "2024-08-25T22:23:44") + (_timespec "2024-08-25T23:04:22") ) ) ) @@ -378,21 +378,21 @@ (_db_output (_file "device_map/Top_map.adf" (_format adif) - (_timespec "2024-08-25T22:24:00") + (_timespec "2024-08-25T23:04:30") ) ) (_output (_file "device_map/Top_dmr.prt" (_format text) - (_timespec "2024-08-25T22:24:00") + (_timespec "2024-08-25T23:04:30") ) (_file "device_map/Top.dmr" (_format text) - (_timespec "2024-08-25T22:24:00") + (_timespec "2024-08-25T23:04:30") ) (_file "device_map/dmr.db" (_format text) - (_timespec "2024-08-25T22:24:00") + (_timespec "2024-08-25T23:04:30") ) ) ) @@ -401,7 +401,7 @@ (_input (_file "device_map/xsync.pcf" (_format pcf) - (_timespec "2024-08-25T22:24:00") + (_timespec "2024-08-25T23:04:30") ) ) ) @@ -422,33 +422,33 @@ (_db_output (_file "place_route/Top_pnr.adf" (_format adif) - (_timespec "2024-08-25T22:24:52") + (_timespec "2024-08-25T23:04:48") ) ) (_output (_file "place_route/clock_utilization.txt" (_format text) - (_timespec "2024-08-25T22:24:51") + (_timespec "2024-08-25T23:04:48") ) (_file "place_route/Top_plc.adf" (_format adif) - (_timespec "2024-08-25T22:24:30") + (_timespec "2024-08-25T23:04:43") ) (_file "place_route/Top.prr" (_format text) - (_timespec "2024-08-25T22:24:52") + (_timespec "2024-08-25T23:04:48") ) (_file "place_route/Top_prr.prt" (_format text) - (_timespec "2024-08-25T22:24:51") + (_timespec "2024-08-25T23:04:48") ) (_file "place_route/Top_pnr.netlist" (_format text) - (_timespec "2024-08-25T22:24:52") + (_timespec "2024-08-25T23:04:48") ) (_file "place_route/prr.db" (_format text) - (_timespec "2024-08-25T22:24:52") + (_timespec "2024-08-25T23:04:48") ) ) ) @@ -484,19 +484,19 @@ (_output (_file "generate_bitstream/Top.sbit" (_format text) - (_timespec "2024-08-25T22:25:13") + (_timespec "2024-08-25T23:04:59") ) (_file "generate_bitstream/Top.smsk" (_format text) - (_timespec "2024-08-25T22:25:13") + (_timespec "2024-08-25T23:04:59") ) (_file "generate_bitstream/bgr.db" (_format text) - (_timespec "2024-08-25T22:25:16") + (_timespec "2024-08-25T23:05:00") ) (_file "generate_bitstream/Top.bgr" (_format text) - (_timespec "2024-08-25T22:25:16") + (_timespec "2024-08-25T23:05:00") ) ) ) diff --git a/xsync_ok.csv b/xsync_ok.csv new file mode 100644 index 0000000..3ca04f1 --- /dev/null +++ b/xsync_ok.csv @@ -0,0 +1,4 @@ +NAME,PAP_IO_DIRECTION,PAP_IO_LOC,PAP_IO_VCCIO,PAP_IO_STANDARD,PAP_IO_NONE +ex_clk,INPUT,R4,1.5,LVCMOS15,TRUE +ex_rst_n,INPUT,U7,1.5,LVCMOS15,TRUE +core_board_debug_led,OUTPUT,W5,1.5,LVCMOS15,NA \ No newline at end of file