p_lusterinc_xsync
/
xsync_fpge_v2
forked from p_lusterinc_xsync/xsync_fpge
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity
Browse Source

修正zsimple_pll无法处理脉冲信号的BUG

master
zhaohe 1 year ago
parent
624a1039d5
commit
555e55c3bb
3 changed files with 21 additions and 87 deletions
Whitespace
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Split View
Diff Options
Show Stats Download Patch File Download Diff File
  1. 102
      led_test.pds
  2. 2
      source/src/output/ttl_output.v
  3. 4
      source/src/zutils/zsimple_pll.v

102
led_test.pds
View File

@ -1,5 +1,5 @@
(_flow fab_demo "2021.1-SP7"
(_comment "Generated by Fabric Compiler (version on 2021.1-SP7<build 86875>) at Wed Mar 27 17:08:41 2024")
(_comment "Generated by Fabric Compiler (version on 2021.1-SP7<build 86875>) at Fri Mar 29 13:15:57 2024")
(_version "1.0.5")
(_status "initial")
(_project
@ -59,7 +59,7 @@
)
(_file "source/src/output/ttl_output.v"
(_format verilog)
(_timespec "2024-03-27T16:06:42")
(_timespec "2024-03-29T13:10:05")
)
(_file "source/src/zutils/zutils_pwm_generator.v"
(_format verilog)
@ -163,7 +163,7 @@
)
(_file "source/src/zutils/zsimple_pll.v"
(_format verilog)
(_timespec "2024-03-27T12:48:00")
(_timespec "2024-03-29T13:12:21")
)
(_file "source/src/zutils/zutils_freq_detector_v2.v"
(_format verilog)
@ -315,17 +315,17 @@
(_db_output
(_file "compile/Top_comp.adf"
(_format adif)
(_timespec "2024-03-27T17:03:45")
(_timespec "2024-03-29T13:13:19")
)
)
(_output
(_file "compile/Top.cmr"
(_format verilog)
(_timespec "2024-03-27T17:03:41")
(_timespec "2024-03-29T13:13:15")
)
(_file "compile/cmr.db"
(_format text)
(_timespec "2024-03-27T17:03:45")
(_timespec "2024-03-29T13:13:19")
)
)
)
@ -341,21 +341,21 @@
(_db_output
(_file "synthesize/Top_syn.adf"
(_format adif)
(_timespec "2024-03-27T17:05:19")
(_timespec "2024-03-29T13:15:34")
)
)
(_output
(_file "synthesize/Top_syn.vm"
(_format structural_verilog)
(_timespec "2024-03-27T17:05:27")
(_timespec "2024-03-29T13:15:42")
)
(_file "synthesize/Top.snr"
(_format text)
(_timespec "2024-03-27T17:05:34")
(_timespec "2024-03-29T13:15:49")
)
(_file "synthesize/snr.db"
(_format text)
(_timespec "2024-03-27T17:05:34")
(_timespec "2024-03-29T13:15:49")
)
)
)
@ -376,21 +376,21 @@
(_db_output
(_file "device_map/Top_map.adf"
(_format adif)
(_timespec "2024-03-27T17:05:40")
(_timespec "2024-03-29T13:15:57")
)
)
(_output
(_file "device_map/Top_dmr.prt"
(_format text)
(_timespec "2024-03-27T17:05:37")
(_timespec "2024-03-29T13:15:54")
)
(_file "device_map/Top.dmr"
(_format text)
(_timespec "2024-03-27T17:05:40")
(_timespec "2024-03-29T13:15:57")
)
(_file "device_map/dmr.db"
(_format text)
(_timespec "2024-03-27T17:05:40")
(_timespec "2024-03-29T13:15:57")
)
)
)
@ -399,7 +399,7 @@
(_input
(_file "device_map/led_test.pcf"
(_format pcf)
(_timespec "2024-03-27T17:05:40")
(_timespec "2024-03-29T13:15:57")
)
)
)
@ -409,7 +409,7 @@
)
(_task tsk_pnr
(_command cmd_pnr
(_gci_state (_integer 2))
(_gci_state (_integer 0))
(_option gplace_seed (_integer 8))
(_option seed_step (_integer 4))
(_option saved_outcome (_integer 4))
@ -417,38 +417,6 @@
(_option share_router_control_signal (_boolean FALSE))
(_option check_clk_net_route_by_srb (_boolean FALSE))
(_option fix_hold_violation_in_route (_boolean FALSE))
(_db_output
(_file "place_route/Top_pnr.adf"
(_format adif)
(_timespec "2024-03-27T17:08:12")
)
)
(_output
(_file "place_route/Top.prr"
(_format text)
(_timespec "2024-03-27T17:08:12")
)
(_file "place_route/Top_prr.prt"
(_format text)
(_timespec "2024-03-27T17:08:12")
)
(_file "place_route/clock_utilization.txt"
(_format text)
(_timespec "2024-03-27T17:08:12")
)
(_file "place_route/Top_plc.adf"
(_format adif)
(_timespec "2024-03-27T17:06:34")
)
(_file "place_route/Top_pnr.netlist"
(_format text)
(_timespec "2024-03-27T17:08:12")
)
(_file "place_route/prr.db"
(_format text)
(_timespec "2024-03-27T17:08:13")
)
)
)
(_widget wgt_power_calculator
(_attribute _click_to_run (_switch ON))
@ -457,24 +425,8 @@
(_attribute _click_to_run (_switch ON))
)
(_command cmd_report_post_pnr_timing
(_gci_state (_integer 2))
(_gci_state (_integer 0))
(_attribute _auto_exe_lock (_switch OFF))
(_db_output
(_file "report_timing/Top_rtp.adf"
(_format adif)
(_timespec "2024-03-27T17:08:21")
)
)
(_output
(_file "report_timing/Top.rtr"
(_format text)
(_timespec "2024-03-27T17:08:21")
)
(_file "report_timing/rtr.db"
(_format text)
(_timespec "2024-03-27T17:08:22")
)
)
)
(_widget wgt_arch_browser
(_attribute _click_to_run (_switch ON))
@ -492,26 +444,8 @@
)
(_task tsk_gen_bitstream
(_command cmd_gen_bitstream
(_gci_state (_integer 2))
(_gci_state (_integer 0))
(_option unused_io_status (_string "KEEPER"))
(_output
(_file "generate_bitstream/Top.sbit"
(_format text)
(_timespec "2024-03-27T17:08:40")
)
(_file "generate_bitstream/Top.smsk"
(_format text)
(_timespec "2024-03-27T17:08:40")
)
(_file "generate_bitstream/Top.bgr"
(_format text)
(_timespec "2024-03-27T17:08:40")
)
(_file "generate_bitstream/bgr.db"
(_format text)
(_timespec "2024-03-27T17:08:41")
)
)
)
)
)

2
source/src/output/ttl_output.v
View File

@ -22,7 +22,7 @@ module ttl_output #(
/*******************************************************************************
* 寄存器列表 *
*******************************************************************************/
//!信号处理模式 0:固定输出低电平，1:固定输出高电平，2:触发模式，3:转发模式，4:测试模式
//!信号处理模式 0:固定输出低电平，1:固定输出高电平，2:触发模式，3:转发模式，4:脉冲信号处理
reg [31:0] reg1_signal_process_mode;
//!TTLOUT_信号选择器
reg [31:0] reg2_input_signal_select;

4
source/src/zutils/zsimple_pll.v
View File

@ -98,13 +98,13 @@ module zsimple_pll (
multiplication_cnt <= 0;
multiplication_state <= 0;
gen_pluse_cnt <= 0;
insignal_multiplication <= 0;
insignal_multiplication <= insignal_division;
end else begin
case (multiplication_state)
0: begin
gen_pluse_cnt <= 0;
multiplication_cnt <= 0;
insignal_multiplication <= 0;
insignal_multiplication <= insignal_division;
if (pluse_width_cnt_lock) begin
multiplication_state <= 1;

Write Preview
Loading…
Cancel
Save