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xsync_fpge_v2
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v003

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zhaohe 1 year ago
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6 changed files with 35 additions and 103 deletions
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  1. 72
      README.md
  2. 66
      led_test.pds
  3. BIN
      release/v0.0.3/Top003.sbit
  4. BIN
      release/v0.0.3/Top003.sfc
  5. BIN
      release/v2.0/xsync_fpage_v2.sbit
  6. BIN
      release/v2.0/xsync_fpage_v2.sfc

72
README.md
View File

@ -1,5 +1,7 @@
```
https://iflytop1.feishu.cn/docx/Fk3CdIRNZoal1XxCGgjc9q1Dn1f
固化
https://iflytop1.feishu.cn/wiki/DyHLwd2pLicjXxkWNEvc7vI7n2b
```
```
@ -9,76 +11,6 @@ https://iflytop1.feishu.cn/docx/Fk3CdIRNZoal1XxCGgjc9q1Dn1f
```
```
核心板引脚分配:
define_attribute {p:rst_n} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:rst_n} {PAP_IO_LOC} {U12}
define_attribute {p:rst_n} {PAP_IO_VCCIO} {3.3}
define_attribute {p:rst_n} {PAP_IO_STANDARD} {LVTTL33}
define_attribute {p:sys_clk} {PAP_IO_DIRECTION} {INPUT}
define_attribute {p:sys_clk} {PAP_IO_LOC} {B5}
define_attribute {p:sys_clk} {PAP_IO_VCCIO} {3.3}
define_attribute {p:sys_clk} {PAP_IO_STANDARD} {LVTTL33}
```
```
TTL OUTPUT
1,2,3,4 丝印正确，正常输出
```
```
SIGNAL_GENERATOR
启动方式:
1.寄存器控制启动
2.外部触发启动
3.TIMECODE触发启动
帧格式:
TIMECODE:
25/30/...
GENLOCK:
....
产生:
1.start_state_sig (高电平表示拍照进行中)
2.timecode_sig[64]
3.timecode_tirgger_sig[1]
4.genlock_sig[1] 帧信号,场信号
5.秒信号
TTL_INPUT
TIMECODE_INPUT
TIMECODE_OUTPUT
GENLOCK_INPUT
```
```
1. 修改启动方式
2. 修改TIMECODE启动时间戳
```
```
// timeocde[0->63]
// 0 1 2 3 4 5 6 7
// 帧秒分时 U0U1U2U3
```
```
插件:
Documenter - TerosHDL 0.1.4 documentation
Verilog-HDL/SystemVerilog/Bluespec SystemVerilog

66
led_test.pds
View File

@ -1,5 +1,5 @@
(_flow fab_demo "2021.1-SP7"
(_comment "Generated by Fabric Compiler (version on 2021.1-SP7<build 86875>) at Wed Mar 27 17:03:14 2024")
(_comment "Generated by Fabric Compiler (version on 2021.1-SP7<build 86875>) at Wed Mar 27 17:08:41 2024")
(_version "1.0.5")
(_status "initial")
(_project
@ -311,21 +311,21 @@
)
(_task tsk_compile
(_command cmd_compile
(_gci_state (_integer 3))
(_gci_state (_integer 2))
(_db_output
(_file "compile/Top_comp.adf"
(_format adif)
(_timespec "2024-03-27T16:07:36")
(_timespec "2024-03-27T17:03:45")
)
)
(_output
(_file "compile/Top.cmr"
(_format verilog)
(_timespec "2024-03-27T16:07:33")
(_timespec "2024-03-27T17:03:41")
)
(_file "compile/cmr.db"
(_format text)
(_timespec "2024-03-27T16:07:36")
(_timespec "2024-03-27T17:03:45")
)
)
)
@ -335,27 +335,27 @@
)
(_task tsk_synthesis
(_command cmd_synthesize
(_gci_state (_integer 3))
(_gci_state (_integer 2))
(_option ads (_switch ON))
(_option selected_syn_tool_opt (_integer 2))
(_db_output
(_file "synthesize/Top_syn.adf"
(_format adif)
(_timespec "2024-03-27T16:09:41")
(_timespec "2024-03-27T17:05:19")
)
)
(_output
(_file "synthesize/Top_syn.vm"
(_format structural_verilog)
(_timespec "2024-03-27T16:09:50")
(_timespec "2024-03-27T17:05:27")
)
(_file "synthesize/Top.snr"
(_format text)
(_timespec "2024-03-27T16:09:56")
(_timespec "2024-03-27T17:05:34")
)
(_file "synthesize/snr.db"
(_format text)
(_timespec "2024-03-27T16:09:56")
(_timespec "2024-03-27T17:05:34")
)
)
)
@ -372,25 +372,25 @@
)
(_task tsk_devmap
(_command cmd_devmap
(_gci_state (_integer 3))
(_gci_state (_integer 2))
(_db_output
(_file "device_map/Top_map.adf"
(_format adif)
(_timespec "2024-03-27T16:10:02")
(_timespec "2024-03-27T17:05:40")
)
)
(_output
(_file "device_map/Top_dmr.prt"
(_format text)
(_timespec "2024-03-27T16:09:59")
(_timespec "2024-03-27T17:05:37")
)
(_file "device_map/Top.dmr"
(_format text)
(_timespec "2024-03-27T16:10:02")
(_timespec "2024-03-27T17:05:40")
)
(_file "device_map/dmr.db"
(_format text)
(_timespec "2024-03-27T16:10:02")
(_timespec "2024-03-27T17:05:40")
)
)
)
@ -399,7 +399,7 @@
(_input
(_file "device_map/led_test.pcf"
(_format pcf)
(_timespec "2024-03-27T16:10:02")
(_timespec "2024-03-27T17:05:40")
)
)
)
@ -409,7 +409,7 @@
)
(_task tsk_pnr
(_command cmd_pnr
(_gci_state (_integer 3))
(_gci_state (_integer 2))
(_option gplace_seed (_integer 8))
(_option seed_step (_integer 4))
(_option saved_outcome (_integer 4))
@ -420,33 +420,33 @@
(_db_output
(_file "place_route/Top_pnr.adf"
(_format adif)
(_timespec "2024-03-27T16:14:14")
(_timespec "2024-03-27T17:08:12")
)
)
(_output
(_file "place_route/Top.prr"
(_format text)
(_timespec "2024-03-27T16:14:14")
(_timespec "2024-03-27T17:08:12")
)
(_file "place_route/Top_prr.prt"
(_format text)
(_timespec "2024-03-27T16:14:14")
(_timespec "2024-03-27T17:08:12")
)
(_file "place_route/clock_utilization.txt"
(_format text)
(_timespec "2024-03-27T16:14:14")
(_timespec "2024-03-27T17:08:12")
)
(_file "place_route/Top_plc.adf"
(_format adif)
(_timespec "2024-03-27T16:11:33")
(_timespec "2024-03-27T17:06:34")
)
(_file "place_route/Top_pnr.netlist"
(_format text)
(_timespec "2024-03-27T16:14:14")
(_timespec "2024-03-27T17:08:12")
)
(_file "place_route/prr.db"
(_format text)
(_timespec "2024-03-27T16:14:14")
(_timespec "2024-03-27T17:08:13")
)
)
)
@ -457,22 +457,22 @@
(_attribute _click_to_run (_switch ON))
)
(_command cmd_report_post_pnr_timing
(_gci_state (_integer 3))
(_gci_state (_integer 2))
(_attribute _auto_exe_lock (_switch OFF))
(_db_output
(_file "report_timing/Top_rtp.adf"
(_format adif)
(_timespec "2024-03-27T16:14:22")
(_timespec "2024-03-27T17:08:21")
)
)
(_output
(_file "report_timing/Top.rtr"
(_format text)
(_timespec "2024-03-27T16:14:23")
(_timespec "2024-03-27T17:08:21")
)
(_file "report_timing/rtr.db"
(_format text)
(_timespec "2024-03-27T16:14:23")
(_timespec "2024-03-27T17:08:22")
)
)
)
@ -492,24 +492,24 @@
)
(_task tsk_gen_bitstream
(_command cmd_gen_bitstream
(_gci_state (_integer 3))
(_gci_state (_integer 2))
(_option unused_io_status (_string "KEEPER"))
(_output
(_file "generate_bitstream/Top.sbit"
(_format text)
(_timespec "2024-03-27T16:14:42")
(_timespec "2024-03-27T17:08:40")
)
(_file "generate_bitstream/Top.smsk"
(_format text)
(_timespec "2024-03-27T16:14:42")
(_timespec "2024-03-27T17:08:40")
)
(_file "generate_bitstream/Top.bgr"
(_format text)
(_timespec "2024-03-27T16:14:42")
(_timespec "2024-03-27T17:08:40")
)
(_file "generate_bitstream/bgr.db"
(_format text)
(_timespec "2024-03-27T16:14:42")
(_timespec "2024-03-27T17:08:41")
)
)
)

BIN
release/v0.0.3/Top003.sbit
View File

BIN
release/v0.0.3/Top003.sfc
View File

BIN
release/v2.0/xsync_fpage_v2.sbit
View File

BIN
release/v2.0/xsync_fpage_v2.sfc
View File

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