From e17130f2b3c4dc55c71eaca7740ba099ebfe0203 Mon Sep 17 00:00:00 2001 From: zhaohe Date: Sat, 2 Mar 2024 22:46:05 +0800 Subject: [PATCH] zsimple_pll ok --- led_test.pds | 58 ++++++++++++++++++++--------------------- source/src/zutils/zsimple_pll.v | 7 ++--- 2 files changed, 33 insertions(+), 32 deletions(-) diff --git a/led_test.pds b/led_test.pds index 687cd1c..772ddf4 100644 --- a/led_test.pds +++ b/led_test.pds @@ -1,5 +1,5 @@ (_flow fab_demo "2021.1-SP7" - (_comment "Generated by Fabric Compiler (version on 2021.1-SP7) at Sat Mar 2 22:23:23 2024") + (_comment "Generated by Fabric Compiler (version on 2021.1-SP7) at Sat Mar 2 22:45:22 2024") (_version "1.0.5") (_status "initial") (_project @@ -167,7 +167,7 @@ ) (_file "source/src/zutils/zsimple_pll.v" (_format verilog) - (_timespec "2024-03-02T22:20:29") + (_timespec "2024-03-02T22:44:30") ) (_file "source/src/zutils/zutils_freq_detector_v2.v" (_format verilog) @@ -239,21 +239,21 @@ ) (_task tsk_compile (_command cmd_compile - (_gci_state (_integer 3)) + (_gci_state (_integer 2)) (_db_output (_file "compile/Top_comp.adf" (_format adif) - (_timespec "2024-03-02T22:22:37") + (_timespec "2024-03-02T22:44:36") ) ) (_output (_file "compile/Top.cmr" (_format verilog) - (_timespec "2024-03-02T22:22:36") + (_timespec "2024-03-02T22:44:35") ) (_file "compile/cmr.db" (_format text) - (_timespec "2024-03-02T22:22:37") + (_timespec "2024-03-02T22:44:36") ) ) ) @@ -263,27 +263,27 @@ ) (_task tsk_synthesis (_command cmd_synthesize - (_gci_state (_integer 3)) + (_gci_state (_integer 2)) (_option ads (_switch ON)) (_option selected_syn_tool_opt (_integer 2)) (_db_output (_file "synthesize/Top_syn.adf" (_format adif) - (_timespec "2024-03-02T22:22:46") + (_timespec "2024-03-02T22:44:44") ) ) (_output (_file "synthesize/Top_syn.vm" (_format structural_verilog) - (_timespec "2024-03-02T22:22:46") + (_timespec "2024-03-02T22:44:45") ) (_file "synthesize/Top.snr" (_format text) - (_timespec "2024-03-02T22:22:47") + (_timespec "2024-03-02T22:44:46") ) (_file "synthesize/snr.db" (_format text) - (_timespec "2024-03-02T22:22:47") + (_timespec "2024-03-02T22:44:46") ) ) ) @@ -300,25 +300,25 @@ ) (_task tsk_devmap (_command cmd_devmap - (_gci_state (_integer 3)) + (_gci_state (_integer 2)) (_db_output (_file "device_map/Top_map.adf" (_format adif) - (_timespec "2024-03-02T22:22:50") + (_timespec "2024-03-02T22:44:49") ) ) (_output (_file "device_map/Top_dmr.prt" (_format text) - (_timespec "2024-03-02T22:22:49") + (_timespec "2024-03-02T22:44:48") ) (_file "device_map/Top.dmr" (_format text) - (_timespec "2024-03-02T22:22:50") + (_timespec "2024-03-02T22:44:49") ) (_file "device_map/dmr.db" (_format text) - (_timespec "2024-03-02T22:22:50") + (_timespec "2024-03-02T22:44:49") ) ) ) @@ -327,7 +327,7 @@ (_input (_file "device_map/led_test.pcf" (_format pcf) - (_timespec "2024-03-02T22:22:50") + (_timespec "2024-03-02T22:44:49") ) ) ) @@ -337,38 +337,38 @@ ) (_task tsk_pnr (_command cmd_pnr - (_gci_state (_integer 3)) + (_gci_state (_integer 2)) (_option mode (_string "fast")) (_db_output (_file "place_route/Top_pnr.adf" (_format adif) - (_timespec "2024-03-02T22:23:05") + (_timespec "2024-03-02T22:45:03") ) ) (_output (_file "place_route/Top.prr" (_format text) - (_timespec "2024-03-02T22:23:05") + (_timespec "2024-03-02T22:45:03") ) (_file "place_route/Top_prr.prt" (_format text) - (_timespec "2024-03-02T22:23:05") + (_timespec "2024-03-02T22:45:03") ) (_file "place_route/clock_utilization.txt" (_format text) - (_timespec "2024-03-02T22:23:05") + (_timespec "2024-03-02T22:45:03") ) (_file "place_route/Top_plc.adf" (_format adif) - (_timespec "2024-03-02T22:22:56") + (_timespec "2024-03-02T22:44:55") ) (_file "place_route/Top_pnr.netlist" (_format text) - (_timespec "2024-03-02T22:23:05") + (_timespec "2024-03-02T22:45:03") ) (_file "place_route/prr.db" (_format text) - (_timespec "2024-03-02T22:23:05") + (_timespec "2024-03-02T22:45:04") ) ) ) @@ -403,19 +403,19 @@ (_output (_file "generate_bitstream/Top.sbit" (_format text) - (_timespec "2024-03-02T22:23:21") + (_timespec "2024-03-02T22:45:21") ) (_file "generate_bitstream/Top.smsk" (_format text) - (_timespec "2024-03-02T22:23:21") + (_timespec "2024-03-02T22:45:21") ) (_file "generate_bitstream/Top.bgr" (_format text) - (_timespec "2024-03-02T22:23:21") + (_timespec "2024-03-02T22:45:21") ) (_file "generate_bitstream/bgr.db" (_format text) - (_timespec "2024-03-02T22:23:23") + (_timespec "2024-03-02T22:45:22") ) ) ) diff --git a/source/src/zutils/zsimple_pll.v b/source/src/zutils/zsimple_pll.v index 76fd5d5..6195e7b 100644 --- a/source/src/zutils/zsimple_pll.v +++ b/source/src/zutils/zsimple_pll.v @@ -81,7 +81,7 @@ module zsimple_pll ( .pluse_width_cnt(insignal_multiplication_freq_cnt), .pluse_width_cnt_lock(pluse_width_cnt_lock) ); - + reg [31:0] multiplication_cnt; reg [31:0] multiplication_state; @@ -109,6 +109,7 @@ module zsimple_pll ( if(insignal_division) begin multiplication_state <= 2; gen_pluse_cnt <= 0; + insignal_multiplication <= 1; multiplication_cnt <= 0; end end @@ -117,10 +118,10 @@ module zsimple_pll ( multiplication_cnt <= multiplication_cnt + freq_multiplication + 1; insignal_multiplication <= 1; end - else if(multiplication_cnt >= insignal_multiplication_freq_cnt) begin + else if((multiplication_cnt+freq_multiplication+2) >= insignal_multiplication_freq_cnt) begin gen_pluse_cnt <= gen_pluse_cnt + 1; - insignal_multiplication <= 1; multiplication_cnt <= 0; + insignal_multiplication <= 1; gen_pluse_cnt <= gen_pluse_cnt + 1; end else begin