From f3afddf03f24f5edc3ae922e78bca7d355b52340 Mon Sep 17 00:00:00 2001 From: zhaohe Date: Fri, 12 Jan 2024 18:38:12 +0800 Subject: [PATCH] update --- led_test.fdc | 2 +- led_test.pds | 59 ++++++++++++++++++++++++++++---------------------------- source/src/top.v | 4 ++-- 3 files changed, 33 insertions(+), 32 deletions(-) diff --git a/led_test.fdc b/led_test.fdc index ab9f013..bd642af 100644 --- a/led_test.fdc +++ b/led_test.fdc @@ -570,6 +570,6 @@ define_attribute {p:timecode_bnc_in_state_led} {PAP_IO_STANDARD} {LVCMOS33} define_attribute {p:timecode_bnc_in_state_led} {PAP_IO_DRIVE} {4} define_attribute {p:timecode_bnc_in_state_led} {PAP_IO_SLEW} {SLOW} define_attribute {p:ex_rst_n} {PAP_IO_DIRECTION} {INPUT} -define_attribute {p:ex_rst_n} {PAP_IO_LOC} {G13} +define_attribute {p:ex_rst_n} {PAP_IO_LOC} {C13} define_attribute {p:ex_rst_n} {PAP_IO_VCCIO} {3.3} define_attribute {p:ex_rst_n} {PAP_IO_STANDARD} {LVTTL33} diff --git a/led_test.pds b/led_test.pds index f5361df..9c5a583 100644 --- a/led_test.pds +++ b/led_test.pds @@ -1,5 +1,5 @@ (_flow fab_demo "2021.1-SP7" - (_comment "Generated by Fabric Compiler (version on 2021.1-SP7) at Fri Jan 12 17:39:58 2024") + (_comment "Generated by Fabric Compiler (version on 2021.1-SP7) at Fri Jan 12 18:29:24 2024") (_version "1.0.5") (_status "initial") (_project @@ -19,7 +19,7 @@ (_input (_file "source/src/top.v" + "Top:" (_format verilog) - (_timespec "2024-01-12T16:11:04") + (_timespec "2024-01-12T18:26:11") ) (_file "source/src/spi_reg_reader.v" (_format verilog) @@ -188,7 +188,7 @@ (_input (_file "led_test.fdc" (_format fdc) - (_timespec "2024-01-12T17:34:33") + (_timespec "2024-01-12T18:23:52") ) ) ) @@ -239,17 +239,17 @@ (_db_output (_file "compile/Top_comp.adf" (_format adif) - (_timespec "2024-01-12T17:34:42") + (_timespec "2024-01-12T18:26:16") ) ) (_output (_file "compile/Top.cmr" (_format verilog) - (_timespec "2024-01-12T17:34:40") + (_timespec "2024-01-12T18:26:14") ) (_file "compile/cmr.db" (_format text) - (_timespec "2024-01-12T17:34:42") + (_timespec "2024-01-12T18:26:16") ) ) ) @@ -265,21 +265,21 @@ (_db_output (_file "synthesize/Top_syn.adf" (_format adif) - (_timespec "2024-01-12T17:35:52") + (_timespec "2024-01-12T18:26:39") ) ) (_output (_file "synthesize/Top_syn.vm" (_format structural_verilog) - (_timespec "2024-01-12T17:35:57") + (_timespec "2024-01-12T18:26:40") ) (_file "synthesize/Top.snr" (_format text) - (_timespec "2024-01-12T17:36:01") + (_timespec "2024-01-12T18:26:41") ) (_file "synthesize/snr.db" (_format text) - (_timespec "2024-01-12T17:36:01") + (_timespec "2024-01-12T18:26:41") ) ) ) @@ -300,21 +300,21 @@ (_db_output (_file "device_map/Top_map.adf" (_format adif) - (_timespec "2024-01-12T17:36:05") + (_timespec "2024-01-12T18:26:45") ) ) (_output (_file "device_map/Top_dmr.prt" (_format text) - (_timespec "2024-01-12T17:36:04") + (_timespec "2024-01-12T18:26:44") ) (_file "device_map/Top.dmr" (_format text) - (_timespec "2024-01-12T17:36:05") + (_timespec "2024-01-12T18:26:45") ) (_file "device_map/dmr.db" (_format text) - (_timespec "2024-01-12T17:36:05") + (_timespec "2024-01-12T18:26:45") ) ) ) @@ -323,7 +323,7 @@ (_input (_file "device_map/led_test.pcf" (_format pcf) - (_timespec "2024-01-12T17:36:05") + (_timespec "2024-01-12T18:26:45") ) ) ) @@ -334,36 +334,37 @@ (_task tsk_pnr (_command cmd_pnr (_gci_state (_integer 2)) + (_option mode (_string "fast")) (_db_output (_file "place_route/Top_pnr.adf" (_format adif) - (_timespec "2024-01-12T17:39:11") + (_timespec "2024-01-12T18:28:37") ) ) (_output (_file "place_route/Top.prr" (_format text) - (_timespec "2024-01-12T17:39:11") + (_timespec "2024-01-12T18:28:37") ) (_file "place_route/Top_prr.prt" (_format text) - (_timespec "2024-01-12T17:39:10") + (_timespec "2024-01-12T18:28:36") ) (_file "place_route/clock_utilization.txt" (_format text) - (_timespec "2024-01-12T17:39:10") + (_timespec "2024-01-12T18:28:36") ) (_file "place_route/Top_plc.adf" (_format adif) - (_timespec "2024-01-12T17:37:34") + (_timespec "2024-01-12T18:26:59") ) (_file "place_route/Top_pnr.netlist" (_format text) - (_timespec "2024-01-12T17:39:11") + (_timespec "2024-01-12T18:28:37") ) (_file "place_route/prr.db" (_format text) - (_timespec "2024-01-12T17:39:13") + (_timespec "2024-01-12T18:28:38") ) ) ) @@ -379,17 +380,17 @@ (_db_output (_file "report_timing/Top_rtp.adf" (_format adif) - (_timespec "2024-01-12T17:39:19") + (_timespec "2024-01-12T18:28:44") ) ) (_output (_file "report_timing/Top.rtr" (_format text) - (_timespec "2024-01-12T17:39:20") + (_timespec "2024-01-12T18:28:44") ) (_file "report_timing/rtr.db" (_format text) - (_timespec "2024-01-12T17:39:20") + (_timespec "2024-01-12T18:28:45") ) ) ) @@ -413,19 +414,19 @@ (_output (_file "generate_bitstream/Top.sbit" (_format text) - (_timespec "2024-01-12T17:39:57") + (_timespec "2024-01-12T18:29:22") ) (_file "generate_bitstream/Top.smsk" (_format text) - (_timespec "2024-01-12T17:39:57") + (_timespec "2024-01-12T18:29:22") ) (_file "generate_bitstream/Top.bgr" (_format text) - (_timespec "2024-01-12T17:39:57") + (_timespec "2024-01-12T18:29:22") ) (_file "generate_bitstream/bgr.db" (_format text) - (_timespec "2024-01-12T17:39:58") + (_timespec "2024-01-12T18:29:24") ) ) ) diff --git a/source/src/top.v b/source/src/top.v index de5fb89..3d5b728 100644 --- a/source/src/top.v +++ b/source/src/top.v @@ -599,8 +599,8 @@ module Top ( // output reg timecode_out_headphone_select, // 电平选择 0line,1:mic // output reg timecode_out_headphone_state_led - assign debug_signal_output[0] = sync_ttl_out1; - assign debug_signal_output[1] = sync_ttl_out2; + assign debug_signal_output[0] = ex_rst_n; + assign debug_signal_output[1] = ex_clk; assign debug_signal_output[2] = sync_ttl_out3; assign debug_signal_output[3] = sync_ttl_out4; assign debug_signal_output[4] = stm32if_timecode_sync_out;