xsync_fpge_v2/xsync.csv

PORT	PAP_IO_DIRECTION	PAP_IO_LOC	PAP_IO_VCCIO	PAP_IO_STANDARD	PAP_IO_NONE	PAP_IO_DRIVE	PAP_IO_SLEW
ex_clk	INPUT	R4	1.5	LVCMOS15	TRUE
ex_rst_n	INPUT	U7	1.5	LVCMOS15	TRUE
stm32_rst_n	INPUT	AA19	3.3	LVCMOS33	TRUE
genlock_in_hsync	INPUT	M15	3.3	LVCMOS33	TRUE
genlock_in_vsync	INPUT	M16	3.3	LVCMOS33	TRUE
genlock_in_fsync	INPUT	L16	3.3	LVCMOS33	TRUE
genlock_out_dac[0]	OUTPUT	E14	3.3	LVCMOS33	TRUE	4	SLOW
genlock_out_dac[1]	OUTPUT	E13	3.3	LVCMOS33	TRUE	4	SLOW
genlock_out_dac[2]	OUTPUT	F14	3.3	LVCMOS33	TRUE	4	SLOW
genlock_out_dac[3]	OUTPUT	F13	3.3	LVCMOS33	TRUE	4	SLOW
genlock_out_dac[4]	OUTPUT	C22	3.3	LVCMOS33	TRUE	4	SLOW
genlock_out_dac[5]	OUTPUT	B22	3.3	LVCMOS33	TRUE	4	SLOW
genlock_out_dac[6]	OUTPUT	C20	3.3	LVCMOS33	TRUE	4	SLOW
genlock_out_dac[7]	OUTPUT	D20	3.3	LVCMOS33	TRUE	4	SLOW
genlock_out_dac[8]	OUTPUT	C19	3.3	LVCMOS33	TRUE	4	SLOW
genlock_out_dac_clk	OUTPUT	C18	3.3	LVCMOS33	TRUE	4	SLOW
sync_ttl_in1	INPUT	K18	3.3	LVCMOS33	TRUE
sync_ttl_in2	INPUT	K19	3.3	LVCMOS33	TRUE
sync_ttl_in3	INPUT	M13	3.3	LVCMOS33	TRUE
sync_ttl_in4	INPUT	L13	3.3	LVCMOS33	TRUE
sync_ttl_out1	OUTPUT	N15	3.3	LVCMOS33	TRUE	4	SLOW
sync_ttl_out2	OUTPUT	N14	3.3	LVCMOS33	TRUE	4	SLOW
sync_ttl_out3	OUTPUT	R17	3.3	LVCMOS33	TRUE	4	SLOW
sync_ttl_out4	OUTPUT	R14	3.3	LVCMOS33	TRUE	4	SLOW
timecode_headphone_in	INPUT	L15	3.3	LVCMOS33	TRUE
timecode_bnc_in	INPUT	L14	3.3	LVCMOS33	TRUE
timecode_out_bnc	OUTPUT	P17	3.3	LVCMOS33	TRUE	4	SLOW
timecode_out_bnc_select	OUTPUT	R18	3.3	LVCMOS33	TRUE	4	SLOW
timecode_out_headphone	OUTPUT	R16	3.3	LVCMOS33	TRUE	4	SLOW
timecode_out_headphone_select	OUTPUT	P20	3.3	LVCMOS33	TRUE	4	SLOW
stm32if_start_signal_out	OUTPUT	Y21	3.3	LVCMOS33	TRUE	4	SLOW
stm32if_camera_sync_out	OUTPUT	Y22	3.3	LVCMOS33	TRUE	4	SLOW
stm32if_timecode_sync_out	OUTPUT	AB20	3.3	LVCMOS33	TRUE	4	SLOW
spi1_cs_pin	INPUT	N17	3.3	LVCMOS33	TRUE
spi1_clk_pin	INPUT	P14	3.3	LVCMOS33	TRUE
spi1_rx_pin	INPUT	P15	3.3	LVCMOS33	TRUE
spi1_tx_pin	OUTPUT	P16	3.3	LVCMOS33	TRUE	4	SLOW
debug_signal_output[0]	OUTPUT	Y11	3.3	LVCMOS33	TRUE	4	SLOW
debug_signal_output[1]	OUTPUT	Y12	3.3	LVCMOS33	TRUE	4	SLOW
debug_signal_output[2]	OUTPUT	AA10	3.3	LVCMOS33	TRUE	4	SLOW
debug_signal_output[3]	OUTPUT	AA11	3.3	LVCMOS33	TRUE	4	SLOW
debug_signal_output[4]	OUTPUT	AB11	3.3	LVCMOS33	TRUE	4	SLOW
debug_signal_output[5]	OUTPUT	AB12	3.3	LVCMOS33	TRUE	4	SLOW
debug_signal_output[6]	OUTPUT	W11	3.3	LVCMOS33	TRUE	4	SLOW
debug_signal_output[7]	OUTPUT	W12	3.3	LVCMOS33	TRUE	4	SLOW
debug_signal_output[8]	OUTPUT	AA13	3.3	LVCMOS33	TRUE	4	SLOW
debug_signal_output[9]	OUTPUT	AB13	3.3	LVCMOS33	TRUE	4	SLOW
debug_signal_output[10]	OUTPUT	Y13	3.3	LVCMOS33	TRUE	4	SLOW
debug_signal_output[11]	OUTPUT	AA14	3.3	LVCMOS33	TRUE	4	SLOW
debug_signal_output[12]	OUTPUT	AA15	3.3	LVCMOS33	TRUE	4	SLOW
debug_signal_output[13]	OUTPUT	AB15	3.3	LVCMOS33	TRUE	4	SLOW
debug_signal_output[14]	OUTPUT	Y16	3.3	LVCMOS33	TRUE	4	SLOW
debug_signal_output[15]	OUTPUT	AA16	3.3	LVCMOS33	TRUE	4	SLOW
core_board_debug_led	OUTPUT	W5	1.5	LVCMOS15	TRUE	8	SLOW