zhaohe 2 years ago
parent
commit
0ed069c070
  1. 23
      usrc/base_service/fpga_if.c
  2. 21
      usrc/main.cpp
  3. 4
      usrc/service/reg_manager.c

23
usrc/base_service/fpga_if.c

@ -5,7 +5,7 @@
*/
#define TAG "fpga_if"
static fpga_if_t fpga_if;
xs_gpio_t spi1_cs;
xs_gpio_t spi2_cs;
void fpga_if_init() { //
// fpga_if.spi1 = &hspi1;
@ -17,9 +17,9 @@ void fpga_if_init() { //
* 使线
*/
fpga_if.spi1 = &hspi2;
xs_gpio_init_as_output(&spi1_cs, PB9, kxs_gpio_nopull, false, true);
HAL_SPI_Receive(fpga_if.spi1, rxbuf, 1, 1000);
fpga_if.spi2 = &hspi2;
xs_gpio_init_as_output(&spi2_cs, PB9, kxs_gpio_nopull, false, true);
HAL_SPI_Receive(fpga_if.spi2, rxbuf, 1, 1000);
// fpga_if.spi2 = &hspi1;
// HAL_SPI_Receive(fpga_if.spi2, rxbuf, 1, 1000);
@ -122,22 +122,23 @@ static void _fpga_if_spi_read_data(SPI_HandleTypeDef *hspi, uint32_t add, uint32
}
void fpga_if_spi_write_data_01(uint32_t add, uint32_t txdata, uint32_t *rxdata) {
xs_gpio_write(&spi1_cs, false);
_fpga_if_spi_write_data(fpga_if.spi1, add, txdata, rxdata);
xs_gpio_write(&spi1_cs, true);
xs_delay_us(1);
xs_gpio_write(&spi1_cs, false);
_fpga_if_spi_read_data(fpga_if.spi1, add, rxdata);
xs_gpio_write(&spi1_cs, true);
}
void fpga_if_spi_read_data_01(uint32_t add, uint32_t *rxdata) { _fpga_if_spi_read_data(fpga_if.spi1, add, rxdata); }
void fpga_if_spi_write_data_02(uint32_t add, uint32_t txdata, uint32_t *rxdata) {
if (!fpga_if.spi2) return;
xs_gpio_write(&spi2_cs, false);
_fpga_if_spi_write_data(fpga_if.spi2, add, txdata, rxdata);
xs_gpio_write(&spi2_cs, true);
xs_delay_us(1);
xs_gpio_write(&spi2_cs, false);
_fpga_if_spi_read_data(fpga_if.spi2, add, rxdata);
xs_gpio_write(&spi2_cs, true);
}
void fpga_if_spi_read_data_02(uint32_t add, uint32_t *rxdata) {
if (!fpga_if.spi2) return;
xs_gpio_write(&spi2_cs, false);
_fpga_if_spi_read_data(fpga_if.spi2, add, rxdata);
xs_gpio_write(&spi2_cs, true);
}
fpga_if_t *fpga_if_get_instance() { return &fpga_if; }

21
usrc/main.cpp

@ -136,14 +136,29 @@ void umain() {
ZLOGI(TAG, "system init done");
int32_t count = 0;
while (true) {
// HAL_SPI_Transmit(&hspi1, (uint8_t*)"hello", 5, 1000);
// HAL_SPI_Transmit(&hspi2, (uint8_t*)"hello", 5, 1000);
osDelay(10);
debug_light_ctrl();
uint32_t rxdata = 0;
fpga_if_spi_write_data_01(32, 0x12345678, &rxdata);
ZLOGI(TAG, "rxdata: %x", rxdata);
// factory_reset_key_detect();
// ZLOGI(TAG,"factory_reset_key_state %d",xs_gpio_read(&m_factory_reset_key));
// osDelay(10);
// fpga_if_spi_write_data_01(33, count, &rxdata);
// osDelay(10);
// fpga_if_spi_write_data_01(34, count, &rxdata);
// osDelay(10);
// fpga_if_spi_write_data_01(35, count, &rxdata);
// osDelay(10);
// fpga_if_spi_write_data_01(36, count, &rxdata);
// osDelay(10);
// if(count!=rxdata){
// ZLOGI(TAG, "fpga_if_spi_write_data_01 error count: %d, rxdata: %d", count, rxdata);
// }
// count++;
// ZLOGI(TAG, "rxdata: %x", rxdata);
}
}

4
usrc/service/reg_manager.c

@ -87,7 +87,7 @@ uint32_t reg_manager_read_reg(uint32_t addr) {
* FPGA芯片寄存器读写 *
*******************************************************************************/
else if (addr >= XYSNC_REG_FPGA_REG_START) {
fpga_if_spi_read_data_01(addr, &readbak);
fpga_if_spi_read_data_02(addr, &readbak);
}
return readbak;
}
@ -143,7 +143,7 @@ uint32_t reg_manager_write_reg(uint32_t addr, uint32_t value) {
* FPGA芯片寄存器读写 *
*******************************************************************************/
else if (addr >= XYSNC_REG_FPGA_REG_START) {
fpga_if_spi_write_data_01(addr, value, &readbak);
fpga_if_spi_write_data_02(addr, value, &readbak);
}
return readbak;

Loading…
Cancel
Save