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xsync_stm32
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update

v5
zhaohe 2 years ago
parent
2304e9c819
commit
17431e79cc
16 changed files with 306 additions and 72 deletions
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  1. 3
      .vscode/settings.json
  2. 13
      iflytop_xsync/xs_flash.c
  3. 11
      iflytop_xsync/xs_flash.h
  4. 2
      iflytop_xsync/xs_id.c
  5. 4
      iflytop_xsync/xs_id.h
  6. 15
      iflytop_xsync/xs_udp.c
  7. 2
      iflytop_xsync/xs_udp.h
  8. 65
      iflytop_xsync_protocol/iflytop_xsync_protocol.h
  9. 55
      usrc/base_service/config_service.c
  10. 5
      usrc/base_service/config_service.h
  11. 8
      usrc/main.cpp
  12. 7
      usrc/project_configs.h
  13. 10
      usrc/service/device_info.cpp
  14. 7
      usrc/service/device_info.hpp
  15. 24
      usrc/service/extern_if_service.c
  16. 147
      usrc/service/reg_manager.c

3
.vscode/settings.json
View File

@ -95,7 +95,8 @@
"sys.h": "c", "sys.h": "c",
"reg_manager.h": "c", "reg_manager.h": "c",
"fpga_if.h": "c", "fpga_if.h": "c",
"rng.h": "c"
"rng.h": "c",
"report_generator_service.h": "c"
}, },
"files.autoGuessEncoding": false, "files.autoGuessEncoding": false,
"files.encoding": "gbk" "files.encoding": "gbk"

13
iflytop_xsync/xs_flash.c
View File

@ -50,22 +50,29 @@ static HAL_StatusTypeDef _flash_erase(void) {
* EXTERN * * EXTERN *
*******************************************************************************/ *******************************************************************************/
void xs_flash_init(uint32_t* rawstartadd, uint32_t* defaultdata, uint32_t rawsize) {
void xs_flash_init(uint32_t* rawstartadd, uint32_t rawsize) {
_rawstartadd = rawstartadd; _rawstartadd = rawstartadd;
_defaultdata = defaultdata;
_defaultdata = NULL;
_rawsize = rawsize; _rawsize = rawsize;
// 读取flash数据 // 读取flash数据
memcpy(_rawstartadd, (uint32_t*)(FLASH_START_ADD), _rawsize * 4); memcpy(_rawstartadd, (uint32_t*)(FLASH_START_ADD), _rawsize * 4);
#if 0
// 校验数据 // 校验数据
if (_xs_check_raw_data()) { if (_xs_check_raw_data()) {
return; return;
} }
_is_first_run = true; _is_first_run = true;
xs_flash_factory_reset(); xs_flash_factory_reset();
#endif
}
// 初始化flash数据
bool xs_flash_check(void) { return _xs_check_raw_data(); }
bool xs_flash_set_default_data(uint32_t* defaultdata) {
_defaultdata = defaultdata;
return true;
} }
bool xs_flash_is_first_run(void) { return _is_first_run; } bool xs_flash_is_first_run(void) { return _is_first_run; }

11
iflytop_xsync/xs_flash.h
View File

@ -35,7 +35,7 @@
* @param defaultdata 默认数据 * @param defaultdata 默认数据
* @param rawsize flash内存映射的地址大小 * @param rawsize flash内存映射的地址大小
*/ */
void xs_flash_init(uint32_t* rawstartadd, uint32_t* defaultdata, uint32_t rawsize);
void xs_flash_init(uint32_t* rawstartadd, uint32_t rawsize);
/** /**
* @brief 判断是否是第一次初始化flash * @brief 判断是否是第一次初始化flash
* *
@ -57,3 +57,12 @@ bool xs_flash_flush(void);
* @return false * @return false
*/ */
bool xs_flash_factory_reset(void); bool xs_flash_factory_reset(void);
/**
* @brief
*
* @param defaultdata
* @return true
* @return false
*/
bool xs_flash_set_default_data(uint32_t* defaultdata);
bool xs_flash_check(void);

2
iflytop_xsync/xs_id.c
View File

@ -21,7 +21,7 @@ void xs_id_generate_random_mac(mac_t* id) {
id->mac[4] = random1 % 256; id->mac[4] = random1 % 256;
id->mac[5] = random2 % 256; id->mac[5] = random2 % 256;
} }
void xs_id_get_uuid(device_id_t* id) {
void xs_id_get_cpu_id(cpu_id_t* id) {
// UID_BASE // UID_BASE
uint8_t* uid_base = (uint8_t*)UID_BASE; uint8_t* uid_base = (uint8_t*)UID_BASE;
for (int32_t i = 0; i < 12; i++) { for (int32_t i = 0; i < 12; i++) {

4
iflytop_xsync/xs_id.h
View File

@ -6,7 +6,7 @@ typedef struct {
typedef struct { typedef struct {
uint8_t id[12]; // 96bit uint8_t id[12]; // 96bit
} device_id_t;
} cpu_id_t;
void xs_id_generate_random_mac(mac_t* id); void xs_id_generate_random_mac(mac_t* id);
void xs_id_get_uuid(device_id_t* id);
void xs_id_get_cpu_id(cpu_id_t* id);

15
iflytop_xsync/xs_udp.c
View File

@ -1,4 +1,5 @@
#include "xs_udp.h" #include "xs_udp.h"
#include "xs_log.h" #include "xs_log.h"
#define TAG "xs_udp" #define TAG "xs_udp"
@ -18,20 +19,27 @@ static void udp_server_receive_thread(void const *argument) { //
while (true) { while (true) {
struct sockaddr_in sock; struct sockaddr_in sock;
socklen_t sock_len = sizeof(sock); socklen_t sock_len = sizeof(sock);
int recv_datalen = recvfrom(udp_handler->sock_fd, udp_handler->rxbuf, udp_handler->rxbuf_len, 0, (struct sockaddr *)&sock, &sock_len);
int recv_datalen = recvfrom(udp_handler->sock_fd, (char *)udp_handler->rxbuf, udp_handler->rxbuf_len, 0, (struct sockaddr *)&sock, &sock_len);
if (recv_datalen > 0) { if (recv_datalen > 0) {
if (udp_handler->on_packet) udp_handler->on_packet(udp_handler, &sock, udp_handler->rxbuf, recv_datalen);
if (udp_handler->on_packet) udp_handler->on_packet(udp_handler, &sock, (uint8_t *)udp_handler->rxbuf, recv_datalen);
} }
} }
} }
bool xs_udp_init(udp_t *udp_handler, uint16_t port, udp_on_packet_t on_packet, void *data) {
bool xs_udp_init(udp_t *udp_handler, uint16_t port, udp_on_packet_t on_packet, int32_t rxbuf_size, void *data) {
memset(udp_handler, 0, sizeof(udp_t)); memset(udp_handler, 0, sizeof(udp_t));
udp_handler->server.sin_family = AF_INET; udp_handler->server.sin_family = AF_INET;
udp_handler->server.sin_addr.s_addr = inet_addr("0.0.0.0"); udp_handler->server.sin_addr.s_addr = inet_addr("0.0.0.0");
udp_handler->server.sin_port = htons(port); udp_handler->server.sin_port = htons(port);
udp_handler->on_packet = on_packet; udp_handler->on_packet = on_packet;
udp_handler->data = data; udp_handler->data = data;
if (rxbuf_size == 0) {
udp_handler->rxbuf_len = 1024;
} else {
udp_handler->rxbuf_len = rxbuf_size;
}
udp_handler->rxbuf = (char *)malloc(udp_handler->rxbuf_len);
ZASSERT(udp_handler->rxbuf != NULL);
// ´´½¨¿Í»§ËÓÃÓÚͨÐŵÄSocket // ´´½¨¿Í»§ËÓÃÓÚͨÐŵÄSocket
udp_handler->sock_fd = socket(AF_INET, SOCK_DGRAM, IPPROTO_UDP); udp_handler->sock_fd = socket(AF_INET, SOCK_DGRAM, IPPROTO_UDP);
@ -51,6 +59,7 @@ bool xs_udp_init(udp_t *udp_handler, uint16_t port, udp_on_packet_t on_packet, v
udp_handler->rx_thread = osThreadCreate(osThread(udp_server_rx_thread), udp_handler); udp_handler->rx_thread = osThreadCreate(osThread(udp_server_rx_thread), udp_handler);
ZASSERT(udp_handler->rx_thread != NULL); ZASSERT(udp_handler->rx_thread != NULL);
} }
return true;
} }
int xs_udp_send_message(udp_t *udp_handler, const char *ip, int port, const char *data, int len) { // int xs_udp_send_message(udp_t *udp_handler, const char *ip, int port, const char *data, int len) { //

2
iflytop_xsync/xs_udp.h
View File

@ -27,7 +27,7 @@ typedef struct {
int sock_fd; int sock_fd;
} udp_broadcast_handler_t; } udp_broadcast_handler_t;
bool xs_udp_init(udp_t *udp_handler, uint16_t port, udp_on_packet_t on_packet, void *data);
bool xs_udp_init(udp_t *udp_handler, uint16_t port, udp_on_packet_t on_packet, int32_t rxbuf_size, void *data);
int xs_udp_send_message(udp_t *udp_handler, const char *remoteip, int remoteport, const char *data, int len); int xs_udp_send_message(udp_t *udp_handler, const char *remoteip, int remoteport, const char *data, int len);
int xs_udp_send_message2(udp_t *udp_handler, struct sockaddr_in *add, const char *data, int len); int xs_udp_send_message2(udp_t *udp_handler, struct sockaddr_in *add, const char *data, int len);

65
iflytop_xsync_protocol/iflytop_xsync_protocol.h
View File

@ -10,7 +10,7 @@
#define IFLYTOP_XSYNC_TIMECODE_REPORT_TO_PORT 19903 #define IFLYTOP_XSYNC_TIMECODE_REPORT_TO_PORT 19903
#define IFLYTOP_XSYNC_CAMERA_SYNC_PACKET_FROM_PORT 13013 #define IFLYTOP_XSYNC_CAMERA_SYNC_PACKET_FROM_PORT 13013
#define IFLYTOP_XSYNC_CAMERA_SYNC_PACKET_TO_PORT 13014
#define IFLYTOP_XSYNC_CAMERA_SYNC_PACKET_TO_PORT 13014
/** /**
* @brief * @brief
@ -61,6 +61,7 @@ typedef struct {
#define XYSNC_REG_DEVICE_INFO_START_ADD 0 #define XYSNC_REG_DEVICE_INFO_START_ADD 0
#define XYSNC_REG_STM32_CONFIG_START_ADD 16 #define XYSNC_REG_STM32_CONFIG_START_ADD 16
#define XYSNC_REG_FPGA_REG_START 32
typedef enum { typedef enum {
/** /**
@ -68,20 +69,70 @@ typedef enum {
* REG 0(16) 设备信息基础寄存器 * REG 0(16) 设备信息基础寄存器
*/ */
kxsync_reg_software_version = 0, kxsync_reg_software_version = 0,
kxsync_reg_manufacturer = 1,
kxsync_reg_product_type_id = 2,
kxsync_reg_manufacturer0 = 1,
kxsync_reg_manufacturer1 = 2,
kxsync_reg_product_type_id = 3,
kxsync_reg_sn_id0 = 4,
kxsync_reg_sn_id1 = 5,
kxsync_reg_sn_id2 = 6,
kxsync_reg_mac0 = 7,
kxsync_reg_mac1 = 8,
/** /**
* @brief * @brief
* REG 16(32) STM32配置寄存器0 * REG 16(32) STM32配置寄存器0
*/ */
kxsync_reg_stm32_obtaining_ip_mode = XYSNC_REG_STM32_CONFIG_START_ADD + 0,
kxsync_reg_stm32_ip = XYSNC_REG_STM32_CONFIG_START_ADD + 1,
kxsync_reg_stm32_gw = XYSNC_REG_STM32_CONFIG_START_ADD + 2,
kxsync_reg_stm32_netmask = XYSNC_REG_STM32_CONFIG_START_ADD + 3,
kxsync_reg_stm32_obtaining_ip_mode = XYSNC_REG_STM32_CONFIG_START_ADD + 0,
kxsync_reg_stm32_ip = XYSNC_REG_STM32_CONFIG_START_ADD + 1,
kxsync_reg_stm32_gw = XYSNC_REG_STM32_CONFIG_START_ADD + 2,
kxsync_reg_stm32_netmask = XYSNC_REG_STM32_CONFIG_START_ADD + 3,
kxsync_reg_stm32_camera_sync_signal_count = XYSNC_REG_STM32_CONFIG_START_ADD + 4, // 写任意数值之后清零
kxsync_reg_stm32_config0 = XYSNC_REG_STM32_CONFIG_START_ADD + 5, // bit0: timecode report enable, bit1: camera sync report enable
kxsync_reg_stm32_action0 = XYSNC_REG_STM32_CONFIG_START_ADD + 14, // action reg
kxsync_reg_stm32_action_val0 = XYSNC_REG_STM32_CONFIG_START_ADD + 15, // action val reg
/**
* @brief
* REG 48(32) FPGA配置寄存器0
*/
kxsync_fpga_reg_test_reg0 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 0,
kxsync_fpga_reg_test_reg1 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 1,
kxsync_fpga_reg_test_reg2 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 2,
kxsync_fpga_reg_test_reg3 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 3,
kxsync_fpga_reg_test_reg4 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 4,
kxsync_fpga_reg_test_reg5 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 5,
kxsync_fpga_reg_test_reg6 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 6,
kxsync_fpga_reg_test_reg7 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 7,
kxsync_fpga_reg_test_reg8 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 8,
kxsync_fpga_reg_test_reg9 = XYSNC_REG_FPGA_REG_START + 16 * 0 + 9,
kxsync_fpga_reg_test_rega = XYSNC_REG_FPGA_REG_START + 16 * 0 + 10,
kxsync_fpga_reg_test_regb = XYSNC_REG_FPGA_REG_START + 16 * 0 + 11,
kxsync_fpga_reg_test_regc = XYSNC_REG_FPGA_REG_START + 16 * 0 + 12,
kxsync_fpga_reg_test_regd = XYSNC_REG_FPGA_REG_START + 16 * 0 + 13,
kxsync_fpga_reg_test_rege = XYSNC_REG_FPGA_REG_START + 16 * 0 + 14,
kxsync_fpga_reg_test_regf = XYSNC_REG_FPGA_REG_START + 16 * 0 + 15,
} xsync_reg_add_t; } xsync_reg_add_t;
#define KXSYNC_REG_STM32_CONFIG0_MASK_TIMECODE_REPORT_ENABLE 0x01
#define KXSYNC_REG_STM32_CONFIG0_MASK_CAMERA_SYNC_REPORT_ENABLE 0x02
typedef enum {
xsync_stm32_action_none, //
xsync_stm32_action_generator_new_mac, //
xsync_stm32_action_factory_reset, //
xsync_stm32_action_reboot, //
xsync_stm32_action_storage_cfg, //
} xsync_stm32_action_t;
typedef enum {
kxsync_device_type_none = 0,
kxsync_device_type_xsync = 1,
kxsync_device_type_puck_station = 2,
kxsync_device_type_encoder = 3,
} xsync_device_type_t;
typedef enum { obtaining_ip_mode_type_static = 0, obtaining_ip_mode_type_dhcp = 1 } obtaining_ip_mode_t; typedef enum { obtaining_ip_mode_type_static = 0, obtaining_ip_mode_type_dhcp = 1 } obtaining_ip_mode_t;
static inline const char* obtaining_ip_mode_to_string(obtaining_ip_mode_t mode) { static inline const char* obtaining_ip_mode_to_string(obtaining_ip_mode_t mode) {
switch (mode) { switch (mode) {

55
usrc/base_service/config_service.c
View File

@ -15,40 +15,57 @@ static void dump_config(config_t *pcfg) {
ZLOGI(TAG, "mac : %02x:%02x:%02x:%02x:%02x:%02x", pcfg->mac[0], pcfg->mac[1], pcfg->mac[2], pcfg->mac[3], pcfg->mac[4], pcfg->mac[5]); ZLOGI(TAG, "mac : %02x:%02x:%02x:%02x:%02x:%02x", pcfg->mac[0], pcfg->mac[1], pcfg->mac[2], pcfg->mac[3], pcfg->mac[4], pcfg->mac[5]);
ZLOGI(TAG, "======================================"); ZLOGI(TAG, "======================================");
} }
static void create_default_config() { //
_default_val_config.config_mark = FLASH_MASK_VAL;
IP4_ADDR((ip4_addr_t *)&_default_val_config.ip, 192, 168, 8, 10);
IP4_ADDR((ip4_addr_t *)&_default_val_config.gw, 192, 168, 8, 1);
IP4_ADDR((ip4_addr_t *)&_default_val_config.netmask, 255, 255, 255, 0);
_default_val_config.obtaining_ip_mode = obtaining_ip_mode_type_static; // dhcp
static void create_default_config(config_t *now_cfg, bool cfg_is_error, config_t *default_cfg) { //
default_cfg->config_mark = FLASH_MASK_VAL;
IP4_ADDR((ip4_addr_t *)&default_cfg->ip, 192, 168, 8, 10);
IP4_ADDR((ip4_addr_t *)&default_cfg->gw, 192, 168, 8, 1);
IP4_ADDR((ip4_addr_t *)&default_cfg->netmask, 255, 255, 255, 0);
default_cfg->obtaining_ip_mode = obtaining_ip_mode_type_static; // dhcp
default_cfg->config0 = KXSYNC_REG_STM32_CONFIG0_MASK_TIMECODE_REPORT_ENABLE | //
KXSYNC_REG_STM32_CONFIG0_MASK_CAMERA_SYNC_REPORT_ENABLE;
static mac_t mac; static mac_t mac;
xs_id_generate_random_mac(&mac);
memcpy(&_default_val_config.mac[0], mac.mac, 6);
// ZLOGD(TAG, "random mac is %02x:%02x:%02x:%02x:%02x:%02x", mac.mac[0], mac.mac[1], mac.mac[2], mac.mac[3], mac.mac[4], mac.mac[5]);
// dump_config(&_default_val_config);
if (now_cfg->mac[0] == 0 && now_cfg->mac[1] == 0 && now_cfg->mac[2] == 0 && now_cfg->mac[3] == 0 && now_cfg->mac[4] == 0 && now_cfg->mac[5] == 0) {
xs_id_generate_random_mac(&mac);
ZLOGI(TAG, "gen random mac is %02x:%02x:%02x:%02x:%02x:%02x", mac.mac[0], mac.mac[1], mac.mac[2], mac.mac[3], mac.mac[4], mac.mac[5]);
} else if (now_cfg->mac[0] == 0xff && now_cfg->mac[1] == 0xff && now_cfg->mac[2] == 0xff && now_cfg->mac[3] == 0xff && now_cfg->mac[4] == 0xff && now_cfg->mac[5] == 0xff) {
xs_id_generate_random_mac(&mac);
ZLOGI(TAG, "gen random mac is %02x:%02x:%02x:%02x:%02x:%02x", mac.mac[0], mac.mac[1], mac.mac[2], mac.mac[3], mac.mac[4], mac.mac[5]);
} else {
memcpy(&mac.mac, now_cfg->mac, 6);
}
memset(&default_cfg->mac[0], 0, sizeof(default_cfg->mac));
memcpy(&default_cfg->mac[0], mac.mac, 6);
} }
void config_init(void) { void config_init(void) {
ZLOGI(TAG, "config_init"); ZLOGI(TAG, "config_init");
/**
* @brief 构造默认配置
*/
create_default_config();
/** /**
* @brief flash初始化 * @brief flash初始化
*/ */
xs_flash_init(&_config, &_default_val_config, sizeof(config_t) / 4);
xs_flash_init((uint32_t *)&_config, sizeof(config_t) / 4);
bool cfg_is_error = !xs_flash_check();
// ZLOGI(TAG, "xs_flash_is_first_run: %d", xs_flash_is_first_run());
// ZLOGI(TAG, "");
create_default_config(&_config, cfg_is_error, &_default_val_config);
xs_flash_set_default_data((uint32_t *)&_default_val_config);
if (cfg_is_error) {
xs_flash_factory_reset();
}
/** /**
* @brief 打印配置信息 * @brief 打印配置信息
*/ */
dump_config(&_config); dump_config(&_config);
} }
config_t *config_get(void) { return &_config; } config_t *config_get(void) { return &_config; }
void config_flush(void) { return xs_flash_flush(); }
void config_flush(void) { xs_flash_flush(); }
void config_factory_reset(void) { xs_flash_factory_reset(); } void config_factory_reset(void) { xs_flash_factory_reset(); }
void config_generate_random_mac(void) {
static mac_t mac;
xs_id_generate_random_mac(&mac);
memset(&_config.mac[0], 0, sizeof(_config.mac));
memcpy(&_config.mac[0], mac.mac, 6);
}

5
usrc/base_service/config_service.h
View File

@ -14,8 +14,8 @@ typedef struct {
uint32_t ip; uint32_t ip;
uint32_t gw; uint32_t gw;
uint32_t netmask; uint32_t netmask;
uint8_t mac[8]; // mac[5:0] is mac, mac[7:6] is pad for 32bit align
uint32_t config0; //
uint8_t mac[8]; // mac[5:0] is mac, mac[7:6] is pad for 32bit align
uint32_t checksum; // ²»ÐèÒª±à¼­ uint32_t checksum; // ²»ÐèÒª±à¼­
} config_t; } config_t;
@ -24,6 +24,7 @@ void config_init(void);
config_t* config_get(void); config_t* config_get(void);
void config_flush(void); void config_flush(void);
void config_factory_reset(void); void config_factory_reset(void);
void config_generate_random_mac(void);
#ifdef __cplusplus #ifdef __cplusplus
} }

8
usrc/main.cpp
View File

@ -37,13 +37,11 @@ void StartDefaultTask(void const* argument) { umain(); }
xs_gpio_t m_debug_led; xs_gpio_t m_debug_led;
extern "C" { extern "C" {
void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) {
report_generator_service_irq_trigger(GPIO_Pin);
}
void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) { report_generator_service_irq_trigger(GPIO_Pin); }
} }
void umain() { void umain() {
XS_LOGI(TAG, "%s:%s", PC_PROJECT_NAME, PC_VERSION);
XS_LOGI(TAG, "%s:%d", PC_PROJECT_NAME, PC_VERSION);
/** /**
* @brief 调试指示灯初始化 * @brief 调试指示灯初始化
*/ */
@ -74,6 +72,8 @@ void umain() {
reg_manager_init(); reg_manager_init();
/** /**
* @brief extern_if_service init * @brief extern_if_service init
*
* 解析并处理外部指令
*/ */
extern_if_service_init(); extern_if_service_init();

7
usrc/project_configs.h
View File

@ -1,7 +1,8 @@
#pragma once #pragma once
#define PC_VERSION "v1.0.1"
#define PC_MANUFACTURER "http://www.iflytop.com/"
#define PC_VERSION 1
#define PC_MANUFACTURER0 ('i' << 24 | 'f' << 16 | 'l' << 8 | 'y')
#define PC_MANUFACTURER1 ('t' << 24 | 'o' << 16 | 'p' << 8 | '\0')
#define PC_PROJECT_NAME "xsync" #define PC_PROJECT_NAME "xsync"
#define PC_IFLYTOP_ENABLE_OS 1 #define PC_IFLYTOP_ENABLE_OS 1
@ -16,4 +17,4 @@
#define PC_IRQ_PREEMPTPRIORITY_DEFAULT 5 #define PC_IRQ_PREEMPTPRIORITY_DEFAULT 5
#define PC_NVS_ENABLE 1
#define PC_NVS_ENABLE 1

10
usrc/service/device_info.cpp
View File

@ -2,4 +2,14 @@
#include "device_info.hpp" #include "device_info.hpp"
#include "iflytop_xsync/xs_id.h"
void device_info_init() {} void device_info_init() {}
void device_info_get_sn(sn_t* device_id) {
static cpu_id_t cpu_id;
xs_id_get_cpu_id(&cpu_id);
device_id->sn0 = cpu_id.id[0] | (cpu_id.id[1] << 8) | (cpu_id.id[2] << 16) | (cpu_id.id[3] << 24);
device_id->sn1 = cpu_id.id[4] | (cpu_id.id[5] << 8) | (cpu_id.id[6] << 16) | (cpu_id.id[7] << 24);
device_id->sn2 = cpu_id.id[8] | (cpu_id.id[9] << 8) | (cpu_id.id[10] << 16) | (cpu_id.id[11] << 24);
return;
}

7
usrc/service/device_info.hpp
View File

@ -7,6 +7,13 @@ extern "C" {
#endif #endif
void device_info_init(); void device_info_init();
typedef struct {
uint32_t sn0;
uint32_t sn1;
uint32_t sn2;
} sn_t;
void device_info_get_sn(sn_t* device_id);
#ifdef __cplusplus #ifdef __cplusplus
} }

24
usrc/service/extern_if_service.c
View File

@ -5,8 +5,8 @@
#include "iflytop_xsync\xs_udp.h" #include "iflytop_xsync\xs_udp.h"
#include "reg_manager.h" #include "reg_manager.h"
static udp_t m_udp_cmd_server; //
static udp_broadcast_handler_t m_udp_camera_sync_sender; //
static udp_t m_udp_cmd_server; //
// static udp_broadcast_handler_t m_udp_camera_sync_sender; //
static struct sockaddr_in m_last_rxpacket_client; static struct sockaddr_in m_last_rxpacket_client;
static bool m_last_rxpacket_client_valid = false; static bool m_last_rxpacket_client_valid = false;
@ -36,7 +36,7 @@ static void create_and_send_receipt(extern_if_service_context_t *context, uint32
txpacket->cmd = context->rxpacket->cmd; txpacket->cmd = context->rxpacket->cmd;
txpacket->ndata = ndata; txpacket->ndata = ndata;
memcpy(txpacket->data, data, ndata * sizeof(uint32_t)); memcpy(txpacket->data, data, ndata * sizeof(uint32_t));
xs_udp_send_message2(context->server, context->client, txbuf, sizeof(iflytop_xsync_packet_header_t) + ndata * sizeof(uint32_t));
xs_udp_send_message2(context->server, context->client, (const char *)txbuf, sizeof(iflytop_xsync_packet_header_t) + ndata * sizeof(uint32_t));
} }
#if 0 #if 0
/** /**
@ -94,8 +94,8 @@ static void udp_on_packet(udp_t *server, struct sockaddr_in *client, uint8_t *da
uint32_t regval = rxpacket->data[1]; uint32_t regval = rxpacket->data[1];
uint32_t receipt[2]; uint32_t receipt[2];
receipt[0] = 0; //
receipt[1] = reg_manager_read_reg(regadd); // regdata
receipt[0] = 0; //
receipt[1] = reg_manager_write_reg(regadd, regval);
create_and_send_receipt(&cx, receipt, 2); create_and_send_receipt(&cx, receipt, 2);
} else if (rxpacket->cmd == kxsync_packet_type_reg_read_regs) { } else if (rxpacket->cmd == kxsync_packet_type_reg_read_regs) {
@ -110,19 +110,7 @@ static void udp_on_packet(udp_t *server, struct sockaddr_in *client, uint8_t *da
} }
} }
static void udp_server_receive_thread(void const *argument) { //
udp_t *udp_handler = (udp_t *)argument;
while (true) {
struct sockaddr_in sock;
socklen_t sock_len = sizeof(sock);
int recv_datalen = recvfrom(udp_handler->sock_fd, udp_handler->rxbuf, udp_handler->rxbuf_len, 0, (struct sockaddr *)&sock, &sock_len);
if (recv_datalen > 0) {
if (udp_handler->on_packet) udp_handler->on_packet(udp_handler, &sock, udp_handler->rxbuf, recv_datalen);
}
}
}
void extern_if_service_init() { ZASSERT(xs_udp_init(&m_udp_cmd_server, IFLYTOP_XSYNC_SERVICE_PORT, udp_on_packet, NULL)); }
void extern_if_service_init() { ZASSERT(xs_udp_init(&m_udp_cmd_server, IFLYTOP_XSYNC_SERVICE_PORT, udp_on_packet, 1024, NULL)); }
#if 0 #if 0
void extern_if_service_send_timecode(struct sockaddr_in client, uint32_t timecode0, uint32_t timecode1) { create_and_send_timecode(client, timecode0, timecode1); } void extern_if_service_send_timecode(struct sockaddr_in client, uint32_t timecode0, uint32_t timecode1) { create_and_send_timecode(client, timecode0, timecode1); }
#endif #endif

147
usrc/service/reg_manager.c
View File

@ -1,19 +1,152 @@
#include "reg_manager.h" #include "reg_manager.h"
uint32_t reg[MAX_REG_NUM];
#include "base_service/config_service.h"
#include "base_service/fpga_if.h"
#include "device_info.hpp"
#include "iflytop_xsync_protocol/iflytop_xsync_protocol.h"
#include "service/report_generator_service.h"
uint32_t m_action_val0;
uint32_t m_action_receipt;
void reg_manager_init() {} void reg_manager_init() {}
uint32_t reg_manager_read_reg(uint32_t addr) {
if (addr < MAX_REG_NUM) return reg[addr];
/*******************************************************************************
* ACTION *
*******************************************************************************/
static uint32_t doaction(uint32_t action, uint32_t val) {
if (action == xsync_stm32_action_generator_new_mac) {
config_get()->config0 = val;
return 0;
} else if (action == xsync_stm32_action_factory_reset) {
config_factory_reset();
return 0;
} else if (action == xsync_stm32_action_reboot) {
config_generate_random_mac();
return 0;
} else if (action == xsync_stm32_action_storage_cfg) {
config_flush();
return 0;
}
return 0; return 0;
} }
uint32_t reg_manager_read_reg(uint32_t addr) {
uint32_t readbak = 0;
static sn_t sncode;
if (addr == kxsync_reg_software_version) { // read only
readbak = PC_VERSION;
} else if (addr == kxsync_reg_manufacturer0) { // read only
readbak = PC_MANUFACTURER0;
} else if (addr == kxsync_reg_manufacturer1) { // read only
readbak = PC_MANUFACTURER1;
} else if (addr == kxsync_reg_product_type_id) { // read only
readbak = kxsync_device_type_xsync;
} else if (addr == kxsync_reg_sn_id0) { // read only
device_info_get_sn(&sncode);
readbak = sncode.sn0;
} else if (addr == kxsync_reg_sn_id1) { // read only
device_info_get_sn(&sncode);
readbak = sncode.sn1;
} else if (addr == kxsync_reg_sn_id2) { // read only
device_info_get_sn(&sncode);
readbak = sncode.sn2;
} else if (addr == kxsync_reg_mac0) { // read only
memcpy(&readbak, config_get()->mac, 4);
} else if (addr == kxsync_reg_mac1) { // read only
memcpy(&readbak, config_get()->mac + 4, 4);
}
/*******************************************************************************
* CONFIG *
*******************************************************************************/
else if (addr == kxsync_reg_stm32_obtaining_ip_mode) {
readbak = config_get()->obtaining_ip_mode;
} else if (addr == kxsync_reg_stm32_ip) {
readbak = config_get()->ip;
} else if (addr == kxsync_reg_stm32_gw) {
readbak = config_get()->gw;
} else if (addr == kxsync_reg_stm32_netmask) {
readbak = config_get()->netmask;
} else if (addr == kxsync_reg_stm32_camera_sync_signal_count) {
readbak = report_generator_service_xsync_get_count();
} else if (addr == kxsync_reg_stm32_config0) {
readbak = config_get()->config0;
}
/*******************************************************************************
* ACTION *
*******************************************************************************/
else if (addr == kxsync_reg_stm32_action0) {
readbak = m_action_receipt;
} else if (addr == kxsync_reg_stm32_action_val0) {
readbak = m_action_val0;
}
/*******************************************************************************
* FPGA芯片寄存器读写 *
*******************************************************************************/
else if (addr > XYSNC_REG_FPGA_REG_START) {
fpga_if_spi_read_data_01(addr, &readbak);
}
return readbak;
}
uint32_t reg_manager_write_reg(uint32_t addr, uint32_t value) { uint32_t reg_manager_write_reg(uint32_t addr, uint32_t value) {
if (addr < MAX_REG_NUM) {
reg[addr] = value;
return reg[addr];
uint32_t readbak = 0;
/*******************************************************************************
* INFO *
*******************************************************************************/
if (addr == kxsync_reg_software_version) { // read only
readbak = reg_manager_read_reg(addr);
} else if (addr == kxsync_reg_manufacturer0) { // read only
readbak = reg_manager_read_reg(addr);
} else if (addr == kxsync_reg_manufacturer1) { // read only
readbak = reg_manager_read_reg(addr);
} else if (addr == kxsync_reg_product_type_id) { // read only
readbak = reg_manager_read_reg(addr);
} }
return 0;
/*******************************************************************************
* CONFIG *
*******************************************************************************/
else if (addr == kxsync_reg_stm32_obtaining_ip_mode) {
config_get()->obtaining_ip_mode = value;
readbak = config_get()->obtaining_ip_mode;
} else if (addr == kxsync_reg_stm32_ip) {
config_get()->ip = value;
readbak = config_get()->ip;
} else if (addr == kxsync_reg_stm32_gw) {
config_get()->gw = value;
readbak = config_get()->gw;
} else if (addr == kxsync_reg_stm32_netmask) {
config_get()->netmask = value;
readbak = config_get()->netmask;
} else if (addr == kxsync_reg_stm32_camera_sync_signal_count) {
// 清零
report_generator_service_xsync_clear_count();
readbak = report_generator_service_xsync_get_count();
} else if (addr == kxsync_reg_stm32_config0) {
readbak = config_get()->config0;
}
/*******************************************************************************
* ACTION *
*******************************************************************************/
else if (addr == kxsync_reg_stm32_action0) {
readbak = doaction(value, m_action_val0);
m_action_receipt = readbak;
} else if (addr == kxsync_reg_stm32_action_val0) {
m_action_val0 = value;
readbak = value;
}
/*******************************************************************************
* FPGA芯片寄存器读写 *
*******************************************************************************/
else if (addr > XYSNC_REG_FPGA_REG_START) {
fpga_if_spi_write_data_01(addr, value, &readbak);
}
return readbak;
} }
void reg_manager_read_regs(uint32_t start_addr, uint32_t nreg, uint32_t* datacache, uint32_t* len) { void reg_manager_read_regs(uint32_t start_addr, uint32_t nreg, uint32_t* datacache, uint32_t* len) {

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