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和FPGA SPI通信成功

v5
zhaohe 2 years ago
parent
commit
4af6e341d1
  1. 2
      Core/Inc/FreeRTOSConfig.h
  2. 4
      Core/Src/gpio.c
  3. 12
      Core/Src/spi.c
  4. 41
      usrc/base_service/fpga_if.c
  5. 3
      usrc/main.cpp
  6. 34
      xsync_stm32.ioc

2
Core/Inc/FreeRTOSConfig.h

@ -61,7 +61,7 @@
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( SystemCoreClock )
#define configTICK_RATE_HZ ((TickType_t)10000)
#define configTICK_RATE_HZ ((TickType_t)1000)
#define configMAX_PRIORITIES ( 7 )
#define configMINIMAL_STACK_SIZE ((uint16_t)128)
#define configTOTAL_HEAP_SIZE ((size_t)30000)

4
Core/Src/gpio.c

@ -89,10 +89,10 @@ void MX_GPIO_Init(void)
/*Configure GPIO pins : PB0 PB1 PB2 PB14
PB15 PB3 PB4 PB6
PB7 PB8 */
PB7 PB8 PB9 */
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_14
|GPIO_PIN_15|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_6
|GPIO_PIN_7|GPIO_PIN_8;
|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);

12
Core/Src/spi.c

@ -49,7 +49,7 @@ void MX_SPI1_Init(void)
hspi1.Init.CLKPolarity = SPI_POLARITY_HIGH;
hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
hspi1.Init.NSS = SPI_NSS_HARD_OUTPUT;
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64;
hspi1.Init.FirstBit = SPI_FIRSTBIT_LSB;
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
@ -80,8 +80,8 @@ void MX_SPI2_Init(void)
hspi2.Init.DataSize = SPI_DATASIZE_8BIT;
hspi2.Init.CLKPolarity = SPI_POLARITY_HIGH;
hspi2.Init.CLKPhase = SPI_PHASE_2EDGE;
hspi2.Init.NSS = SPI_NSS_HARD_OUTPUT;
hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
hspi2.Init.NSS = SPI_NSS_SOFT;
hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
hspi2.Init.FirstBit = SPI_FIRSTBIT_LSB;
hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
@ -188,7 +188,6 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
PC2 ------> SPI2_MISO
PC3 ------> SPI2_MOSI
PB10 ------> SPI2_SCK
PB9 ------> SPI2_NSS
*/
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
@ -197,7 +196,7 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_9;
GPIO_InitStruct.Pin = GPIO_PIN_10;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
@ -293,11 +292,10 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
PC2 ------> SPI2_MISO
PC3 ------> SPI2_MOSI
PB10 ------> SPI2_SCK
PB9 ------> SPI2_NSS
*/
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_2|GPIO_PIN_3);
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10|GPIO_PIN_9);
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10);
/* SPI2 DMA DeInit */
HAL_DMA_DeInit(spiHandle->hdmatx);

41
usrc/base_service/fpga_if.c

@ -10,20 +10,20 @@ xs_gpio_t spi1_cs;
void fpga_if_init() { //
// fpga_if.spi1 = &hspi1;
// fpga_if.spi2 = &hspi2;
fpga_if.spi1 = &hspi2;
fpga_if.spi2 = &hspi1;
xs_gpio_init_as_output(&spi1_cs, PC6, kxs_gpio_nopull, false, true);
uint8_t rxbuf[1];
/**
* @brief SPI在未传输第一帧数据之前线()
* 使线
*/
uint8_t rxbuf[1];
fpga_if.spi1 = &hspi2;
xs_gpio_init_as_output(&spi1_cs, PB9, kxs_gpio_nopull, false, true);
HAL_SPI_Receive(fpga_if.spi1, rxbuf, 1, 1000);
HAL_SPI_Receive(fpga_if.spi2, rxbuf, 1, 1000);
// xs_gpio_init_as_output(PA)
// fpga_if.spi2 = &hspi1;
// HAL_SPI_Receive(fpga_if.spi2, rxbuf, 1, 1000);
#if 0
xs_gpio_init_as_input(&fpga_if.camera_sync_code_irq_io, fpga_if.camera_sync_code_irq_pin, kxs_gpio_pulldown, kxs_gpio_rising_irq, false);
xs_gpio_init_as_input(&fpga_if.timecode_irq_io, fpga_if.timecode_irq_pin, kxs_gpio_pulldown, kxs_gpio_rising_irq, false);
@ -82,8 +82,8 @@ void fpga_if_get_timecode(uint32_t *timecode0, uint32_t *timecode1) {
* @param rxdata
*/
static void _fpga_if_spi_write_data(SPI_HandleTypeDef *hspi, uint32_t add, uint32_t txdata, uint32_t *rxdata) {
uint8_t txbuf[2 + 4] = {0};
uint8_t rxbuf[2 + 4] = {0};
uint8_t txbuf[2 + 5] = {0};
uint8_t rxbuf[2 + 5] = {0};
txbuf[0] = add & 0xFF;
txbuf[1] = (add >> 8) & 0xFF;
txbuf[1] |= 0x80; // write flag
@ -92,7 +92,7 @@ static void _fpga_if_spi_write_data(SPI_HandleTypeDef *hspi, uint32_t add, uint3
txbuf[4] = (txdata >> 16) & 0xFF;
txbuf[5] = (txdata >> 24) & 0xFF;
HAL_SPI_TransmitReceive_DMA(hspi, txbuf, rxbuf, 2 + 4);
HAL_SPI_TransmitReceive_DMA(hspi, txbuf, rxbuf, 2 + 5);
while (HAL_SPI_GetState(hspi) != HAL_SPI_STATE_READY) {
}
@ -106,8 +106,8 @@ static void _fpga_if_spi_write_data(SPI_HandleTypeDef *hspi, uint32_t add, uint3
* @param rxdata
*/
static void _fpga_if_spi_read_data(SPI_HandleTypeDef *hspi, uint32_t add, uint32_t *rxdata) {
uint8_t txbuf[2 + 4] = {0};
uint8_t rxbuf[2 + 4] = {0};
uint8_t txbuf[2 + 5] = {0};
uint8_t rxbuf[2 + 5] = {0};
txbuf[0] = add & 0xFF;
txbuf[1] = (add >> 8) & 0xFF;
@ -115,24 +115,29 @@ static void _fpga_if_spi_read_data(SPI_HandleTypeDef *hspi, uint32_t add, uint32
txbuf[3] = 0;
txbuf[4] = 0;
txbuf[5] = 0;
HAL_SPI_TransmitReceive_DMA(hspi, txbuf, rxbuf, 2 + 4);
HAL_SPI_TransmitReceive_DMA(hspi, txbuf, rxbuf, 2 + 5);
while (HAL_SPI_GetState(hspi) != HAL_SPI_STATE_READY) {
}
*rxdata = rxbuf[2] | (rxbuf[3] << 8) | (rxbuf[4] << 16) | (rxbuf[5] << 24);
}
void fpga_if_spi_write_data_01(uint32_t add, uint32_t txdata, uint32_t *rxdata) {
// ZLOGI(TAG, "fpga_if_spi_write_data_01 add:%d txdata:%d", add, txdata);
xs_gpio_write(&spi1_cs, false);
_fpga_if_spi_write_data(fpga_if.spi1, add, txdata, rxdata);
xs_gpio_write(&spi1_cs, true);
}
void fpga_if_spi_read_data_01(uint32_t add, uint32_t *rxdata) {
xs_delay_us(1);
xs_gpio_write(&spi1_cs, false);
_fpga_if_spi_read_data(fpga_if.spi1, add, rxdata);
xs_gpio_write(&spi1_cs, true);
}
void fpga_if_spi_write_data_02(uint32_t add, uint32_t txdata, uint32_t *rxdata) { _fpga_if_spi_write_data(fpga_if.spi2, add, txdata, rxdata); }
void fpga_if_spi_read_data_02(uint32_t add, uint32_t *rxdata) { _fpga_if_spi_read_data(fpga_if.spi2, add, rxdata); }
void fpga_if_spi_read_data_01(uint32_t add, uint32_t *rxdata) { _fpga_if_spi_read_data(fpga_if.spi1, add, rxdata); }
void fpga_if_spi_write_data_02(uint32_t add, uint32_t txdata, uint32_t *rxdata) {
if (!fpga_if.spi2) return;
_fpga_if_spi_write_data(fpga_if.spi2, add, txdata, rxdata);
}
void fpga_if_spi_read_data_02(uint32_t add, uint32_t *rxdata) {
if (!fpga_if.spi2) return;
_fpga_if_spi_read_data(fpga_if.spi2, add, rxdata);
}
fpga_if_t *fpga_if_get_instance() { return &fpga_if; }

3
usrc/main.cpp

@ -141,6 +141,9 @@ void umain() {
// HAL_SPI_Transmit(&hspi2, (uint8_t*)"hello", 5, 1000);
osDelay(10);
debug_light_ctrl();
uint32_t rxdata = 0;
fpga_if_spi_write_data_01(32, 0x12345678, &rxdata);
ZLOGI(TAG, "rxdata: %x", rxdata);
// factory_reset_key_detect();
}
}

34
xsync_stm32.ioc

@ -138,24 +138,23 @@ Mcu.Pin2=PC1
Mcu.Pin20=PA14
Mcu.Pin21=PD3
Mcu.Pin22=PB5
Mcu.Pin23=PB9
Mcu.Pin24=VP_CRC_VS_CRC
Mcu.Pin25=VP_FREERTOS_VS_CMSIS_V1
Mcu.Pin26=VP_LWIP_VS_Enabled
Mcu.Pin27=VP_RNG_VS_RNG
Mcu.Pin28=VP_SYS_VS_tim11
Mcu.Pin29=VP_TIM1_VS_ClockSourceINT
Mcu.Pin23=VP_CRC_VS_CRC
Mcu.Pin24=VP_FREERTOS_VS_CMSIS_V1
Mcu.Pin25=VP_LWIP_VS_Enabled
Mcu.Pin26=VP_RNG_VS_RNG
Mcu.Pin27=VP_SYS_VS_tim11
Mcu.Pin28=VP_TIM1_VS_ClockSourceINT
Mcu.Pin29=VP_TIM3_VS_ClockSourceINT
Mcu.Pin3=PC2
Mcu.Pin30=VP_TIM3_VS_ClockSourceINT
Mcu.Pin31=VP_TIM6_VS_ClockSourceINT
Mcu.Pin32=VP_TIM7_VS_ClockSourceINT
Mcu.Pin30=VP_TIM6_VS_ClockSourceINT
Mcu.Pin31=VP_TIM7_VS_ClockSourceINT
Mcu.Pin4=PC3
Mcu.Pin5=PA1
Mcu.Pin6=PA2
Mcu.Pin7=PA4
Mcu.Pin8=PA5
Mcu.Pin9=PA6
Mcu.PinsNb=33
Mcu.PinsNb=32
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F407VETx
@ -219,8 +218,6 @@ PB13.Mode=RMII
PB13.Signal=ETH_TXD1
PB5.Mode=Full_Duplex_Master
PB5.Signal=SPI1_MOSI
PB9.Mode=NSS_Signal_Hard_Output
PB9.Signal=SPI2_NSS
PC1.Mode=RMII
PC1.Signal=ETH_MDC
PC2.Mode=Full_Duplex_Master
@ -309,25 +306,24 @@ RCC.VCOI2SOutputFreq_Value=128000000
RCC.VCOInputFreq_Value=2000000
RCC.VCOOutputFreq_Value=288000000
RCC.VcooutputI2S=64000000
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_16
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_64
SPI1.CLKPhase=SPI_PHASE_2EDGE
SPI1.CLKPolarity=SPI_POLARITY_HIGH
SPI1.CalculateBaudRate=4.5 MBits/s
SPI1.CalculateBaudRate=1.125 MBits/s
SPI1.Direction=SPI_DIRECTION_2LINES
SPI1.FirstBit=SPI_FIRSTBIT_LSB
SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS,BaudRatePrescaler,FirstBit,CLKPolarity,CLKPhase
SPI1.Mode=SPI_MODE_MASTER
SPI1.VirtualNSS=VM_NSSHARD
SPI1.VirtualType=VM_MASTER
SPI2.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_8
SPI2.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_32
SPI2.CLKPhase=SPI_PHASE_2EDGE
SPI2.CLKPolarity=SPI_POLARITY_HIGH
SPI2.CalculateBaudRate=4.5 MBits/s
SPI2.CalculateBaudRate=1.125 MBits/s
SPI2.Direction=SPI_DIRECTION_2LINES
SPI2.FirstBit=SPI_FIRSTBIT_LSB
SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS,CLKPolarity,CLKPhase,FirstBit,BaudRatePrescaler
SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,CLKPolarity,CLKPhase,FirstBit,BaudRatePrescaler
SPI2.Mode=SPI_MODE_MASTER
SPI2.VirtualNSS=VM_NSSHARD
SPI2.VirtualType=VM_MASTER
TIM1.IPParameters=Period,Prescaler
TIM1.Period=9999

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