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127 lines
4.0 KiB
127 lines
4.0 KiB
#include "fpga_if.h"
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#include "xsync_regs.hpp"
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/**
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* @brief fpga_if初始化
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*/
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#define TAG "fpga_if"
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static fpga_if_t fpga_if;
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xs_gpio_t spi2_cs;
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SemaphoreHandle_t m_spilock;
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void fpga_if_init() { //
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// fpga_if.spi1 = &hspi1;
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// fpga_if.spi2 = &hspi2;
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uint8_t rxbuf[1];
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m_spilock = xSemaphoreCreateRecursiveMutex();
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/**
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* @brief 由于SPI在未传输第一帧数据之前，时钟线是低电平(理论上应该为高)，这里
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* 假传输一帧数据，使时钟线变为高电平。
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*/
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/**
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* @brief
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*
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* CPOL:1
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* CPHA:1
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* LSB-FIRST
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*/
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fpga_if.spi2 = &hspi1;
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xs_gpio_init_as_output(&spi2_cs, PA4, kxs_gpio_pullup, false, true);
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HAL_SPI_Receive(fpga_if.spi2, rxbuf, 1, 1000);
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// fpga_if.spi2 = &hspi1;
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// HAL_SPI_Receive(fpga_if.spi2, rxbuf, 1, 1000);
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fpga_if.timecode_irq_pin = PD6;
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fpga_if.camera_sync_code_irq_pin = PD4;
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fpga_if.xsync_workstate_start_sig_irq_io_pin = PD5;
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fpga_if.reset_pin = PD7;
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#if 1
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xs_gpio_init_as_input(&fpga_if.camera_sync_code_irq_io, fpga_if.camera_sync_code_irq_pin, kxs_gpio_pulldown, kxs_gpio_rising_irq, false);
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xs_gpio_init_as_input(&fpga_if.timecode_irq_io, fpga_if.timecode_irq_pin, kxs_gpio_pulldown, kxs_gpio_rising_irq, false);
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xs_gpio_init_as_input(&fpga_if.xsync_workstate_start_sig_irq_io, fpga_if.xsync_workstate_start_sig_irq_io_pin, kxs_gpio_pulldown, kxs_gpio_rising_and_falling_irq, false);
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xs_gpio_init_as_output(&fpga_if.reset_pin_io, fpga_if.reset_pin, kxs_gpio_pullup, false, false);
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xs_gpio_write(&fpga_if.reset_pin_io, false);
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xs_delay_ms(10);
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xs_gpio_write(&fpga_if.reset_pin_io, true);
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#endif
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}
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void fpga_if_get_timecode(uint32_t *timecode0, uint32_t *timecode1) {
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fpga_if_spi_read_data_02(sys_timecode_data0, timecode0);
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fpga_if_spi_read_data_02(sys_timecode_data1, timecode1);
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return;
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}
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void fpga_if_get_record_state(uint32_t *recordstate) {
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fpga_if_spi_read_data_02(record_sig_gen_record_state, recordstate);
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return;
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}
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/**
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* @brief SPI寄存器写指令
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*
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* @param add
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* @param txdata
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* @param rxdata
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*/
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static void _fpga_if_spi_write_data(SPI_HandleTypeDef *hspi, uint32_t add, uint32_t txdata, uint32_t *rxdata) {
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uint8_t txbuf[2 + 5] = {0};
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uint8_t rxbuf[2 + 5] = {0};
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txbuf[0] = add & 0xFF;
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txbuf[1] = (add >> 8) & 0xFF;
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txbuf[1] |= 0x80; // write flag
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txbuf[2] = txdata & 0xFF;
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txbuf[3] = (txdata >> 8) & 0xFF;
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txbuf[4] = (txdata >> 16) & 0xFF;
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txbuf[5] = (txdata >> 24) & 0xFF;
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HAL_SPI_TransmitReceive_DMA(hspi, txbuf, rxbuf, 2 + 5);
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while (HAL_SPI_GetState(hspi) != HAL_SPI_STATE_READY) {
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}
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// HAL_SPI_Transmit(hspi, txbuf, 2 + 4, 1000);
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*rxdata = rxbuf[2] | (rxbuf[3] << 8) | (rxbuf[4] << 16) | (rxbuf[5] << 24);
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}
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/**
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* @brief SPI寄存器读指令
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*
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* @param add
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* @param rxdata
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*/
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static void _fpga_if_spi_read_data(SPI_HandleTypeDef *hspi, uint32_t add, uint32_t *rxdata) {
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uint8_t txbuf[2 + 5] = {0};
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uint8_t rxbuf[2 + 5] = {0};
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txbuf[0] = add & 0xFF;
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txbuf[1] = (add >> 8) & 0xFF;
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txbuf[2] = 0;
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txbuf[3] = 0;
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txbuf[4] = 0;
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txbuf[5] = 0;
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HAL_SPI_TransmitReceive_DMA(hspi, txbuf, rxbuf, 2 + 5);
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while (HAL_SPI_GetState(hspi) != HAL_SPI_STATE_READY) {
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}
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*rxdata = rxbuf[2] | (rxbuf[3] << 8) | (rxbuf[4] << 16) | (rxbuf[5] << 24);
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}
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void fpga_if_spi_write_data_02(uint32_t add, uint32_t txdata, uint32_t *rxdata) {
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xSemaphoreTakeRecursive(m_spilock, portMAX_DELAY);
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xs_gpio_write(&spi2_cs, false);
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_fpga_if_spi_write_data(fpga_if.spi2, add, txdata, rxdata);
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xs_gpio_write(&spi2_cs, true);
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xs_delay_us(1);
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xs_gpio_write(&spi2_cs, false);
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_fpga_if_spi_read_data(fpga_if.spi2, add, rxdata);
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xs_gpio_write(&spi2_cs, true);
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xSemaphoreGiveRecursive(m_spilock);
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}
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void fpga_if_spi_read_data_02(uint32_t add, uint32_t *rxdata) {
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xSemaphoreTakeRecursive(m_spilock, portMAX_DELAY);
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xs_gpio_write(&spi2_cs, false);
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_fpga_if_spi_read_data(fpga_if.spi2, add, rxdata);
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xs_gpio_write(&spi2_cs, true);
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xSemaphoreGiveRecursive(m_spilock);
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}
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fpga_if_t *fpga_if_get_instance() { return &fpga_if; }
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