34 changed files with 856 additions and 1185 deletions
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12.cproject
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6.vscode/settings.json
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3Core/Inc/spi.h
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5Core/Inc/stm32f4xx_it.h
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6Core/Inc/usart.h
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9Core/Src/dma.c
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20Core/Src/gpio.c
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3Core/Src/main.c
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135Core/Src/spi.c
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65Core/Src/stm32f4xx_it.c
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224Core/Src/usart.c
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147camera_light_src_timing_controller_stm32.ioc
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1libzaf/zaf.h
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6libzaf/zaf_bean.h
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19usrc/base_service/config_service.c
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86usrc/base_service/fpga_if.c
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67usrc/base_service/fpga_if.h
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14usrc/base_service/light_ctrl_service.c
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17usrc/base_service/light_ctrl_service.h
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0usrc/base_service/mac_generator.h
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260usrc/base_service/xsync_regs.hpp
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71usrc/main.cpp
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63usrc/project_configs.h
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194usrc/service/extern_if_service.c
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10usrc/service/extern_if_service.h
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102usrc/service/reg_manager.c
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154usrc/service/report_generator_service.c
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50usrc/service/report_generator_service.h
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26zaf_protocol/zaf_ecode.c
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12zaf_protocol/zaf_ecode.h
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5zaf_protocol/zaf_port.h
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2zaf_protocol/zaf_protocol.c
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210zaf_protocol/zaf_protocol.h
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37zaf_protocol/zaf_regs.hpp
@ -0,0 +1,6 @@ |
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#pragma once |
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#include <stdint.h> |
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typedef struct { |
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uint8_t* data; |
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uint32_t len; |
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} zaf_buf_t; |
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@ -0,0 +1,14 @@ |
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#include "light_ctrl_service.h" |
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zaf_gpio_t rlight; |
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zaf_gpio_t glight; |
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zaf_gpio_t blight; |
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|
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void LightCtrlService_init() { |
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zaf_gpio_init_as_output(&rlight, LED_R_PIN, kxs_gpio_nopull, false, false); |
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zaf_gpio_init_as_output(&glight, LED_G_PIN, kxs_gpio_nopull, false, false); |
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zaf_gpio_init_as_output(&blight, LED_B_PIN, kxs_gpio_nopull, false, false); |
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} |
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void LightCtrlService_RedLight_setState(bool state) { zaf_gpio_write(&rlight, state); } |
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void LightCtrlService_BlueLight_setState(bool state) { zaf_gpio_write(&blight, state); } |
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void LightCtrlService_GreenLight_setState(bool state) { zaf_gpio_write(&glight, state); } |
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@ -0,0 +1,17 @@ |
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#pragma once |
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#include <stdint.h> |
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|
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#include "project_dep.h" |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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|
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void LightCtrlService_init(); |
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void LightCtrlService_RedLight_setState(bool state); |
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void LightCtrlService_BlueLight_setState(bool state); |
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void LightCtrlService_GreenLight_setState(bool state); |
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|
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#ifdef __cplusplus |
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} |
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#endif |
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@ -1,260 +0,0 @@ |
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#pragma once
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#define REG_ADD_OFF_STM32 (0x0000)
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#define REG_ADD_OFF_STM32_CONFIG_START_ADD (0x0010)
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#define REGADDOFF__FPGA_INFO (0x0020)
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#define REGADDOFF__TTLIN (0x0100)
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#define REGADDOFF__EXTERNAL_TIMECODE (0x0120)
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#define REGADDOFF__EXTERNAL_GENLOCK (0x0130)
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#define REGADDOFF__INTERNAL_TIMECODE (0x0300)
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#define REGADDOFF__INTERNAL_GENLOCK (0x0310)
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#define REGADDOFF__INTERNAL_CLOCK (0x0320)
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#define REGADDOFF__TTLOUT1 (0x0200)
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#define REGADDOFF__TTLOUT2 (0x0210)
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#define REGADDOFF__TTLOUT3 (0x0220)
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#define REGADDOFF__TTLOUT4 (0x0230)
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#define REGADDOFF__TIMECODE_OUT (0x0240)
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#define REGADDOFF__GENLOCK_OUT (0x0250)
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#define REGADDOFF__CAMERA_SYNC_OUT (0x0260)
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#define REGADDOFF__SYS_TIMECODE (0x0400)
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#define REGADDOFF__SYS_GENLOCK (0x0410)
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#define REGADDOFF__SYS_CLOCK (0x0420)
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#define REGADDOFF__RECORD_SIG_GENERATOR (0x0500)
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typedef enum { |
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/**
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* @brief |
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* REG 0(16) 设备信息基础寄存器 |
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*/ |
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ksoftware_version = 0, |
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kmanufacturer0 = 1, |
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kmanufacturer1 = 2, |
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kproduct_type_id = 3, |
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ksn_id0 = 4, |
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ksn_id1 = 5, |
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ksn_id2 = 6, |
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kmac0 = 7, |
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kmac1 = 8, |
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/**
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* @brief |
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* REG 16(32) STM32配置寄存器0 |
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*/ |
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kstm32_obtaining_ip_mode = REG_ADD_OFF_STM32_CONFIG_START_ADD + 0, |
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kstm32_ip = REG_ADD_OFF_STM32_CONFIG_START_ADD + 1, |
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kstm32_gw = REG_ADD_OFF_STM32_CONFIG_START_ADD + 2, |
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kstm32_netmask = REG_ADD_OFF_STM32_CONFIG_START_ADD + 3, |
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kstm32_config0 = REG_ADD_OFF_STM32_CONFIG_START_ADD + 4, // bit0: timecode report enable, bit1: camera sync report enable
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kstm32_camera_sync_signal_count = REG_ADD_OFF_STM32_CONFIG_START_ADD + 5, // 写任意数值之后清零
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kstm32_camera_sync_signal_count_report_period = REG_ADD_OFF_STM32_CONFIG_START_ADD + 6, // 上报周期，单位为帧数
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kstm32_action0 = REG_ADD_OFF_STM32_CONFIG_START_ADD + 14, // action reg
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kstm32_action_val0 = REG_ADD_OFF_STM32_CONFIG_START_ADD + 15, // action val reg
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/**
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* @brief |
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* REG 48(32) FPGA配置寄存器0 |
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*/ |
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kfpga_info_reg0 = REGADDOFF__FPGA_INFO + 0, |
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kfpga_info_reg1 = REGADDOFF__FPGA_INFO + 1, |
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kfpga_info_reg2 = REGADDOFF__FPGA_INFO + 2, |
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kfpga_info_reg3 = REGADDOFF__FPGA_INFO + 3, |
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kfpga_info_reg4 = REGADDOFF__FPGA_INFO + 4, |
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kfpga_info_reg5 = REGADDOFF__FPGA_INFO + 5, |
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kfpga_info_reg6 = REGADDOFF__FPGA_INFO + 6, |
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kfpga_info_reg7 = REGADDOFF__FPGA_INFO + 7, |
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kfpga_info_reg8 = REGADDOFF__FPGA_INFO + 8, |
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kfpga_info_reg9 = REGADDOFF__FPGA_INFO + 9, |
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kfpga_info_rega = REGADDOFF__FPGA_INFO + 10, |
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kfpga_info_regb = REGADDOFF__FPGA_INFO + 11, |
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kfpga_info_regc = REGADDOFF__FPGA_INFO + 12, |
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kfpga_info_regd = REGADDOFF__FPGA_INFO + 13, |
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kfpga_info_rege = REGADDOFF__FPGA_INFO + 14, |
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kfpga_info_regf = REGADDOFF__FPGA_INFO + 15, |
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/*******************************************************************************
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* TTL输入模块 * |
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*******************************************************************************/ |
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k_ttlin_module = REGADDOFF__TTLIN + 0, |
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k_ttlin_en_reg = REGADDOFF__TTLIN + 1, |
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k_ttlin1_freq_detector_reg = REGADDOFF__TTLIN + 2, |
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k_ttlin2_freq_detector_reg = REGADDOFF__TTLIN + 3, |
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k_ttlin3_freq_detector_reg = REGADDOFF__TTLIN + 4, |
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k_ttlin4_freq_detector_reg = REGADDOFF__TTLIN + 5, |
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k_ttlin1_filter_factor_reg = REGADDOFF__TTLIN + 6, |
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k_ttlin2_filter_factor_reg = REGADDOFF__TTLIN + 7, |
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k_ttlin3_filter_factor_reg = REGADDOFF__TTLIN + 8, |
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k_ttlin4_filter_factor_reg = REGADDOFF__TTLIN + 9, |
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/*******************************************************************************
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* TTL输出模块 * |
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*******************************************************************************/ |
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kreg_ttlout1_module = REGADDOFF__TTLOUT1 + 0, |
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kreg_ttlout1_signal_process_mode = REGADDOFF__TTLOUT1 + 1, |
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kreg_ttlout1_input_signal_select = REGADDOFF__TTLOUT1 + 2, |
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kreg_ttlout1_pllout_freq_division_ctrl = REGADDOFF__TTLOUT1 + 3, |
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kreg_ttlout1_pllout_freq_multiplication_ctrl = REGADDOFF__TTLOUT1 + 4, |
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kreg_ttlout1_pllout_polarity_ctrl = REGADDOFF__TTLOUT1 + 5, |
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kreg_ttlout1_pllout_trigger_edge_select = REGADDOFF__TTLOUT1 + 6, |
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kreg_ttlout1_forward_mode_polarity_ctrl = REGADDOFF__TTLOUT1 + 7, |
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kreg_ttlout1_placeholder0 = REGADDOFF__TTLOUT1 + 8, |
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kreg_ttlout1_freq_detect_bias = REGADDOFF__TTLOUT1 + 9, |
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kreg_ttlout1_sig_in_freq_detect = REGADDOFF__TTLOUT1 + 0xE, |
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kreg_ttlout1_sig_out_freq_detect = REGADDOFF__TTLOUT1 + 0xF, |
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kreg_ttlout2_module = REGADDOFF__TTLOUT2 + 0, |
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kreg_ttlout2_signal_process_mode = REGADDOFF__TTLOUT2 + 1, |
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kreg_ttlout2_input_signal_select = REGADDOFF__TTLOUT2 + 2, |
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kreg_ttlout2_pllout_freq_division_ctrl = REGADDOFF__TTLOUT2 + 3, |
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kreg_ttlout2_pllout_freq_multiplication_ctrl = REGADDOFF__TTLOUT2 + 4, |
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kreg_ttlout2_pllout_polarity_ctrl = REGADDOFF__TTLOUT2 + 5, |
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kreg_ttlout2_pllout_trigger_edge_select = REGADDOFF__TTLOUT2 + 6, |
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kreg_ttlout2_forward_mode_polarity_ctrl = REGADDOFF__TTLOUT2 + 7, |
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kreg_ttlout2_placeholder0 = REGADDOFF__TTLOUT2 + 8, |
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kreg_ttlout2_freq_detect_bias = REGADDOFF__TTLOUT2 + 9, |
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kreg_ttlout2_sig_in_freq_detect = REGADDOFF__TTLOUT2 + 0xE, |
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kreg_ttlout2_sig_out_freq_detect = REGADDOFF__TTLOUT2 + 0xF, |
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kreg_ttlout3_module = REGADDOFF__TTLOUT3 + 0, |
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kreg_ttlout3_signal_process_mode = REGADDOFF__TTLOUT3 + 1, |
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kreg_ttlout3_input_signal_select = REGADDOFF__TTLOUT3 + 2, |
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kreg_ttlout3_pllout_freq_division_ctrl = REGADDOFF__TTLOUT3 + 3, |
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kreg_ttlout3_pllout_freq_multiplication_ctrl = REGADDOFF__TTLOUT3 + 4, |
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kreg_ttlout3_pllout_polarity_ctrl = REGADDOFF__TTLOUT3 + 5, |
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kreg_ttlout3_pllout_trigger_edge_select = REGADDOFF__TTLOUT3 + 6, |
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kreg_ttlout3_forward_mode_polarity_ctrl = REGADDOFF__TTLOUT3 + 7, |
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kreg_ttlout3_placeholder0 = REGADDOFF__TTLOUT3 + 8, |
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kreg_ttlout3_freq_detect_bias = REGADDOFF__TTLOUT3 + 9, |
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kreg_ttlout3_sig_in_freq_detect = REGADDOFF__TTLOUT3 + 0xE, |
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kreg_ttlout3_sig_out_freq_detect = REGADDOFF__TTLOUT3 + 0xF, |
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kreg_ttlout4_module = REGADDOFF__TTLOUT4 + 0, |
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kreg_ttlout4_signal_process_mode = REGADDOFF__TTLOUT4 + 1, |
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kreg_ttlout4_input_signal_select = REGADDOFF__TTLOUT4 + 2, |
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kreg_ttlout4_pllout_freq_division_ctrl = REGADDOFF__TTLOUT4 + 3, |
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kreg_ttlout4_pllout_freq_multiplication_ctrl = REGADDOFF__TTLOUT4 + 4, |
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kreg_ttlout4_pllout_polarity_ctrl = REGADDOFF__TTLOUT4 + 5, |
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kreg_ttlout4_pllout_trigger_edge_select = REGADDOFF__TTLOUT4 + 6, |
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kreg_ttlout4_forward_mode_polarity_ctrl = REGADDOFF__TTLOUT4 + 7, |
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kreg_ttlout4_placeholder0 = REGADDOFF__TTLOUT4 + 8, |
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kreg_ttlout4_freq_detect_bias = REGADDOFF__TTLOUT4 + 9, |
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kreg_ttlout4_sig_in_freq_detect = REGADDOFF__TTLOUT4 + 0xE, |
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kreg_ttlout4_sig_out_freq_detect = REGADDOFF__TTLOUT4 + 0xF, |
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/*******************************************************************************
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* TIMECODE输入模块 * |
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*******************************************************************************/ |
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external_timecode_module = REGADDOFF__EXTERNAL_TIMECODE + 0, |
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external_timecode_sig_selt = REGADDOFF__EXTERNAL_TIMECODE + 1, |
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external_timecode_format = REGADDOFF__EXTERNAL_TIMECODE + 2, |
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external_timecode_code0 = REGADDOFF__EXTERNAL_TIMECODE + 3, |
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external_timecode_code1 = REGADDOFF__EXTERNAL_TIMECODE + 4, |
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/*******************************************************************************
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* 内部TIMECODE模块 * |
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*******************************************************************************/ |
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internal_timecode_module = REGADDOFF__INTERNAL_TIMECODE + 0, |
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internal_timecode_en = REGADDOFF__INTERNAL_TIMECODE + 1, |
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internal_timecode_format = REGADDOFF__INTERNAL_TIMECODE + 2, |
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internal_timecode_data0 = REGADDOFF__INTERNAL_TIMECODE + 3, |
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internal_timecode_data1 = REGADDOFF__INTERNAL_TIMECODE + 4, |
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/*******************************************************************************
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* SYS_TIMECODE * |
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*******************************************************************************/ |
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sys_timecode_module = REGADDOFF__SYS_TIMECODE, |
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sys_timecode_select = REGADDOFF__SYS_TIMECODE + 1, |
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sys_timecode_format = REGADDOFF__SYS_TIMECODE + 2, |
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sys_timecode_data0 = REGADDOFF__SYS_TIMECODE + 3, |
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sys_timecode_data1 = REGADDOFF__SYS_TIMECODE + 4, |
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/*******************************************************************************
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* TIMECODE输出模块 * |
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*******************************************************************************/ |
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timecode_output_module = REGADDOFF__TIMECODE_OUT + 0, |
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timecode_output_timecode0 = REGADDOFF__TIMECODE_OUT + 1, |
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timecode_output_timecode1 = REGADDOFF__TIMECODE_OUT + 2, |
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timecode_output_timecode_format = REGADDOFF__TIMECODE_OUT + 3, |
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timecode_output_bnc_outut_level_select = REGADDOFF__TIMECODE_OUT + 4, |
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timecode_output_headphone_outut_level_select = REGADDOFF__TIMECODE_OUT + 5, |
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/*******************************************************************************
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* 外部GENLOCK * |
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*******************************************************************************/ |
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external_genlock_module = REGADDOFF__EXTERNAL_GENLOCK + 0, |
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external_genlock_freq_detect_bias = REGADDOFF__EXTERNAL_GENLOCK + 1, |
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external_genlock_freq = REGADDOFF__EXTERNAL_GENLOCK + 2, |
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/*******************************************************************************
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* 内部GENLOCK * |
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*******************************************************************************/ |
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internal_genlock_module = REGADDOFF__INTERNAL_GENLOCK + 0, |
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internal_genlock_ctrl_mode = REGADDOFF__INTERNAL_GENLOCK + 1, |
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internal_genlock_en = REGADDOFF__INTERNAL_GENLOCK + 2, |
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internal_genlock_format = REGADDOFF__INTERNAL_GENLOCK + 3, |
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internal_genlock_freq = REGADDOFF__INTERNAL_GENLOCK + 4, |
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/*******************************************************************************
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* SYSGENLOCK * |
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*******************************************************************************/ |
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sys_genlock_module = REGADDOFF__SYS_GENLOCK, |
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sys_genlock_source = REGADDOFF__SYS_GENLOCK + 1, |
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sys_genlock_freq_detect_bias = REGADDOFF__SYS_GENLOCK + 2, |
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sys_genlock_freq = REGADDOFF__SYS_GENLOCK + 3, |
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/*******************************************************************************
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* 内部CLOCK * |
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*******************************************************************************/ |
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internal_clock_module = REGADDOFF__INTERNAL_CLOCK + 0, |
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internal_clock_ctrl_mode = REGADDOFF__INTERNAL_CLOCK + 1, |
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internal_clock_en = REGADDOFF__INTERNAL_CLOCK + 2, |
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internal_clock_freq = REGADDOFF__INTERNAL_CLOCK + 3, |
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/*******************************************************************************
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* SYSCLOCK * |
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*******************************************************************************/ |
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sys_clock_module = REGADDOFF__SYS_CLOCK, |
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sys_clock_source = REGADDOFF__SYS_CLOCK + 1, |
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sys_clock_freq_division_ctrl = REGADDOFF__SYS_CLOCK + 2, |
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sys_clock_freq_multiplication_ctrl = REGADDOFF__SYS_CLOCK + 3, |
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sys_clock_freq_detect_bias = REGADDOFF__SYS_CLOCK + 4, |
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sys_clock_trigger_edge_select = REGADDOFF__SYS_CLOCK + 5, |
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sys_clock_infreq_detect = REGADDOFF__SYS_CLOCK + 0xE, |
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sys_clock_outfreq_detect = REGADDOFF__SYS_CLOCK + 0xF, |
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/*******************************************************************************
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* record_sig_gen * |
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*******************************************************************************/ |
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record_sig_gen_module = REGADDOFF__RECORD_SIG_GENERATOR + 0, |
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record_sig_gen_ctrl_control_mode = REGADDOFF__RECORD_SIG_GENERATOR + 1, |
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record_sig_gen_timecode_start0 = REGADDOFF__RECORD_SIG_GENERATOR + 2, |
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record_sig_gen_timecode_start1 = REGADDOFF__RECORD_SIG_GENERATOR + 3, |
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record_sig_gen_timecode_stop0 = REGADDOFF__RECORD_SIG_GENERATOR + 4, |
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record_sig_gen_timecode_stop1 = REGADDOFF__RECORD_SIG_GENERATOR + 5, |
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record_sig_gen_timecode_control_flag = REGADDOFF__RECORD_SIG_GENERATOR + 6, |
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record_sig_gen_ttlin_trigger_sig_source = REGADDOFF__RECORD_SIG_GENERATOR + 7, |
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record_sig_gen_ttlin_trigger_level = REGADDOFF__RECORD_SIG_GENERATOR + 8, |
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record_sig_gen_exposure_time = REGADDOFF__RECORD_SIG_GENERATOR + 9, |
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record_sig_gen_exposure_offset_time = REGADDOFF__RECORD_SIG_GENERATOR + 10, |
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record_sig_gen_manual_ctrl = REGADDOFF__RECORD_SIG_GENERATOR + 11, |
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record_sig_gen_timecode_snapshot0 = REGADDOFF__RECORD_SIG_GENERATOR + 13, |
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record_sig_gen_timecode_snapshot1 = REGADDOFF__RECORD_SIG_GENERATOR + 14, |
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record_sig_gen_record_state = REGADDOFF__RECORD_SIG_GENERATOR + 15, |
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/*******************************************************************************
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* camera_sync_module * |
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*******************************************************************************/ |
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camera_sync_module = REGADDOFF__CAMERA_SYNC_OUT + 0, |
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camera_sync_pulse_mode_valid_len = REGADDOFF__CAMERA_SYNC_OUT + 1, |
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} RegAdd_t; |
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@ -1,154 +0,0 @@ |
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#include "report_generator_service.h" |
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#include "base_service/fpga_if.h" |
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#include "base_service/task_level_config.h" |
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#include "base_service/xsync_regs.hpp" |
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#include "reg_manager.h" |
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static udp_broadcast_handler_t m_udp_camera_sync_sender; // |
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static udp_broadcast_handler_t m_udp_camera_timecode_sender; // |
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osThreadId timecode_report_thread_id; |
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osThreadId xync_signal_report_thread_id; |
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static uint32_t m_sync_count = 0; |
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// static uint32_t m_camera_sync_packet_report_period = 1; |
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static uint32_t m_xsync_workstate_start_sig_irq_pin_off; |
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static uint32_t m_timecode_trigger_input_off; |
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static uint32_t m_xync_trigger_input_off; |
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static uint32_t m_xyns_camera_sync_packet_last_report_tp; |
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#define TAG "timecode" |
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/** |
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* @brief 构建并发送时间码数据包 |
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* |
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* @param client |
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* @param timecode0 |
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* @param timecode1 |
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*/ |
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static void create_and_send_timecode(uint32_t timecode0, uint32_t timecode1) { |
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static uint8_t txbuf[256]; |
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iflytop_xsync_event_report_packet_t *txpacket = (iflytop_xsync_event_report_packet_t *)txbuf; |
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txpacket->eventid = ktimecode_report_event; |
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txpacket->data[0] = timecode0; |
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txpacket->data[1] = timecode1; |
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zaf_udp_broadcast(&m_udp_camera_timecode_sender, IFLYTOP_XSYNC_EVENT_REPORT_PC_PORT, txbuf, sizeof(iflytop_xsync_event_report_packet_t) + 8); |
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} |
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static void create_and_send_sync_record_state_packet(uint32_t workstate, uint32_t timecode0, uint32_t timecode1) { |
|||
static uint8_t txbuf[256]; |
|||
uint32_t packetdatalen = 3; |
|||
iflytop_xsync_event_report_packet_t *txpacket = (iflytop_xsync_event_report_packet_t *)txbuf; |
|||
txpacket->eventid = kxsync_work_state_report_event; |
|||
txpacket->data[0] = workstate; |
|||
txpacket->data[1] = timecode0; |
|||
txpacket->data[2] = timecode1; |
|||
|
|||
zaf_udp_broadcast(&m_udp_camera_timecode_sender, IFLYTOP_XSYNC_EVENT_REPORT_PC_PORT, txbuf, sizeof(iflytop_xsync_event_report_packet_t) + 4 * packetdatalen); |
|||
} |
|||
/** |
|||
* @brief 构建并发送相机同步数据包 |
|||
* |
|||
* @param count |
|||
*/ |
|||
static void create_and_send_camera_sync_msg(uint32_t count) { |
|||
static uint8_t txbuf[] = { |
|||
0xF0, 0x00, 0x20, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0xF0, 0x42, 0x17, 0x00, 0x00, 0x00, 0xE1, 0xFF, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, 0x78, 0x00, |
|||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
|||
}; |
|||
|
|||
txbuf[7] = count & 0xFF; |
|||
txbuf[6] = (count >> 8) & 0xFF; |
|||
txbuf[5] = (count >> 16) & 0xFF; |
|||
txbuf[4] = (count >> 24) & 0xFF; |
|||
|
|||
zaf_udp_broadcast(&m_udp_camera_sync_sender, IFLYTOP_XSYNC_CAMERA_SYNC_PACKET_PC_PORT, txbuf, sizeof(txbuf)); |
|||
} |
|||
|
|||
static void timecode_report_thread(void const *argument) { |
|||
while (true) { |
|||
osEvent signal = osSignalWait(0x07, osWaitForever); |
|||
if (signal.value.signals & 0x01) { |
|||
uint32_t timecode0, timecode1; |
|||
fpga_if_get_timecode(&timecode0, &timecode1); |
|||
create_and_send_timecode(timecode0, timecode1); |
|||
} |
|||
if (signal.value.signals & 0x02) { |
|||
// 开始录制 |
|||
uint32_t timecode0 = 0; |
|||
uint32_t timecode1 = 0; |
|||
fpga_if_spi_read_data_02(record_sig_gen_timecode_snapshot0, &timecode0); |
|||
fpga_if_spi_read_data_02(record_sig_gen_timecode_snapshot1, &timecode1); |
|||
create_and_send_sync_record_state_packet(1, timecode0, timecode1); |
|||
} |
|||
if (signal.value.signals & 0x04) { |
|||
// 结束录制 |
|||
uint32_t timecode0 = 0; |
|||
uint32_t timecode1 = 0; |
|||
fpga_if_spi_read_data_02(record_sig_gen_timecode_snapshot0, &timecode0); |
|||
fpga_if_spi_read_data_02(record_sig_gen_timecode_snapshot1, &timecode1); |
|||
create_and_send_sync_record_state_packet(0, timecode0, timecode1); |
|||
m_sync_count = 0; |
|||
} |
|||
} |
|||
} |
|||
static void xync_signal_report_thread(void const *argument) { |
|||
while (true) { |
|||
osEvent signal = osSignalWait(0x01, osWaitForever); |
|||
if (signal.value.signals == 0x01) { |
|||
if (m_sync_count == 0) { |
|||
m_xyns_camera_sync_packet_last_report_tp = HAL_GetTick(); |
|||
create_and_send_camera_sync_msg(m_sync_count); |
|||
m_sync_count++; |
|||
} else if (zaf_has_passedms(m_xyns_camera_sync_packet_last_report_tp) >= 998) { |
|||
// TODO:此处这么写，当拍摄频率大于500HZ的时候，就不能完全满足刚好卡在1s上报一次消息 |
|||
m_xyns_camera_sync_packet_last_report_tp = HAL_GetTick(); |
|||
create_and_send_camera_sync_msg(m_sync_count); |
|||
m_sync_count++; |
|||
} else { |
|||
m_sync_count++; |
|||
} |
|||
} |
|||
// osSignalClear(xync_signal_report_thread_id, 0x01); |
|||
} |
|||
} |
|||
|
|||
void ReportGeneratorService_irq_trigger(uint16_t gpiopin) { |
|||
if (gpiopin == m_timecode_trigger_input_off) { |
|||
// timecode trigger sig |
|||
osSignalSet(timecode_report_thread_id, 0x01); |
|||
} |
|||
if (m_xsync_workstate_start_sig_irq_pin_off == gpiopin) { |
|||
if (zaf_gpio_read(&fpga_if_get_instance()->xsync_workstate_start_sig_irq_io)) { |
|||
osSignalSet(timecode_report_thread_id, 0x02); // 开始工作信号 |
|||
} else { |
|||
osSignalSet(timecode_report_thread_id, 0x04); // 结束工作信号 |
|||
} |
|||
} |
|||
if (gpiopin == m_xync_trigger_input_off) { |
|||
// 相机同步信号 |
|||
osSignalSet(xync_signal_report_thread_id, 0x01); |
|||
} |
|||
} |
|||
|
|||
void ReportGeneratorService_init() { |
|||
ZASSERT(xs_udp_broadcast_init(&m_udp_camera_sync_sender, IFLYTOP_XSYNC_CAMERA_SYNC_PACKET_XSYNC_PORT)); |
|||
ZASSERT(xs_udp_broadcast_init(&m_udp_camera_timecode_sender, IFLYTOP_XSYNC_EVENT_REPORT_XSYNC_PORT)); |
|||
|
|||
// |
|||
osThreadDef(timecode_report_thread, timecode_report_thread, TIMECODE_REPORT_TASK_LEVEL, 0, 512); |
|||
timecode_report_thread_id = osThreadCreate(osThread(timecode_report_thread), NULL); |
|||
|
|||
osThreadDef(xync_signal_report_thread, xync_signal_report_thread, CAMERA_SYNC_SIG_REPORT_TASK_LEVEL, 0, 512); |
|||
xync_signal_report_thread_id = osThreadCreate(osThread(xync_signal_report_thread), NULL); |
|||
|
|||
ZASSERT(timecode_report_thread_id != NULL); |
|||
ZASSERT(xync_signal_report_thread_id != NULL); |
|||
|
|||
m_timecode_trigger_input_off = fpga_if_get_instance()->timecode_irq_io.pinoff; |
|||
m_xync_trigger_input_off = fpga_if_get_instance()->camera_sync_code_irq_io.pinoff; |
|||
m_xsync_workstate_start_sig_irq_pin_off = fpga_if_get_instance()->xsync_workstate_start_sig_irq_io.pinoff; |
|||
} |
|||
|
|||
void ReportGeneratorService_xsync_set_count(uint32_t count) { m_sync_count = count; } |
|||
uint32_t ReportGeneratorService_xsync_get_count(void) { return m_sync_count; } |
|||
@ -1,50 +0,0 @@ |
|||
#pragma once |
|||
#include <stdint.h> |
|||
|
|||
#include "project_dep.h" |
|||
|
|||
#ifdef __cplusplus |
|||
extern "C" { |
|||
#endif |
|||
|
|||
/** |
|||
* @brief 模块说明 |
|||
* 该模块监听FPGA秒时钟中断，和timecode中断 |
|||
* 当中断发生时，上报相应的数据。 |
|||
* |
|||
* 该模块依赖: |
|||
* fpag_if.c |
|||
* config_service.c |
|||
*/ |
|||
|
|||
/** |
|||
* @brief 初始化上报模块 |
|||
* |
|||
* @param timecode_trigger_pin |
|||
* @param xync_trigger_pin |
|||
*/ |
|||
void ReportGeneratorService_init(); |
|||
|
|||
/** |
|||
* @brief 中断触发函数，当IO中断触发时，调用此方法 |
|||
* |
|||
* @param gpiopin |
|||
*/ |
|||
void ReportGeneratorService_irq_trigger(uint16_t gpiopin); |
|||
/** |
|||
* @brief 清除xync计数 |
|||
*/ |
|||
void ReportGeneratorService_xsync_set_count(uint32_t count); |
|||
/** |
|||
* @brief 获取xync计数 |
|||
* |
|||
* @return uint32_t |
|||
*/ |
|||
uint32_t ReportGeneratorService_xsync_get_count(void); |
|||
|
|||
uint32_t ReportGeneratorService_set_camera_sync_code_report_period(uint32_t period); |
|||
uint32_t ReportGeneratorService_get_camera_sync_code_report_period(void); |
|||
|
|||
#ifdef __cplusplus |
|||
} |
|||
#endif |
|||
@ -0,0 +1,26 @@ |
|||
#include "zaf_ecode.h" |
|||
|
|||
const char* zaf_error_code_2_str(zaf_error_code_t ecode) { |
|||
switch (ecode) { |
|||
case kxs_ec_success: |
|||
return "success"; |
|||
case kxs_ec_overtime: |
|||
return "overtime"; |
|||
case kxs_ec_socket_fail: |
|||
return "socket fail"; |
|||
case kxs_ec_bind_fail: |
|||
return "bind fail"; |
|||
case kxs_ec_send_fail: |
|||
return "send fail"; |
|||
case kxs_ec_receive_fail: |
|||
return "receive fail"; |
|||
case kxs_ec_setsockopt_rx_timeout_fail: |
|||
return "setsockopt rx timeout fail"; |
|||
case kxs_ec_lose_connect: |
|||
return "lose connect"; |
|||
case kxs_ec_param_error: |
|||
return "param error"; |
|||
default: |
|||
return "unknown error"; |
|||
} |
|||
} |
|||
@ -0,0 +1,12 @@ |
|||
#pragma once |
|||
typedef enum { |
|||
kxs_ec_success = 0, |
|||
kxs_ec_overtime = 1, |
|||
kxs_ec_socket_fail = 2, |
|||
kxs_ec_bind_fail = 3, |
|||
kxs_ec_send_fail = 4, |
|||
kxs_ec_receive_fail = 5, |
|||
kxs_ec_setsockopt_rx_timeout_fail = 6, |
|||
kxs_ec_lose_connect = 7, |
|||
kxs_ec_param_error = 8, |
|||
} zaf_error_code_t; |
|||
@ -0,0 +1,5 @@ |
|||
#pragma once |
|||
#include <stdint.h> |
|||
|
|||
#define ZAF_SERVICE_DEVICE_PORT 20000 // 设备 端端口 |
|||
#define ZAF_SERVICE_PC_PORT 20001 // pc 端端口 |
|||
@ -0,0 +1,2 @@ |
|||
#include "zaf_protocol.h" |
|||
|
|||
@ -0,0 +1,37 @@ |
|||
#pragma once
|
|||
#define REGADD__STM32_COMMON (0x0010)
|
|||
#define REGADD__STM32_BUSINESS (0x0020)
|
|||
#define REGADD__FPGA_START (0x0100)
|
|||
|
|||
typedef enum { |
|||
/**
|
|||
* @brief |
|||
* REG 0(16) 设备信息基础寄存器 |
|||
*/ |
|||
kreg_software_version = 0, |
|||
kreg_manufacturer0 = 1, |
|||
kreg_manufacturer1 = 2, |
|||
kreg_product_type_id = 3, |
|||
kreg_sn_id0 = 4, |
|||
kreg_sn_id1 = 5, |
|||
kreg_sn_id2 = 6, |
|||
kreg_mac0 = 7, |
|||
kreg_mac1 = 8, |
|||
|
|||
/**
|
|||
* @brief |
|||
* REG 16(32) STM32配置寄存器0 |
|||
*/ |
|||
kreg_stm32_obtaining_ip_mode = REGADD__STM32_COMMON + 0, |
|||
kreg_stm32_ip = REGADD__STM32_COMMON + 1, |
|||
kreg_stm32_gw = REGADD__STM32_COMMON + 2, |
|||
kreg_stm32_netmask = REGADD__STM32_COMMON + 3, |
|||
kreg_stm32_config0 = REGADD__STM32_COMMON + 4, // bit0: timecode report enable, bit1: camera sync report enable
|
|||
|
|||
kreg_stm32_action0 = REGADD__STM32_COMMON + 14, // action reg
|
|||
kreg_stm32_action_val0 = REGADD__STM32_COMMON + 15, // action val reg
|
|||
|
|||
kreg_stm32_temperature = REGADD__STM32_BUSINESS + 0, |
|||
kreg_stm32_fan0_error_flag = REGADD__STM32_BUSINESS + 1, |
|||
|
|||
} RegAdd_t; |
|||
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