diff --git a/.mxproject b/.mxproject index 5757ef0..d73cb76 100644 --- a/.mxproject +++ b/.mxproject @@ -1,45 +1,47 @@ [PreviousLibFiles] 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[PreviousUsedCubeIDEFiles] -SourceFiles=Core\Src\main.c;Core\Src\gpio.c;Core\Src\freertos.c;Core\Src\adc.c;Core\Src\can.c;Core\Src\crc.c;Core\Src\dma.c;Core\Src\rng.c;Core\Src\spi.c;Core\Src\tim.c;Core\Src\usart.c;Core\Src\stm32f4xx_it.c;Core\Src\stm32f4xx_hal_msp.c;Core\Src\stm32f4xx_hal_timebase_tim.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_adc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_adc_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_adc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_can.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rng.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_spi.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c;Middlewares\Third_Party\FreeRTOS\Source\croutine.c;Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;Middlewares\Third_Party\FreeRTOS\Source\list.c;Middlewares\Third_Party\FreeRTOS\Source\queue.c;Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;Middlewares\Third_Party\FreeRTOS\Source\tasks.c;Middlewares\Third_Party\FreeRTOS\Source\timers.c;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.c;Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;Middlewares\Third_Party\FreeRTOS\Source\portable\GCC\ARM_CM4F\port.c;Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;Core\Src\system_stm32f4xx.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_adc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_adc_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_adc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_can.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rng.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_spi.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c;Middlewares\Third_Party\FreeRTOS\Source\croutine.c;Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;Middlewares\Third_Party\FreeRTOS\Source\list.c;Middlewares\Third_Party\FreeRTOS\Source\queue.c;Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;Middlewares\Third_Party\FreeRTOS\Source\tasks.c;Middlewares\Third_Party\FreeRTOS\Source\timers.c;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.c;Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;Middlewares\Third_Party\FreeRTOS\Source\portable\GCC\ARM_CM4F\port.c;Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;Core\Src\system_stm32f4xx.c;;;Middlewares\Third_Party\FreeRTOS\Source\croutine.c;Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;Middlewares\Third_Party\FreeRTOS\Source\list.c;Middlewares\Third_Party\FreeRTOS\Source\queue.c;Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;Middlewares\Third_Party\FreeRTOS\Source\tasks.c;Middlewares\Third_Party\FreeRTOS\Source\timers.c;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.c;Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;Middlewares\Third_Party\FreeRTOS\Source\portable\GCC\ARM_CM4F\port.c; +SourceFiles=Core\Src\main.c;Core\Src\gpio.c;Core\Src\freertos.c;Core\Src\adc.c;Core\Src\can.c;Core\Src\crc.c;Core\Src\dma.c;Core\Src\iwdg.c;Core\Src\rng.c;Core\Src\spi.c;Core\Src\tim.c;Core\Src\usart.c;Core\Src\stm32f4xx_it.c;Core\Src\stm32f4xx_hal_msp.c;Core\Src\stm32f4xx_hal_timebase_tim.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_adc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_adc_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_adc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_can.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_iwdg.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rng.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_spi.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c;Middlewares\Third_Party\FreeRTOS\Source\croutine.c;Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;Middlewares\Third_Party\FreeRTOS\Source\list.c;Middlewares\Third_Party\FreeRTOS\Source\queue.c;Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;Middlewares\Third_Party\FreeRTOS\Source\tasks.c;Middlewares\Third_Party\FreeRTOS\Source\timers.c;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.c;Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;Middlewares\Third_Party\FreeRTOS\Source\portable\GCC\ARM_CM4F\port.c;Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;Core\Src\system_stm32f4xx.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_adc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_adc_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_adc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_can.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_iwdg.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rng.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_spi.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c;Middlewares\Third_Party\FreeRTOS\Source\croutine.c;Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;Middlewares\Third_Party\FreeRTOS\Source\list.c;Middlewares\Third_Party\FreeRTOS\Source\queue.c;Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;Middlewares\Third_Party\FreeRTOS\Source\tasks.c;Middlewares\Third_Party\FreeRTOS\Source\timers.c;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.c;Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;Middlewares\Third_Party\FreeRTOS\Source\portable\GCC\ARM_CM4F\port.c;Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;Core\Src\system_stm32f4xx.c;;;Middlewares\Third_Party\FreeRTOS\Source\croutine.c;Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;Middlewares\Third_Party\FreeRTOS\Source\list.c;Middlewares\Third_Party\FreeRTOS\Source\queue.c;Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;Middlewares\Third_Party\FreeRTOS\Source\tasks.c;Middlewares\Third_Party\FreeRTOS\Source\timers.c;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.c;Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;Middlewares\Third_Party\FreeRTOS\Source\portable\GCC\ARM_CM4F\port.c; HeaderPath=Drivers\STM32F4xx_HAL_Driver\Inc;Drivers\STM32F4xx_HAL_Driver\Inc\Legacy;Middlewares\Third_Party\FreeRTOS\Source\include;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS;Middlewares\Third_Party\FreeRTOS\Source\portable\GCC\ARM_CM4F;Drivers\CMSIS\Device\ST\STM32F4xx\Include;Drivers\CMSIS\Include;Core\Inc; CDefines=USE_HAL_DRIVER;STM32F407xx;USE_HAL_DRIVER;USE_HAL_DRIVER; [PreviousGenFiles] AdvancedFolderStructure=true -HeaderFileListSize=13 +HeaderFileListSize=14 HeaderFiles#0=..\Core\Inc\gpio.h HeaderFiles#1=..\Core\Inc\FreeRTOSConfig.h HeaderFiles#2=..\Core\Inc\adc.h HeaderFiles#3=..\Core\Inc\can.h HeaderFiles#4=..\Core\Inc\crc.h HeaderFiles#5=..\Core\Inc\dma.h -HeaderFiles#6=..\Core\Inc\rng.h -HeaderFiles#7=..\Core\Inc\spi.h -HeaderFiles#8=..\Core\Inc\tim.h -HeaderFiles#9=..\Core\Inc\usart.h -HeaderFiles#10=..\Core\Inc\stm32f4xx_it.h -HeaderFiles#11=..\Core\Inc\stm32f4xx_hal_conf.h -HeaderFiles#12=..\Core\Inc\main.h +HeaderFiles#6=..\Core\Inc\iwdg.h +HeaderFiles#7=..\Core\Inc\rng.h +HeaderFiles#8=..\Core\Inc\spi.h +HeaderFiles#9=..\Core\Inc\tim.h +HeaderFiles#10=..\Core\Inc\usart.h +HeaderFiles#11=..\Core\Inc\stm32f4xx_it.h +HeaderFiles#12=..\Core\Inc\stm32f4xx_hal_conf.h +HeaderFiles#13=..\Core\Inc\main.h HeaderFolderListSize=1 HeaderPath#0=..\Core\Inc HeaderFiles=; -SourceFileListSize=14 +SourceFileListSize=15 SourceFiles#0=..\Core\Src\gpio.c SourceFiles#1=..\Core\Src\freertos.c SourceFiles#2=..\Core\Src\adc.c SourceFiles#3=..\Core\Src\can.c SourceFiles#4=..\Core\Src\crc.c SourceFiles#5=..\Core\Src\dma.c -SourceFiles#6=..\Core\Src\rng.c -SourceFiles#7=..\Core\Src\spi.c -SourceFiles#8=..\Core\Src\tim.c -SourceFiles#9=..\Core\Src\usart.c -SourceFiles#10=..\Core\Src\stm32f4xx_it.c -SourceFiles#11=..\Core\Src\stm32f4xx_hal_msp.c -SourceFiles#12=..\Core\Src\stm32f4xx_hal_timebase_tim.c -SourceFiles#13=..\Core\Src\main.c +SourceFiles#6=..\Core\Src\iwdg.c +SourceFiles#7=..\Core\Src\rng.c +SourceFiles#8=..\Core\Src\spi.c +SourceFiles#9=..\Core\Src\tim.c +SourceFiles#10=..\Core\Src\usart.c +SourceFiles#11=..\Core\Src\stm32f4xx_it.c +SourceFiles#12=..\Core\Src\stm32f4xx_hal_msp.c +SourceFiles#13=..\Core\Src\stm32f4xx_hal_timebase_tim.c +SourceFiles#14=..\Core\Src\main.c SourceFolderListSize=1 SourcePath#0=..\Core\Src SourceFiles=; diff --git a/Core/Inc/iwdg.h b/Core/Inc/iwdg.h new file mode 100644 index 0000000..ad5fa0a --- /dev/null +++ b/Core/Inc/iwdg.h @@ -0,0 +1,52 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file iwdg.h + * @brief This file contains all the function prototypes for + * the iwdg.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __IWDG_H__ +#define __IWDG_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +extern IWDG_HandleTypeDef hiwdg; + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_IWDG_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif + +#endif /* __IWDG_H__ */ + diff --git a/Core/Inc/stm32f4xx_hal_conf.h b/Core/Inc/stm32f4xx_hal_conf.h index 774f8eb..6d7ff36 100644 --- a/Core/Inc/stm32f4xx_hal_conf.h +++ b/Core/Inc/stm32f4xx_hal_conf.h @@ -55,7 +55,7 @@ /* #define HAL_HASH_MODULE_ENABLED */ /* #define HAL_I2C_MODULE_ENABLED */ /* #define HAL_I2S_MODULE_ENABLED */ -/* #define HAL_IWDG_MODULE_ENABLED */ +#define HAL_IWDG_MODULE_ENABLED /* #define HAL_LTDC_MODULE_ENABLED */ #define HAL_RNG_MODULE_ENABLED /* #define HAL_RTC_MODULE_ENABLED */ diff --git a/Core/Inc/stm32f4xx_it.h b/Core/Inc/stm32f4xx_it.h index d362002..0c068a6 100644 --- a/Core/Inc/stm32f4xx_it.h +++ b/Core/Inc/stm32f4xx_it.h @@ -54,11 +54,14 @@ void UsageFault_Handler(void); void DebugMon_Handler(void); void DMA1_Stream1_IRQHandler(void); void DMA1_Stream3_IRQHandler(void); +void DMA1_Stream5_IRQHandler(void); +void DMA1_Stream6_IRQHandler(void); void CAN1_TX_IRQHandler(void); void CAN1_RX0_IRQHandler(void); void CAN1_RX1_IRQHandler(void); void CAN1_SCE_IRQHandler(void); void TIM1_TRG_COM_TIM11_IRQHandler(void); +void USART2_IRQHandler(void); void USART3_IRQHandler(void); void TIM6_DAC_IRQHandler(void); void TIM7_IRQHandler(void); diff --git a/Core/Inc/usart.h b/Core/Inc/usart.h index 7b84d11..600bc69 100644 --- a/Core/Inc/usart.h +++ b/Core/Inc/usart.h @@ -34,6 +34,8 @@ extern "C" { extern UART_HandleTypeDef huart1; +extern UART_HandleTypeDef huart2; + extern UART_HandleTypeDef huart3; /* USER CODE BEGIN Private defines */ @@ -41,6 +43,7 @@ extern UART_HandleTypeDef huart3; /* USER CODE END Private defines */ void MX_USART1_UART_Init(void); +void MX_USART2_UART_Init(void); void MX_USART3_UART_Init(void); /* USER CODE BEGIN Prototypes */ diff --git a/Core/Src/dma.c b/Core/Src/dma.c index 3d42cc3..ee8905e 100644 --- a/Core/Src/dma.c +++ b/Core/Src/dma.c @@ -49,6 +49,12 @@ void MX_DMA_Init(void) /* DMA1_Stream3_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 5, 0); HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn); + /* DMA1_Stream5_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 5, 0); + HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn); + /* DMA1_Stream6_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DMA1_Stream6_IRQn, 5, 0); + HAL_NVIC_EnableIRQ(DMA1_Stream6_IRQn); } diff --git a/Core/Src/gpio.c b/Core/Src/gpio.c index 675913a..af8a563 100644 --- a/Core/Src/gpio.c +++ b/Core/Src/gpio.c @@ -102,11 +102,11 @@ void MX_GPIO_Init(void) /*Configure GPIO pins : PD8 PD9 PD10 PD11 PD12 PD13 PD14 PD15 PD0 PD1 PD2 PD3 - PD4 PD5 PD6 PD7 */ + PD4 PD7 */ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11 |GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15 |GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3 - |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; + |GPIO_PIN_4|GPIO_PIN_7; GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; GPIO_InitStruct.Pull = GPIO_NOPULL; HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); diff --git a/Core/Src/iwdg.c b/Core/Src/iwdg.c new file mode 100644 index 0000000..9e087f9 --- /dev/null +++ b/Core/Src/iwdg.c @@ -0,0 +1,55 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file iwdg.c + * @brief This file provides code for the configuration + * of the IWDG instances. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "iwdg.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +IWDG_HandleTypeDef hiwdg; + +/* IWDG init function */ +void MX_IWDG_Init(void) +{ + + /* USER CODE BEGIN IWDG_Init 0 */ + + /* USER CODE END IWDG_Init 0 */ + + /* USER CODE BEGIN IWDG_Init 1 */ + + /* USER CODE END IWDG_Init 1 */ + hiwdg.Instance = IWDG; + hiwdg.Init.Prescaler = IWDG_PRESCALER_256; + hiwdg.Init.Reload = 500; + if (HAL_IWDG_Init(&hiwdg) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN IWDG_Init 2 */ + + /* USER CODE END IWDG_Init 2 */ + +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/Core/Src/main.c b/Core/Src/main.c index 28a8da8..50c0a6a 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -23,6 +23,7 @@ #include "can.h" #include "crc.h" #include "dma.h" +#include "iwdg.h" #include "rng.h" #include "spi.h" #include "tim.h" @@ -111,6 +112,8 @@ int main(void) MX_CAN1_Init(); MX_SPI1_Init(); MX_ADC1_Init(); + MX_USART2_UART_Init(); + MX_IWDG_Init(); /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ @@ -151,8 +154,9 @@ void SystemClock_Config(void) /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.LSIState = RCC_LSI_ON; RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL.PLLM = 4; diff --git a/Core/Src/stm32f4xx_it.c b/Core/Src/stm32f4xx_it.c index 1d0a3db..8b7082f 100644 --- a/Core/Src/stm32f4xx_it.c +++ b/Core/Src/stm32f4xx_it.c @@ -59,8 +59,11 @@ extern CAN_HandleTypeDef hcan1; extern TIM_HandleTypeDef htim1; extern TIM_HandleTypeDef htim6; extern TIM_HandleTypeDef htim7; +extern DMA_HandleTypeDef hdma_usart2_rx; +extern DMA_HandleTypeDef hdma_usart2_tx; extern DMA_HandleTypeDef hdma_usart3_rx; extern DMA_HandleTypeDef hdma_usart3_tx; +extern UART_HandleTypeDef huart2; extern UART_HandleTypeDef huart3; extern TIM_HandleTypeDef htim11; @@ -199,6 +202,34 @@ void DMA1_Stream3_IRQHandler(void) } /** + * @brief This function handles DMA1 stream5 global interrupt. + */ +void DMA1_Stream5_IRQHandler(void) +{ + /* USER CODE BEGIN DMA1_Stream5_IRQn 0 */ + + /* USER CODE END DMA1_Stream5_IRQn 0 */ + HAL_DMA_IRQHandler(&hdma_usart2_rx); + /* USER CODE BEGIN DMA1_Stream5_IRQn 1 */ + + /* USER CODE END DMA1_Stream5_IRQn 1 */ +} + +/** + * @brief This function handles DMA1 stream6 global interrupt. + */ +void DMA1_Stream6_IRQHandler(void) +{ + /* USER CODE BEGIN DMA1_Stream6_IRQn 0 */ + + /* USER CODE END DMA1_Stream6_IRQn 0 */ + HAL_DMA_IRQHandler(&hdma_usart2_tx); + /* USER CODE BEGIN DMA1_Stream6_IRQn 1 */ + + /* USER CODE END DMA1_Stream6_IRQn 1 */ +} + +/** * @brief This function handles CAN1 TX interrupts. */ void CAN1_TX_IRQHandler(void) @@ -270,6 +301,20 @@ void TIM1_TRG_COM_TIM11_IRQHandler(void) } /** + * @brief This function handles USART2 global interrupt. + */ +void USART2_IRQHandler(void) +{ + /* USER CODE BEGIN USART2_IRQn 0 */ + + /* USER CODE END USART2_IRQn 0 */ + HAL_UART_IRQHandler(&huart2); + /* USER CODE BEGIN USART2_IRQn 1 */ + + /* USER CODE END USART2_IRQn 1 */ +} + +/** * @brief This function handles USART3 global interrupt. */ void USART3_IRQHandler(void) diff --git a/Core/Src/usart.c b/Core/Src/usart.c index 2861a80..6a8cdfd 100644 --- a/Core/Src/usart.c +++ b/Core/Src/usart.c @@ -25,7 +25,10 @@ /* USER CODE END 0 */ UART_HandleTypeDef huart1; +UART_HandleTypeDef huart2; UART_HandleTypeDef huart3; +DMA_HandleTypeDef hdma_usart2_rx; +DMA_HandleTypeDef hdma_usart2_tx; DMA_HandleTypeDef hdma_usart3_rx; DMA_HandleTypeDef hdma_usart3_tx; @@ -42,7 +45,7 @@ void MX_USART1_UART_Init(void) /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; - huart1.Init.BaudRate = 961200; + huart1.Init.BaudRate = 460800; huart1.Init.WordLength = UART_WORDLENGTH_8B; huart1.Init.StopBits = UART_STOPBITS_1; huart1.Init.Parity = UART_PARITY_NONE; @@ -58,6 +61,35 @@ void MX_USART1_UART_Init(void) /* USER CODE END USART1_Init 2 */ } +/* USART2 init function */ + +void MX_USART2_UART_Init(void) +{ + + /* USER CODE BEGIN USART2_Init 0 */ + + /* USER CODE END USART2_Init 0 */ + + /* USER CODE BEGIN USART2_Init 1 */ + + /* USER CODE END USART2_Init 1 */ + huart2.Instance = USART2; + huart2.Init.BaudRate = 115200; + huart2.Init.WordLength = UART_WORDLENGTH_8B; + huart2.Init.StopBits = UART_STOPBITS_1; + huart2.Init.Parity = UART_PARITY_NONE; + huart2.Init.Mode = UART_MODE_TX_RX; + huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart2.Init.OverSampling = UART_OVERSAMPLING_16; + if (HAL_UART_Init(&huart2) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART2_Init 2 */ + + /* USER CODE END USART2_Init 2 */ + +} /* USART3 init function */ void MX_USART3_UART_Init(void) @@ -116,6 +148,70 @@ void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) /* USER CODE END USART1_MspInit 1 */ } + else if(uartHandle->Instance==USART2) + { + /* USER CODE BEGIN USART2_MspInit 0 */ + + /* USER CODE END USART2_MspInit 0 */ + /* USART2 clock enable */ + __HAL_RCC_USART2_CLK_ENABLE(); + + __HAL_RCC_GPIOD_CLK_ENABLE(); + /**USART2 GPIO Configuration + PD5 ------> USART2_TX + PD6 ------> USART2_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF7_USART2; + HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); + + /* USART2 DMA Init */ + /* USART2_RX Init */ + hdma_usart2_rx.Instance = DMA1_Stream5; + hdma_usart2_rx.Init.Channel = DMA_CHANNEL_4; + hdma_usart2_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; + hdma_usart2_rx.Init.PeriphInc = DMA_PINC_DISABLE; + hdma_usart2_rx.Init.MemInc = DMA_MINC_ENABLE; + hdma_usart2_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma_usart2_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma_usart2_rx.Init.Mode = DMA_NORMAL; + hdma_usart2_rx.Init.Priority = DMA_PRIORITY_LOW; + hdma_usart2_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + if (HAL_DMA_Init(&hdma_usart2_rx) != HAL_OK) + { + Error_Handler(); + } + + __HAL_LINKDMA(uartHandle,hdmarx,hdma_usart2_rx); + + /* USART2_TX Init */ + hdma_usart2_tx.Instance = DMA1_Stream6; + hdma_usart2_tx.Init.Channel = DMA_CHANNEL_4; + hdma_usart2_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; + hdma_usart2_tx.Init.PeriphInc = DMA_PINC_DISABLE; + hdma_usart2_tx.Init.MemInc = DMA_MINC_ENABLE; + hdma_usart2_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma_usart2_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma_usart2_tx.Init.Mode = DMA_NORMAL; + hdma_usart2_tx.Init.Priority = DMA_PRIORITY_LOW; + hdma_usart2_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + if (HAL_DMA_Init(&hdma_usart2_tx) != HAL_OK) + { + Error_Handler(); + } + + __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart2_tx); + + /* USART2 interrupt Init */ + HAL_NVIC_SetPriority(USART2_IRQn, 5, 0); + HAL_NVIC_EnableIRQ(USART2_IRQn); + /* USER CODE BEGIN USART2_MspInit 1 */ + + /* USER CODE END USART2_MspInit 1 */ + } else if(uartHandle->Instance==USART3) { /* USER CODE BEGIN USART3_MspInit 0 */ @@ -203,6 +299,30 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle) /* USER CODE END USART1_MspDeInit 1 */ } + else if(uartHandle->Instance==USART2) + { + /* USER CODE BEGIN USART2_MspDeInit 0 */ + + /* USER CODE END USART2_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART2_CLK_DISABLE(); + + /**USART2 GPIO Configuration + PD5 ------> USART2_TX + PD6 ------> USART2_RX + */ + HAL_GPIO_DeInit(GPIOD, GPIO_PIN_5|GPIO_PIN_6); + + /* USART2 DMA DeInit */ + HAL_DMA_DeInit(uartHandle->hdmarx); + HAL_DMA_DeInit(uartHandle->hdmatx); + + /* USART2 interrupt Deinit */ + HAL_NVIC_DisableIRQ(USART2_IRQn); + /* USER CODE BEGIN USART2_MspDeInit 1 */ + + /* USER CODE END USART2_MspDeInit 1 */ + } else if(uartHandle->Instance==USART3) { /* USER CODE BEGIN USART3_MspDeInit 0 */ diff --git a/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_iwdg.h b/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_iwdg.h new file mode 100644 index 0000000..5273730 --- /dev/null +++ b/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_iwdg.h @@ -0,0 +1,220 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_iwdg.h + * @author MCD Application Team + * @brief Header file of IWDG HAL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32F4xx_HAL_IWDG_H +#define STM32F4xx_HAL_IWDG_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f4xx_hal_def.h" + +/** @addtogroup STM32F4xx_HAL_Driver + * @{ + */ + +/** @defgroup IWDG IWDG + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ +/** @defgroup IWDG_Exported_Types IWDG Exported Types + * @{ + */ + +/** + * @brief IWDG Init structure definition + */ +typedef struct +{ + uint32_t Prescaler; /*!< Select the prescaler of the IWDG. + This parameter can be a value of @ref IWDG_Prescaler */ + + uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. + This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ + +} IWDG_InitTypeDef; + +/** + * @brief IWDG Handle Structure definition + */ +typedef struct +{ + IWDG_TypeDef *Instance; /*!< Register base address */ + + IWDG_InitTypeDef Init; /*!< IWDG required parameters */ +} IWDG_HandleTypeDef; + + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ +/** @defgroup IWDG_Exported_Constants IWDG Exported Constants + * @{ + */ + +/** @defgroup IWDG_Prescaler IWDG Prescaler + * @{ + */ +#define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */ +#define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */ +#define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */ +#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */ +#define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */ +#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */ +#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */ +/** + * @} + */ + +/** + * @} + */ + +/* Exported macros -----------------------------------------------------------*/ +/** @defgroup IWDG_Exported_Macros IWDG Exported Macros + * @{ + */ + +/** + * @brief Enable the IWDG peripheral. + * @param __HANDLE__ IWDG handle + * @retval None + */ +#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) + +/** + * @brief Reload IWDG counter with value defined in the reload register + * (write access to IWDG_PR and IWDG_RLR registers disabled). + * @param __HANDLE__ IWDG handle + * @retval None + */ +#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) + +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ +/** @defgroup IWDG_Exported_Functions IWDG Exported Functions + * @{ + */ + +/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions + * @{ + */ +/* Initialization/Start functions ********************************************/ +HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); +/** + * @} + */ + +/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions + * @{ + */ +/* I/O operation functions ****************************************************/ +HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); +/** + * @} + */ + +/** + * @} + */ + +/* Private constants ---------------------------------------------------------*/ +/** @defgroup IWDG_Private_Constants IWDG Private Constants + * @{ + */ + +/** + * @brief IWDG Key Register BitMask + */ +#define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */ +#define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */ +#define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */ +#define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */ + +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ +/** @defgroup IWDG_Private_Macros IWDG Private Macros + * @{ + */ + +/** + * @brief Enable write access to IWDG_PR and IWDG_RLR registers. + * @param __HANDLE__ IWDG handle + * @retval None + */ +#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) + +/** + * @brief Disable write access to IWDG_PR and IWDG_RLR registers. + * @param __HANDLE__ IWDG handle + * @retval None + */ +#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) + +/** + * @brief Check IWDG prescaler value. + * @param __PRESCALER__ IWDG prescaler value + * @retval None + */ +#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ + ((__PRESCALER__) == IWDG_PRESCALER_8) || \ + ((__PRESCALER__) == IWDG_PRESCALER_16) || \ + ((__PRESCALER__) == IWDG_PRESCALER_32) || \ + ((__PRESCALER__) == IWDG_PRESCALER_64) || \ + ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ + ((__PRESCALER__) == IWDG_PRESCALER_256)) + +/** + * @brief Check IWDG reload value. + * @param __RELOAD__ IWDG reload value + * @retval None + */ +#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) + + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + + +#ifdef __cplusplus +} +#endif + +#endif /* STM32F4xx_HAL_IWDG_H */ diff --git a/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_iwdg.h b/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_iwdg.h new file mode 100644 index 0000000..4158363 --- /dev/null +++ b/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_iwdg.h @@ -0,0 +1,302 @@ +/** + ****************************************************************************** + * @file stm32f4xx_ll_iwdg.h + * @author MCD Application Team + * @brief Header file of IWDG LL module. + ****************************************************************************** + * @attention + * + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32F4xx_LL_IWDG_H +#define STM32F4xx_LL_IWDG_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f4xx.h" + +/** @addtogroup STM32F4xx_LL_Driver + * @{ + */ + +#if defined(IWDG) + +/** @defgroup IWDG_LL IWDG + * @{ + */ + +/* Private types -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ + +/* Private constants ---------------------------------------------------------*/ +/** @defgroup IWDG_LL_Private_Constants IWDG Private Constants + * @{ + */ +#define LL_IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */ +#define LL_IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */ +#define LL_IWDG_KEY_WR_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */ +#define LL_IWDG_KEY_WR_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */ +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants + * @{ + */ + +/** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines + * @brief Flags defines which can be used with LL_IWDG_ReadReg function + * @{ + */ +#define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */ +#define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */ +/** + * @} + */ + +/** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider + * @{ + */ +#define LL_IWDG_PRESCALER_4 0x00000000U /*!< Divider by 4 */ +#define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */ +#define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */ +#define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */ +#define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */ +#define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */ +#define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */ +/** + * @} + */ + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ +/** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros + * @{ + */ + +/** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros + * @{ + */ + +/** + * @brief Write a value in IWDG register + * @param __INSTANCE__ IWDG Instance + * @param __REG__ Register to be written + * @param __VALUE__ Value to be written in the register + * @retval None + */ +#define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) + +/** + * @brief Read a value in IWDG register + * @param __INSTANCE__ IWDG Instance + * @param __REG__ Register to be read + * @retval Register value + */ +#define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) +/** + * @} + */ + +/** + * @} + */ + + +/* Exported functions --------------------------------------------------------*/ +/** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions + * @{ + */ +/** @defgroup IWDG_LL_EF_Configuration Configuration + * @{ + */ + +/** + * @brief Start the Independent Watchdog + * @note Except if the hardware watchdog option is selected + * @rmtoll KR KEY LL_IWDG_Enable + * @param IWDGx IWDG Instance + * @retval None + */ +__STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx) +{ + WRITE_REG(IWDGx->KR, LL_IWDG_KEY_ENABLE); +} + +/** + * @brief Reloads IWDG counter with value defined in the reload register + * @rmtoll KR KEY LL_IWDG_ReloadCounter + * @param IWDGx IWDG Instance + * @retval None + */ +__STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx) +{ + WRITE_REG(IWDGx->KR, LL_IWDG_KEY_RELOAD); +} + +/** + * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers + * @rmtoll KR KEY LL_IWDG_EnableWriteAccess + * @param IWDGx IWDG Instance + * @retval None + */ +__STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx) +{ + WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE); +} + +/** + * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers + * @rmtoll KR KEY LL_IWDG_DisableWriteAccess + * @param IWDGx IWDG Instance + * @retval None + */ +__STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx) +{ + WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE); +} + +/** + * @brief Select the prescaler of the IWDG + * @rmtoll PR PR LL_IWDG_SetPrescaler + * @param IWDGx IWDG Instance + * @param Prescaler This parameter can be one of the following values: + * @arg @ref LL_IWDG_PRESCALER_4 + * @arg @ref LL_IWDG_PRESCALER_8 + * @arg @ref LL_IWDG_PRESCALER_16 + * @arg @ref LL_IWDG_PRESCALER_32 + * @arg @ref LL_IWDG_PRESCALER_64 + * @arg @ref LL_IWDG_PRESCALER_128 + * @arg @ref LL_IWDG_PRESCALER_256 + * @retval None + */ +__STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler) +{ + WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler); +} + +/** + * @brief Get the selected prescaler of the IWDG + * @rmtoll PR PR LL_IWDG_GetPrescaler + * @param IWDGx IWDG Instance + * @retval Returned value can be one of the following values: + * @arg @ref LL_IWDG_PRESCALER_4 + * @arg @ref LL_IWDG_PRESCALER_8 + * @arg @ref LL_IWDG_PRESCALER_16 + * @arg @ref LL_IWDG_PRESCALER_32 + * @arg @ref LL_IWDG_PRESCALER_64 + * @arg @ref LL_IWDG_PRESCALER_128 + * @arg @ref LL_IWDG_PRESCALER_256 + */ +__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx) +{ + return (READ_REG(IWDGx->PR)); +} + +/** + * @brief Specify the IWDG down-counter reload value + * @rmtoll RLR RL LL_IWDG_SetReloadCounter + * @param IWDGx IWDG Instance + * @param Counter Value between Min_Data=0 and Max_Data=0x0FFF + * @retval None + */ +__STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter) +{ + WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter); +} + +/** + * @brief Get the specified IWDG down-counter reload value + * @rmtoll RLR RL LL_IWDG_GetReloadCounter + * @param IWDGx IWDG Instance + * @retval Value between Min_Data=0 and Max_Data=0x0FFF + */ +__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx) +{ + return (READ_REG(IWDGx->RLR)); +} + +/** + * @} + */ + +/** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management + * @{ + */ + +/** + * @brief Check if flag Prescaler Value Update is set or not + * @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU + * @param IWDGx IWDG Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx) +{ + return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL); +} + +/** + * @brief Check if flag Reload Value Update is set or not + * @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU + * @param IWDGx IWDG Instance + * @retval State of bit (1 or 0). + */ +__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx) +{ + return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL); +} + +/** + * @brief Check if flags Prescaler & Reload Value Update are reset or not + * @rmtoll SR PVU LL_IWDG_IsReady\n + * SR RVU LL_IWDG_IsReady + * @param IWDGx IWDG Instance + * @retval State of bits (1 or 0). + */ +__STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx) +{ + return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU) == 0U) ? 1UL : 0UL); +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +#endif /* IWDG */ + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32F4xx_LL_IWDG_H */ diff --git a/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c b/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c new file mode 100644 index 0000000..c01eb29 --- /dev/null +++ b/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c @@ -0,0 +1,262 @@ +/** + ****************************************************************************** + * @file stm32f4xx_hal_iwdg.c + * @author MCD Application Team + * @brief IWDG HAL module driver. + * This file provides firmware functions to manage the following + * functionalities of the Independent Watchdog (IWDG) peripheral: + * + Initialization and Start functions + * + IO operation functions + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + @verbatim + ============================================================================== + ##### IWDG Generic features ##### + ============================================================================== + [..] + (+) The IWDG can be started by either software or hardware (configurable + through option byte). + + (+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays + active even if the main clock fails. + + (+) Once the IWDG is started, the LSI is forced ON and both cannot be + disabled. The counter starts counting down from the reset value (0xFFF). + When it reaches the end of count value (0x000) a reset signal is + generated (IWDG reset). + + (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register, + the IWDG_RLR value is reloaded into the counter and the watchdog reset + is prevented. + + (+) The IWDG is implemented in the VDD voltage domain that is still functional + in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY). + IWDGRST flag in RCC_CSR register can be used to inform when an IWDG + reset occurs. + + (+) Debug mode: When the microcontroller enters debug mode (core halted), + the IWDG counter either continues to work normally or stops, depending + on DBG_IWDG_STOP configuration bit in DBG module, accessible through + __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros. + + [..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s + The IWDG timeout may vary due to LSI clock frequency dispersion. + STM32F4xx devices provide the capability to measure the LSI clock + frequency (LSI clock is internally connected to TIM5 CH4 input capture). + The measured value can be used to have an IWDG timeout with an + acceptable accuracy. + + [..] Default timeout value (necessary for IWDG_SR status register update): + Constant LSI_VALUE is defined based on the nominal LSI clock frequency. + This frequency being subject to variations as mentioned above, the + default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT + below) may become too short or too long. + In such cases, this default timeout value can be tuned by redefining + the constant LSI_VALUE at user-application level (based, for instance, + on the measured LSI clock frequency as explained above). + + ##### How to use this driver ##### + ============================================================================== + [..] + (#) Use IWDG using HAL_IWDG_Init() function to : + (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI + clock is forced ON and IWDG counter starts counting down. + (++) Enable write access to configuration registers: + IWDG_PR and IWDG_RLR. + (++) Configure the IWDG prescaler and counter reload value. This reload + value will be loaded in the IWDG counter each time the watchdog is + reloaded, then the IWDG will start counting down from this value. + (++) Wait for status flags to be reset. + + (#) Then the application program must refresh the IWDG counter at regular + intervals during normal operation to prevent an MCU reset, using + HAL_IWDG_Refresh() function. + + *** IWDG HAL driver macros list *** + ==================================== + [..] + Below the list of most used macros in IWDG HAL driver: + (+) __HAL_IWDG_START: Enable the IWDG peripheral + (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in + the reload register + + @endverbatim + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f4xx_hal.h" + +/** @addtogroup STM32F4xx_HAL_Driver + * @{ + */ + +#ifdef HAL_IWDG_MODULE_ENABLED +/** @addtogroup IWDG + * @brief IWDG HAL module driver. + * @{ + */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/** @defgroup IWDG_Private_Defines IWDG Private Defines + * @{ + */ +/* Status register needs up to 5 LSI clock periods divided by the clock + prescaler to be updated. The number of LSI clock periods is upper-rounded to + 6 for the timeout value calculation. + The timeout value is calculated using the highest prescaler (256) and + the LSI_VALUE constant. The value of this constant can be changed by the user + to take into account possible LSI clock period variations. + The timeout value is multiplied by 1000 to be converted in milliseconds. + LSI startup time is also considered here by adding LSI_STARTUP_TIME + converted in milliseconds. */ +#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL)) +#define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_RVU | IWDG_SR_PVU) +/** + * @} + */ + +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Exported functions --------------------------------------------------------*/ + +/** @addtogroup IWDG_Exported_Functions + * @{ + */ + +/** @addtogroup IWDG_Exported_Functions_Group1 + * @brief Initialization and Start functions. + * +@verbatim + =============================================================================== + ##### Initialization and Start functions ##### + =============================================================================== + [..] This section provides functions allowing to: + (+) Initialize the IWDG according to the specified parameters in the + IWDG_InitTypeDef of associated handle. + (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog + is reloaded in order to exit function with correct time base. + +@endverbatim + * @{ + */ + +/** + * @brief Initialize the IWDG according to the specified parameters in the + * IWDG_InitTypeDef and start watchdog. Before exiting function, + * watchdog is refreshed in order to have correct time base. + * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains + * the configuration information for the specified IWDG module. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg) +{ + uint32_t tickstart; + + /* Check the IWDG handle allocation */ + if (hiwdg == NULL) + { + return HAL_ERROR; + } + + /* Check the parameters */ + assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance)); + assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler)); + assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload)); + + /* Enable IWDG. LSI is turned on automatically */ + __HAL_IWDG_START(hiwdg); + + /* Enable write access to IWDG_PR and IWDG_RLR registers by writing + 0x5555 in KR */ + IWDG_ENABLE_WRITE_ACCESS(hiwdg); + + /* Write to IWDG registers the Prescaler & Reload values to work with */ + hiwdg->Instance->PR = hiwdg->Init.Prescaler; + hiwdg->Instance->RLR = hiwdg->Init.Reload; + + /* Check pending flag, if previous update not done, return timeout */ + tickstart = HAL_GetTick(); + + /* Wait for register to be updated */ + while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u) + { + if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT) + { + if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u) + { + return HAL_TIMEOUT; + } + } + } + + /* Reload IWDG counter with value defined in the reload register */ + __HAL_IWDG_RELOAD_COUNTER(hiwdg); + + /* Return function status */ + return HAL_OK; +} + + +/** + * @} + */ + + +/** @addtogroup IWDG_Exported_Functions_Group2 + * @brief IO operation functions + * +@verbatim + =============================================================================== + ##### IO operation functions ##### + =============================================================================== + [..] This section provides functions allowing to: + (+) Refresh the IWDG. + +@endverbatim + * @{ + */ + +/** + * @brief Refresh the IWDG. + * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains + * the configuration information for the specified IWDG module. + * @retval HAL status + */ +HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg) +{ + /* Reload IWDG counter with value defined in the reload register */ + __HAL_IWDG_RELOAD_COUNTER(hiwdg); + + /* Return function status */ + return HAL_OK; +} + + +/** + * @} + */ + +/** + * @} + */ + +#endif /* HAL_IWDG_MODULE_ENABLED */ +/** + * @} + */ + +/** + * @} + */ diff --git a/dbdb_power_control_mini_board.ioc b/dbdb_power_control_mini_board.ioc index f47718d..c996f69 100644 --- a/dbdb_power_control_mini_board.ioc +++ b/dbdb_power_control_mini_board.ioc @@ -22,7 +22,29 @@ CAN1.SJW=CAN_SJW_3TQ CAN1.TTCM=ENABLE Dma.Request0=USART3_RX Dma.Request1=USART3_TX -Dma.RequestsNb=2 +Dma.Request2=USART2_RX +Dma.Request3=USART2_TX +Dma.RequestsNb=4 +Dma.USART2_RX.2.Direction=DMA_PERIPH_TO_MEMORY +Dma.USART2_RX.2.FIFOMode=DMA_FIFOMODE_DISABLE +Dma.USART2_RX.2.Instance=DMA1_Stream5 +Dma.USART2_RX.2.MemDataAlignment=DMA_MDATAALIGN_BYTE +Dma.USART2_RX.2.MemInc=DMA_MINC_ENABLE +Dma.USART2_RX.2.Mode=DMA_NORMAL +Dma.USART2_RX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE +Dma.USART2_RX.2.PeriphInc=DMA_PINC_DISABLE +Dma.USART2_RX.2.Priority=DMA_PRIORITY_LOW +Dma.USART2_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode +Dma.USART2_TX.3.Direction=DMA_MEMORY_TO_PERIPH +Dma.USART2_TX.3.FIFOMode=DMA_FIFOMODE_DISABLE +Dma.USART2_TX.3.Instance=DMA1_Stream6 +Dma.USART2_TX.3.MemDataAlignment=DMA_MDATAALIGN_BYTE +Dma.USART2_TX.3.MemInc=DMA_MINC_ENABLE +Dma.USART2_TX.3.Mode=DMA_NORMAL +Dma.USART2_TX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE +Dma.USART2_TX.3.PeriphInc=DMA_PINC_DISABLE +Dma.USART2_TX.3.Priority=DMA_PRIORITY_LOW +Dma.USART2_TX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode Dma.USART3_RX.0.Direction=DMA_PERIPH_TO_MEMORY Dma.USART3_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE Dma.USART3_RX.0.Instance=DMA1_Stream1 @@ -65,26 +87,31 @@ FREERTOS.configUSE_TIMERS=1 FREERTOS.configUSE_TRACE_FACILITY=1 File.Version=6 GPIO.groupedBy=Group By Peripherals +IWDG.IPParameters=Prescaler,Reload +IWDG.Prescaler=IWDG_PRESCALER_256 +IWDG.Reload=500 KeepUserPlacement=false Mcu.CPN=STM32F407VET6 Mcu.Family=STM32F4 Mcu.IP0=ADC1 Mcu.IP1=CAN1 -Mcu.IP10=TIM1 -Mcu.IP11=TIM3 -Mcu.IP12=TIM6 -Mcu.IP13=TIM7 -Mcu.IP14=USART1 -Mcu.IP15=USART3 +Mcu.IP10=SYS +Mcu.IP11=TIM1 +Mcu.IP12=TIM3 +Mcu.IP13=TIM6 +Mcu.IP14=TIM7 +Mcu.IP15=USART1 +Mcu.IP16=USART2 +Mcu.IP17=USART3 Mcu.IP2=CRC Mcu.IP3=DMA Mcu.IP4=FREERTOS -Mcu.IP5=NVIC -Mcu.IP6=RCC -Mcu.IP7=RNG -Mcu.IP8=SPI1 -Mcu.IP9=SYS -Mcu.IPNb=16 +Mcu.IP5=IWDG +Mcu.IP6=NVIC +Mcu.IP7=RCC +Mcu.IP8=RNG +Mcu.IP9=SPI1 +Mcu.IPNb=18 Mcu.Name=STM32F407V(E-G)Tx Mcu.Package=LQFP100 Mcu.Pin0=PH0-OSC_IN @@ -103,22 +130,25 @@ Mcu.Pin2=PC0 Mcu.Pin20=PA12 Mcu.Pin21=PA13 Mcu.Pin22=PA14 -Mcu.Pin23=VP_CRC_VS_CRC -Mcu.Pin24=VP_FREERTOS_VS_CMSIS_V1 -Mcu.Pin25=VP_RNG_VS_RNG -Mcu.Pin26=VP_SYS_VS_tim11 -Mcu.Pin27=VP_TIM1_VS_ClockSourceINT -Mcu.Pin28=VP_TIM3_VS_ClockSourceINT -Mcu.Pin29=VP_TIM6_VS_ClockSourceINT +Mcu.Pin23=PD5 +Mcu.Pin24=PD6 +Mcu.Pin25=VP_CRC_VS_CRC +Mcu.Pin26=VP_FREERTOS_VS_CMSIS_V1 +Mcu.Pin27=VP_IWDG_VS_IWDG +Mcu.Pin28=VP_RNG_VS_RNG +Mcu.Pin29=VP_SYS_VS_tim11 Mcu.Pin3=PA0-WKUP -Mcu.Pin30=VP_TIM7_VS_ClockSourceINT +Mcu.Pin30=VP_TIM1_VS_ClockSourceINT +Mcu.Pin31=VP_TIM3_VS_ClockSourceINT +Mcu.Pin32=VP_TIM6_VS_ClockSourceINT +Mcu.Pin33=VP_TIM7_VS_ClockSourceINT Mcu.Pin4=PA1 Mcu.Pin5=PA2 Mcu.Pin6=PA3 Mcu.Pin7=PA5 Mcu.Pin8=PA6 Mcu.Pin9=PA7 -Mcu.PinsNb=31 +Mcu.PinsNb=34 Mcu.ThirdPartyNb=0 Mcu.UserConstants= Mcu.UserName=STM32F407VETx @@ -131,6 +161,8 @@ NVIC.CAN1_SCE_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.CAN1_TX_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.DMA1_Stream1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DMA1_Stream3_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true +NVIC.DMA1_Stream5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true +NVIC.DMA1_Stream6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false NVIC.ForceEnableDMAVector=true NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false @@ -148,6 +180,7 @@ NVIC.TIM6_DAC_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.TIM7_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.TimeBase=TIM1_TRG_COM_TIM11_IRQn NVIC.TimeBaseIP=TIM11 +NVIC.USART2_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.USART3_IRQn=true\:5\:0\:false\:false\:true\:true\:true\:true\:true NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false PA0-WKUP.Locked=true @@ -198,6 +231,12 @@ PC8.Signal=S_TIM3_CH3 PC9.Locked=true PC9.Mode=Clock-out-2 PC9.Signal=RCC_MCO_2 +PD5.Locked=true +PD5.Mode=Asynchronous +PD5.Signal=USART2_TX +PD6.Locked=true +PD6.Mode=Asynchronous +PD6.Signal=USART2_RX PH0-OSC_IN.Mode=HSE-External-Oscillator PH0-OSC_IN.Signal=RCC_OSC_IN PH1-OSC_OUT.Mode=HSE-External-Oscillator @@ -235,7 +274,7 @@ ProjectManager.ToolChainLocation= ProjectManager.UAScriptAfterPath= ProjectManager.UAScriptBeforePath= ProjectManager.UnderRoot=true -ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_TIM3_Init-TIM3-false-HAL-true,6-MX_CRC_Init-CRC-false-HAL-true,7-MX_RNG_Init-RNG-false-HAL-true,8-MX_TIM7_Init-TIM7-false-HAL-true,9-MX_TIM6_Init-TIM6-false-HAL-true,10-MX_TIM1_Init-TIM1-false-HAL-true,11-MX_USART3_UART_Init-USART3-false-HAL-true,12-MX_CAN1_Init-CAN1-false-HAL-true,13-MX_SPI1_Init-SPI1-false-HAL-true,14-MX_USART2_UART_Init-USART2-false-HAL-true +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_TIM3_Init-TIM3-false-HAL-true,6-MX_CRC_Init-CRC-false-HAL-true,7-MX_RNG_Init-RNG-false-HAL-true,8-MX_TIM7_Init-TIM7-false-HAL-true,9-MX_TIM6_Init-TIM6-false-HAL-true,10-MX_TIM1_Init-TIM1-false-HAL-true,11-MX_USART3_UART_Init-USART3-false-HAL-true,12-MX_CAN1_Init-CAN1-false-HAL-true,13-MX_SPI1_Init-SPI1-false-HAL-true,14-MX_ADC1_Init-ADC1-false-HAL-true,15-MX_USART2_UART_Init-USART2-false-HAL-true RCC.48MHZClocksFreq_Value=48000000 RCC.AHBFreq_Value=144000000 RCC.APB1CLKDivider=RCC_HCLK_DIV4 @@ -311,9 +350,11 @@ TIM6.IPParameters=Prescaler TIM6.Prescaler=71 TIM7.IPParameters=Prescaler TIM7.Prescaler=81 -USART1.BaudRate=961200 +USART1.BaudRate=460800 USART1.IPParameters=VirtualMode,BaudRate USART1.VirtualMode=VM_ASYNC +USART2.IPParameters=VirtualMode +USART2.VirtualMode=VM_ASYNC USART3.BaudRate=9600 USART3.IPParameters=VirtualMode,BaudRate USART3.VirtualMode=VM_ASYNC @@ -321,6 +362,8 @@ VP_CRC_VS_CRC.Mode=CRC_Activate VP_CRC_VS_CRC.Signal=CRC_VS_CRC VP_FREERTOS_VS_CMSIS_V1.Mode=CMSIS_V1 VP_FREERTOS_VS_CMSIS_V1.Signal=FREERTOS_VS_CMSIS_V1 +VP_IWDG_VS_IWDG.Mode=IWDG_Activate +VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG VP_RNG_VS_RNG.Mode=RNG_Activate VP_RNG_VS_RNG.Signal=RNG_VS_RNG VP_SYS_VS_tim11.Mode=TIM11 diff --git a/iflytop_canbus_protocol b/iflytop_canbus_protocol index 702ffbc..efbd4c3 160000 --- a/iflytop_canbus_protocol +++ b/iflytop_canbus_protocol @@ -1 +1 @@ -Subproject commit 702ffbcb82fa62e2cef6621ac49ede8f913273c8 +Subproject commit efbd4c31b82554530300d3104c0e14f2b5e7f581 diff --git a/usrc/base/hardware.cpp b/usrc/base/hardware.cpp index cb9ee15..1916374 100644 --- a/usrc/base/hardware.cpp +++ b/usrc/base/hardware.cpp @@ -1,48 +1,180 @@ #include "hardware.hpp" +#include "adc.h" +#include "tim.h" +#include "zsdk/hmp110/hmp110.hpp" #include "zsdk/zcanreceiver/zcanreceiver.hpp" -#define TAG "PROTO" +#define TAG "HARD" using namespace iflytop; /*********************************************************************************************************************** * EXT * ***********************************************************************************************************************/ + +static osThreadId H2O2CaptureThreadId; +static osThreadId AdcCaptureThreadId; + +// MINI_PWM 鼓风机 +static TIM_HandleTypeDef* m_miniPwmBlower_htim; +static uint32_t m_miniPwmBlower_channle; +static ZGPIO m_miniPwmBlower_enGpio; +static ZGPIO m_miniPwmBlower_fbGpio; + +// 加热片控制 +static ZGPIO m_Heater_ctrlGpio; +static ZGPIO m_Heater_safeCtrlGpio; +static ZADC m_Heater_electricCurrentAdc; +static ZADC m_Heater_temperatureAdc; + +// H2O2过氧化氢 +static ModbusBlockHost m_H2o2Sensor_TempSensorModbusBlockHost; // +static ZADC m_H2o2Sensor_H2O2Adc; // H2O2传感器控制 +static HMP110 m_H2o2Sensor_HMP110; // H2O2传感器 +static int32_t m_hmp100_detectId = -1; + +static void onAdcCaptureThreadId(void const* argument) { + while (1) { + osDelay(30); + m_Heater_electricCurrentAdc.updateAdcValToCache(); + m_Heater_temperatureAdc.updateAdcValToCache(); + } +} + +static void onH2O2CaptureThreadId(void const* argument) { + while (1) { + osDelay(1000); + if (m_hmp100_detectId > 0) { + m_H2o2Sensor_H2O2Adc.updateAdcValToCache(); + m_H2o2Sensor_HMP110.updateSensorDataAndErrorcode(); + + // float mv = adcv / 4095.0 * 3.3 * 1000; + // float ma = mv / 150.0; + // float ppm = (ma - 4) / (20 - 4) * 2000; + } + } +} + void Hardware::init() { - m_motor_spi.init(&MOTOR_SPI); - m_modbusBlockHost.initialize(&huart3); + m_miniPwmBlower_htim = &htim3; + m_miniPwmBlower_channle = TIM_CHANNEL_3; + m_miniPwmBlower_enGpio.initAsOutput(PC10, kxs_gpio_nopull, true, false); + m_miniPwmBlower_fbGpio.initAsInput(PC9, kxs_gpio_nopull, kxs_gpio_rising_irq, false); - m_sl_mini_ac_ctrl.initAsOutput(PD14, kxs_gpio_nopull, true, false); // m_sl_mini_ac_ctrl - m_atta_mini_air_compressor_ctrl.initAsOutput(PD15, kxs_gpio_nopull, true, false); // m_atta_mini_air_compressor_ctrl + m_Heater_ctrlGpio.initAsOutput(PC6, kxs_gpio_nopull, true, false); + m_Heater_safeCtrlGpio.initAsOutput(PC7, kxs_gpio_nopull, true, false); + // m_Heater_electricCurrentAdc.initialize(&hadc1, ADC_CHANNEL_0); //暂时注释掉，板子少了一个ADC，该ADC用于H2O2浓度 + m_Heater_temperatureAdc.initialize(&hadc1, ADC_CHANNEL_1); // PA0 - m_motor[0].initialize(&m_motor_spi, MOTOR1_ENN, MOTOR1_CSN); - m_motor[0].setIHOLD_IRUN(1, 15, 0); - m_motor[0].setMotorShaft(true); - m_motor[0].setAcceleration(300000); - m_motor[0].setDeceleration(300000); + m_H2o2Sensor_TempSensorModbusBlockHost.initialize(&huart2); + m_H2o2Sensor_H2O2Adc.initialize(&hadc1, ADC_CHANNEL_0); // PA0 + m_H2o2Sensor_HMP110.init(&m_H2o2Sensor_TempSensorModbusBlockHost); - m_motor[1].initialize(&m_motor_spi, MOTOR2_ENN, MOTOR2_CSN); - m_motor[1].setIHOLD_IRUN(1, 15, 0); - m_motor[1].setMotorShaft(true); - m_motor[1].setAcceleration(300000); - m_motor[1].setDeceleration(300000); + /** + * @brief 探测HMP110 + */ + osDelay(2000); // 等待传感器上电 + if (m_H2o2Sensor_HMP110.ping(1)) { + m_hmp100_detectId = 1; + } + if (m_H2o2Sensor_HMP110.ping(240)) { + m_hmp100_detectId = 240; + } + m_H2o2Sensor_HMP110.setid(m_hmp100_detectId); + ZLOGI(TAG, "H2O2 Sensor detect id: %d", m_hmp100_detectId); - int32_t chipv0 = m_motor[0].readChipVERSION(); // 5130:0x11 - int32_t chipv1 = m_motor[1].readChipVERSION(); // 5130:0x11 - // m_motor[0].rotate(500000); - // m_motor[1].rotate(500000); - ZLOGI(TAG, "chipv0: %x, chipv1: %x", chipv0, chipv1); + osThreadDef(AdcCaptureThread, onAdcCaptureThreadId, osPriorityNormal, 0, 1024); + AdcCaptureThreadId = osThreadCreate(osThread(AdcCaptureThread), NULL); - auto gstate0 = m_motor[0].getGState(); - auto gstate1 = m_motor[1].getGState(); + osThreadDef(H2O2CaptureThread, onH2O2CaptureThreadId, osPriorityNormal, 0, 1024); + H2O2CaptureThreadId = osThreadCreate(osThread(H2O2CaptureThread), NULL); +} - ZLOGI(TAG, "motor0: reset:%d drv_err:%d uv_cp:%d", gstate0.reset, gstate0.drv_err, gstate0.uv_cp); - ZLOGI(TAG, "motor1: reset:%d drv_err:%d uv_cp:%d", gstate1.reset, gstate1.drv_err, gstate1.uv_cp); +/*********************************************************************************************************************** + * FUMP_IMPL * + ***********************************************************************************************************************/ +void Hardware::mini_pwm_blower_ctrl(int32_t duty) { + duty = 100 - duty; + if (duty < 0) duty = 0; + if (duty > 100) duty = 100; + + TIM_OC_InitTypeDef sConfigOC = {0}; + sConfigOC.OCMode = TIM_OCMODE_PWM1; + sConfigOC.Pulse = duty / 100.0 * __HAL_TIM_GET_AUTORELOAD(m_miniPwmBlower_htim); + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; + sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; - gstate0 = m_motor[0].getGState(); - gstate1 = m_motor[1].getGState(); + HAL_TIM_PWM_ConfigChannel(m_miniPwmBlower_htim, &sConfigOC, m_miniPwmBlower_channle); + HAL_TIM_PWM_Stop(m_miniPwmBlower_htim, m_miniPwmBlower_channle); + HAL_TIM_PWM_Start(m_miniPwmBlower_htim, m_miniPwmBlower_channle); - ZLOGI(TAG, "motor0: reset:%d drv_err:%d uv_cp:%d", gstate0.reset, gstate0.drv_err, gstate0.uv_cp); - ZLOGI(TAG, "motor1: reset:%d drv_err:%d uv_cp:%d", gstate1.reset, gstate1.drv_err, gstate1.uv_cp); + m_miniPwmBlower_enGpio.write(duty != 0); +} +int32_t Hardware::mini_pwm_blower_read_fbcount() { // + return 0; +} - m_pressureSensorBus.init(&m_modbusBlockHost); +void Hardware::heater_ctrl(int32_t val) { m_Heater_ctrlGpio.write(val); } +void Hardware::heater_ctrl_safe_valve(int32_t val) { m_Heater_safeCtrlGpio.write(val); } +int32_t Hardware::heater_read_electric_current() { + // float mv = adcv / 4095.0 * 3.3 * 1000; + // float ma = mv / 150.0; + int32_t adcv = m_Heater_electricCurrentAdc.getCacheVal(); + int32_t ma = (adcv / 4095.0 * 3.3 * 1000) / 150.0; + return ma; +} +int32_t Hardware::heater_read_temperature_data() { + // float mv = adcv / 4095.0 * 3.3 * 1000; + // float ma = mv / 150.0; + // float ppm = (ma - 4) / (20 - 4) * 2000; + int32_t adcv = m_Heater_temperatureAdc.getCacheVal(); + int32_t ma = (adcv / 4095.0 * 3.3 * 1000) / 150.0; + int32_t temp = (ma - 4) / (20 - 4) * (3000 - 0) + 0; + return temp; // C*10 } + +bool Hardware::h2o2_sensor_is_online() { + if (m_hmp100_detectId <= 0) { + return false; + } + int32_t ecode = m_H2o2Sensor_HMP110.read_cache_errorcode(); + if (ecode == -1) { + return false; + } + return true; +} +int32_t Hardware::h2o2_sensor_read_calibration_date(int32_t* year, int32_t* month, int32_t* day) { return 0; } +int32_t Hardware::h2o2_sensor_read_sub_ic_errorcode() { return m_H2o2Sensor_HMP110.read_cache_errorcode(); } +int32_t Hardware::h2o2_sensor_read_sub_ic_reg(int32_t add, uint16_t* val, size_t len) { return m_H2o2Sensor_HMP110.read_reg(add, val, len); } +int32_t Hardware::h2o2_sensor_data(report_h2o2_data_t* readdata) { + int32_t ecode = m_H2o2Sensor_HMP110.read_cache_errorcode(); + int32_t h2o2adcVal = m_H2o2Sensor_H2O2Adc.getCacheVal(); + HMP110::hmp110_sensordata_t sensordata; + m_H2o2Sensor_HMP110.read_cache_sensor_data(&sensordata); + + // float mv = adcv / 4095.0 * 3.3 * 1000; + // float ma = mv / 150.0; + // float ppm = (ma - 4) / (20 - 4) * 2000; + int32_t h2o2ma = (h2o2adcVal / 4095.0 * 3.3 * 1000) / 150.0; + int32_t h2o2ppm = (h2o2ma - 4) / (20 - 4) * 2000; + + readdata->subid = 0; + readdata->sensor_error = ecode != 0; + readdata->h2o2 = h2o2ppm; + readdata->humid = sensordata.rh; + readdata->temp = sensordata.temp; + readdata->saturation = 0; + + ZLOGI(TAG, "ppm:%d, rh:%d, temp:%d, df_ptemp:%d, ah:%d, mr:%d, wbt:%d, eh:%d", // + h2o2ppm, // + sensordata.rh, // + sensordata.temp, // + sensordata.df_ptemp, // + sensordata.ah, // + sensordata.mr, // + sensordata.wet_bulb_temp, // + sensordata.enthalpy); + + return 0; +} \ No newline at end of file diff --git a/usrc/base/hardware.hpp b/usrc/base/hardware.hpp index e244aa6..b69591f 100644 --- a/usrc/base/hardware.hpp +++ b/usrc/base/hardware.hpp @@ -8,20 +8,13 @@ #include "zsdk/modbus/modbus_block_host.hpp" #include "zsdk/pxx_pressure_sensor_driver/pxx_pressure_sensor_bus.hpp" #include "zsdk/tmc/ztmc5130.hpp" +#include "zsdk/zadc.hpp" #include "zsdk/zsdk.hpp" void hardware_init(); namespace iflytop { class Hardware { - ZSPI m_motor_spi; // - ModbusBlockHost m_modbusBlockHost; // - - TMC5130 m_motor[2]; // 蠕动泵控制 - ZGPIO m_sl_mini_ac_ctrl; // 喷液空压机(MINI) - ZGPIO m_atta_mini_air_compressor_ctrl; // 气密性测试空压机(MINI) - PXXPressureSensorBus m_pressureSensorBus; // PXX压力传感器总线 - public: static Hardware& ins() { static Hardware ins; @@ -30,17 +23,19 @@ class Hardware { void init(); - int32_t motorNum() { return ZARRAY_SIZE(m_motor); } - TMC5130* motor(int32_t index) { - if (index < ZARRAY_SIZE(m_motor)) { - return &m_motor[index]; - } - return nullptr; - } - ZGPIO* sl_mini_ac_ctrl() { return &m_sl_mini_ac_ctrl; } - ZGPIO* atta_mini_air_compressor_ctrl() { return &m_atta_mini_air_compressor_ctrl; } + void mini_pwm_blower_ctrl(int32_t val); + int32_t mini_pwm_blower_read_fbcount(); + + void heater_ctrl(int32_t val); + void heater_ctrl_safe_valve(int32_t val); + int32_t heater_read_electric_current(); + int32_t heater_read_temperature_data(); - PXXPressureSensorBus* pressureSensorBus() { return &m_pressureSensorBus; } + bool h2o2_sensor_is_online(); + int32_t h2o2_sensor_read_calibration_date(int32_t* year, int32_t* month, int32_t* day); + int32_t h2o2_sensor_read_sub_ic_errorcode(); + int32_t h2o2_sensor_read_sub_ic_reg(int32_t add, uint16_t* val, size_t len); + int32_t h2o2_sensor_data(report_h2o2_data_t* sensorData); }; } // namespace iflytop diff --git a/usrc/main.cpp b/usrc/main.cpp index 1751b4a..6cfbb4d 100644 --- a/usrc/main.cpp +++ b/usrc/main.cpp @@ -58,6 +58,7 @@ void umain() { while (true) { osDelay(1); + HAL_IWDG_Refresh(&hiwdg); debug_light_ctrl(); } } diff --git a/usrc/protocol_impl/protocol_impl_service.cpp b/usrc/protocol_impl/protocol_impl_service.cpp index e1ee1a1..9bdc2fb 100644 --- a/usrc/protocol_impl/protocol_impl_service.cpp +++ b/usrc/protocol_impl/protocol_impl_service.cpp @@ -31,7 +31,7 @@ using namespace iflytop; * VAR_LIST * ***********************************************************************************************************************/ -static osTimerId HeartReportTimerId; +static osTimerId PacketReportTimerId; static osThreadId PacketRxThreadId; static osTimerId PressureSensorDataReportTimerId; // 压力传感器数值上报 @@ -41,6 +41,8 @@ static osTimerId MotorMonitorTimerId; // 压力传感器数值上报 static uint8_t m_dflag; + + /*********************************************************************************************************************** * FUNCTION_IMPL * ***********************************************************************************************************************/ @@ -103,213 +105,72 @@ static void basic_func_impl(uint8_t from, uint8_t to, uint8_t* rawpacket, size_t } } -static void pump_func_impl(uint8_t from, uint8_t to, uint8_t* rawpacket, size_t len) { +static void others_func_impl(uint8_t from, uint8_t to, uint8_t* rawpacket, size_t len) { zcanbus_packet_t* packet = (zcanbus_packet_t*)rawpacket; int32_t paramNum = (len - sizeof(zcanbus_packet_t)) / 4; - // 泵机转动 - if (packet->function_id == kcmd_pump_rotate) { - CHECK_PARAM_LEN(paramNum, 2); - - int32_t subindex = GET_PARAM(packet->params, 0); - int32_t velocity = GET_PARAM(packet->params, 1); - - if (subindex >= Hardware::ins().motorNum()) { - zcanbus_send_errorack(packet, kerr_invalid_param); - return; - } - if (!Hardware::ins().motor(subindex)->ping()) { - zcanbus_send_errorack(packet, kerr_motor_subdevice_offline); - return; - } - - Hardware::ins().motor(subindex)->enableIC(false); - Hardware::ins().motor(subindex)->enableIC(true); - Hardware::ins().motor(subindex)->rotate(velocity); - zcanbus_send_ack(packet, NULL, 0); - } - - // 泵机停止 - else if (packet->function_id == kcmd_pump_stop) { + // MINI鼓风机 + if (packet->function_id == kcmd_mini_pwm_blower_ctrl) { CHECK_PARAM_LEN(paramNum, 1); - - int32_t subindex = GET_PARAM(packet->params, 0); - - if (subindex >= Hardware::ins().motorNum()) { - zcanbus_send_errorack(packet, kerr_invalid_param); - return; - } - - if (!Hardware::ins().motor(subindex)->ping()) { - zcanbus_send_errorack(packet, kerr_motor_subdevice_offline); - return; - } - - Hardware::ins().motor(subindex)->stop(); + Hardware::ins().mini_pwm_blower_ctrl(GET_PARAM(packet->params, 0)); zcanbus_send_ack(packet, NULL, 0); } - // 设置电流/保持电流/IDELAY - else if (packet->function_id == kcmd_pump_set_ihold_irun_idelay) { - CHECK_PARAM_LEN(paramNum, 4); - - int32_t subindex = GET_PARAM(packet->params, 0); - int32_t ihold = GET_PARAM(packet->params, 1); - int32_t irun = GET_PARAM(packet->params, 2); - int32_t idelay = GET_PARAM(packet->params, 3); - - if (subindex >= Hardware::ins().motorNum()) { - zcanbus_send_errorack(packet, kerr_invalid_param); - return; - } - - if (!Hardware::ins().motor(subindex)->ping()) { - zcanbus_send_errorack(packet, kerr_motor_subdevice_offline); - return; - } + else if (packet->function_id == kcmd_mini_pwm_blower_read_fbcount) { + int32_t fbcount = Hardware::ins().mini_pwm_blower_read_fbcount(); + zcanbus_send_ack(packet, (uint8_t*)&fbcount, sizeof(fbcount)); + } - Hardware::ins().motor(subindex)->setIHOLD_IRUN(ihold, irun, idelay); + // 加热棒 + else if (packet->function_id == kcmd_heater_ctrl) { + CHECK_PARAM_LEN(paramNum, 1); + Hardware::ins().heater_ctrl(GET_PARAM(packet->params, 0)); zcanbus_send_ack(packet, NULL, 0); } - // 设置加速度 - else if (packet->function_id == kcmd_pump_set_acc) { - CHECK_PARAM_LEN(paramNum, 2); - - int32_t subindex = GET_PARAM(packet->params, 0); - int32_t acc = GET_PARAM(packet->params, 1); - - if (subindex >= Hardware::ins().motorNum()) { - zcanbus_send_errorack(packet, kerr_invalid_param); - return; - } - - if (!Hardware::ins().motor(subindex)->ping()) { - zcanbus_send_errorack(packet, kerr_motor_subdevice_offline); - return; - } - Hardware::ins().motor(subindex)->setAcceleration(acc); - Hardware::ins().motor(subindex)->setDeceleration(acc); + else if (packet->function_id == kcmd_heater_ctrl_safe_valve) { + CHECK_PARAM_LEN(paramNum, 1); + Hardware::ins().heater_ctrl_safe_valve(GET_PARAM(packet->params, 0)); zcanbus_send_ack(packet, NULL, 0); - } - // 设置5130寄存器 - else if (packet->function_id == kcmd_pump_set_subic_reg) { - CHECK_PARAM_LEN(paramNum, 3); - - int32_t subindex = GET_PARAM(packet->params, 0); - int32_t regadd = GET_PARAM(packet->params, 1); - int32_t regval = GET_PARAM(packet->params, 2); - - if (subindex >= Hardware::ins().motorNum()) { - zcanbus_send_errorack(packet, kerr_invalid_param); - return; - } - - if (!Hardware::ins().motor(subindex)->ping()) { - zcanbus_send_errorack(packet, kerr_motor_subdevice_offline); - return; - } - - Hardware::ins().motor(subindex)->writeInt(regadd, regval); + else if (packet->function_id == kcmd_heater_read_electric_current) { + int32_t current = Hardware::ins().heater_read_electric_current(); + zcanbus_send_ack(packet, (uint8_t*)¤t, sizeof(current)); } - // 读取5130寄存器 - else if (packet->function_id == kcmd_pump_get_subic_reg) { - CHECK_PARAM_LEN(paramNum, 2); - - int32_t subindex = GET_PARAM(packet->params, 0); - int32_t regadd = GET_PARAM(packet->params, 1); - - if (subindex >= Hardware::ins().motorNum()) { - zcanbus_send_errorack(packet, kerr_invalid_param); - return; - } - - if (!Hardware::ins().motor(subindex)->ping()) { - zcanbus_send_errorack(packet, kerr_motor_subdevice_offline); - return; - } - - int32_t regval = Hardware::ins().motor(subindex)->readInt(regadd); - zcanbus_send_ack(packet, (uint8_t*)®val, sizeof(regval)); + else if (packet->function_id == kcmd_heater_read_temperature_data) { + int32_t temp = Hardware::ins().heater_read_temperature_data(); + zcanbus_send_ack(packet, (uint8_t*)&temp, sizeof(temp)); } - // ping - else if (packet->function_id == kcmd_pump_get_subic_reg) { + // H2O2 + else if (packet->function_id == kcmd_h2o2_sensor_read_calibration_date) { CHECK_PARAM_LEN(paramNum, 1); - - int32_t subindex = GET_PARAM(packet->params, 0); - - if (subindex >= Hardware::ins().motorNum()) { - zcanbus_send_errorack(packet, kerr_invalid_param); - return; - } - - if (!Hardware::ins().motor(subindex)->ping()) { - zcanbus_send_errorack(packet, kerr_motor_subdevice_offline); - return; - } - zcanbus_send_ack(packet, NULL, 0); + int32_t subic = GET_PARAM(packet->params, 0); + int32_t data[3]; + Hardware::ins().h2o2_sensor_read_calibration_date(&data[0], &data[1], &data[2]); + zcanbus_send_ack(packet, (uint8_t*)&data, sizeof(data)); } -} -static void others_func_impl(uint8_t from, uint8_t to, uint8_t* rawpacket, size_t len) { - zcanbus_packet_t* packet = (zcanbus_packet_t*)rawpacket; - int32_t paramNum = (len - sizeof(zcanbus_packet_t)) / 4; - - // m_atta_mini_air_compressor_ctrl - - // 喷液MINI真空泵 - if (packet->function_id == kcmd_sl_mini_ac_ctrl) { - CHECK_PARAM_LEN(paramNum, 1); - Hardware::ins().sl_mini_ac_ctrl()->write(GET_PARAM(packet->params, 0)); - zcanbus_send_ack(packet, NULL, 0); - } - // 气密性测试MINI真空泵 - else if (packet->function_id == kcmd_atta_mini_air_compressor_ctrl) { - CHECK_PARAM_LEN(paramNum, 1); - Hardware::ins().atta_mini_air_compressor_ctrl()->write(GET_PARAM(packet->params, 0)); - zcanbus_send_ack(packet, NULL, 0); + else if (packet->function_id == kcmd_h2o2_sensor_read_sub_ic_errorcode) { + int32_t ecode = Hardware::ins().h2o2_sensor_read_sub_ic_errorcode(); + zcanbus_send_ack(packet, (uint8_t*)&ecode, sizeof(ecode)); } - // 压力传感器数据上报 - else if (packet->function_id == kcmd_pressure_sensor_bus_read_data) { - CHECK_PARAM_LEN(paramNum, 1); - int32_t index = GET_PARAM(packet->params, 0); - - int16_t val = 0; - int32_t reportVal = 0; - bool suc = Hardware::ins().pressureSensorBus()->readData(index, &val); - - reportVal = val; - - if (suc) { - zcanbus_send_ack(packet, (uint8_t*)&reportVal, sizeof(reportVal)); - } else { - zcanbus_send_errorack(packet, kerr_subdevice_offline); - } + else if (packet->function_id == kcmd_h2o2_sensor_read_sub_ic_reg) { + CHECK_PARAM_LEN(paramNum, 3); + int32_t subic = GET_PARAM(packet->params, 0); + int32_t addr = GET_PARAM(packet->params, 1); + int32_t regNum = GET_PARAM(packet->params, 2); + if (regNum > 10) regNum = 10; // 最多读10个寄存器 + static uint16_t data[10]; + memset(data, 0, sizeof(data)); + Hardware::ins().h2o2_sensor_read_sub_ic_reg(addr, data, regNum); + zcanbus_send_ack(packet, (uint8_t*)&data, regNum * 2); } - // 压力传感器数据上报 - else if (packet->function_id == kcmd_pressure_sensor_bus_set_report_period_ms) { - CHECK_PARAM_LEN(paramNum, 1); - int32_t period = GET_PARAM(packet->params, 0); - - ZLOGI(TAG, "set pressure sensor data report period %d ms", period); - - if (period != 0) { - if (period < 200) period = 200; - osTimerStop(PressureSensorDataReportTimerId); - osTimerStart(PressureSensorDataReportTimerId, period); - m_pressureSensorDataReportPeriodMs = period; - } else { - osTimerStop(PressureSensorDataReportTimerId); - } - zcanbus_send_ack(packet, NULL, 0); - } } /*********************************************************************************************************************** @@ -321,14 +182,22 @@ static void onPacketRxThreadStart(void const* argument) { osDelay(1); } } +static void onPacketReportTimer(void const* argument) { + static report_h2o2_data_t data; + memset(&data, 0, sizeof(data)); + Hardware::ins().h2o2_sensor_data(&data); + zcanbus_send_report(kreport_h2o2_sensor_data, (uint8_t*)&data, sizeof(data), 30); +} + static void zcanbus_on_rx(uint8_t from, uint8_t to, uint8_t* rawpacket, size_t len) { // zcanbus_packet_t* packet = (zcanbus_packet_t*)rawpacket; ZLOGI(TAG, "process packet from %d to %d, function_id %d, len %d", from, to, packet->function_id, len); basic_func_impl(from, to, rawpacket, len); - pump_func_impl(from, to, rawpacket, len); others_func_impl(from, to, rawpacket, len); + + ZLOGI(TAG, "process end"); } @@ -340,69 +209,6 @@ static void zcanbus_on_connected(bool connected) { } } -static void onPressureSensorDataReportTimer(void const* argument) { - // 压力传感器数据上报 - static uint8_t reportcache[100]; - static report_pressure_data_t* report = (report_pressure_data_t*)reportcache; - - int sensorNum = 0; - - for (size_t i = 0; i < PXX_PRESSURE_SENSOR_NUM; i++) { - int16_t val = 0; - bool suc = Hardware::ins().pressureSensorBus()->readData(i, &val); - - if (suc) { - report->data[sensorNum].subid = i; - report->data[sensorNum].pressureVal = val; - sensorNum++; - } - } - - report->sensorDataNum = sensorNum; - zcanbus_send_report(kreport_pressure_data, (uint8_t*)report, // - sizeof(report_pressure_data_t) + sensorNum * sizeof(report->data[0]), 10); -} - -static void onMotorMonitorTimer(void const* argument) { - // 电机异常检查 - static bool motorErrorFlagCache[10]; - - report_exeception_data_t data; - for (size_t i = 0; i < Hardware::ins().motorNum(); i++) { - if (!Hardware::ins().motor(i)->ping()) { - data.subid = i; - data.ecode = kerr_motor_subdevice_offline; - - if (!motorErrorFlagCache[i]) { - motorErrorFlagCache[i] = true; - ZLOGE(TAG, "motor %d offline error", i); - zcanbus_send_emergency_report(kreport_exception_error, (uint8_t*)&data, sizeof(data), 100); - } - } else { - auto gstate = Hardware::ins().motor(i)->getGState(); - bool flag = gstate.reset || gstate.drv_err || gstate.uv_cp; - // flag = true; - if (!flag && motorErrorFlagCache[i]) { - motorErrorFlagCache[i] = false; - } else if (flag && !motorErrorFlagCache[i]) { - ZLOGE(TAG, "motor %d error, reset %d, drv_err %d, uv_cp %d", i, gstate.reset, gstate.drv_err, gstate.uv_cp); - if (gstate.reset) { - data.ecode = kerr_motor_reset_error; - } else if (gstate.uv_cp) { - data.ecode = kerr_motor_undervoltage_error; - } else if (gstate.drv_err) { - data.ecode = kerr_motor_driver_error; - } else { - data.ecode = kerr_motor_unkown_error; - } - data.subid = i; - motorErrorFlagCache[i] = true; - zcanbus_send_emergency_report(kreport_exception_error, (uint8_t*)&data, sizeof(data), 100); - } - } - } -} - /*********************************************************************************************************************** * EXT * ***********************************************************************************************************************/ @@ -417,13 +223,9 @@ void protocol_impl_service_init() { // zcanbus_reglistener(zcanbus_on_rx); zcanbus_reg_on_connected_listener(zcanbus_on_connected); - osTimerDef(PressureSensorDataReportTimer, onPressureSensorDataReportTimer); - PressureSensorDataReportTimerId = osTimerCreate(osTimer(PressureSensorDataReportTimer), osTimerPeriodic, NULL); - osTimerStart(PressureSensorDataReportTimerId, m_pressureSensorDataReportPeriodMs); - - osTimerDef(MotorMonitorTimer, onMotorMonitorTimer); - MotorMonitorTimerId = osTimerCreate(osTimer(MotorMonitorTimer), osTimerPeriodic, NULL); - osTimerStart(MotorMonitorTimerId, 1000); + osTimerDef(PacketReportTimer, onPacketReportTimer); + PacketReportTimerId = osTimerCreate(osTimer(PacketReportTimer), osTimerPeriodic, NULL); + osTimerStart(PacketReportTimerId, 5000); osThreadDef(PacketRxThread, onPacketRxThreadStart, osPriorityNormal, 0, 1024); PacketRxThreadId = osThreadCreate(osThread(PacketRxThread), NULL); diff --git a/zsdk b/zsdk index 7951cee..f03f863 160000 --- a/zsdk +++ b/zsdk @@ -1 +1 @@ -Subproject commit 7951cee7dfc612be73f402914c12933ddffe37cc +Subproject commit f03f8639e81f3e7e5cbe9fd563503f46e46ddf84