21 changed files with 1397 additions and 350 deletions
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40.mxproject
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52Core/Inc/iwdg.h
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2Core/Inc/stm32f4xx_hal_conf.h
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3Core/Inc/stm32f4xx_it.h
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3Core/Inc/usart.h
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6Core/Src/dma.c
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4Core/Src/gpio.c
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55Core/Src/iwdg.c
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6Core/Src/main.c
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45Core/Src/stm32f4xx_it.c
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122Core/Src/usart.c
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220Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_iwdg.h
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302Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_iwdg.h
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262Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c
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91dbdb_power_control_mini_board.ioc
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2iflytop_canbus_protocol
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190usrc/base/hardware.cpp
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31usrc/base/hardware.hpp
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1usrc/main.cpp
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308usrc/protocol_impl/protocol_impl_service.cpp
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2zsdk
40
.mxproject
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/* USER CODE BEGIN Header */ |
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/** |
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****************************************************************************** |
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* @file iwdg.h |
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* @brief This file contains all the function prototypes for |
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* the iwdg.c file |
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****************************************************************************** |
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* @attention |
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* |
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* Copyright (c) 2024 STMicroelectronics. |
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* All rights reserved. |
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* |
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* This software is licensed under terms that can be found in the LICENSE file |
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* in the root directory of this software component. |
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* If no LICENSE file comes with this software, it is provided AS-IS. |
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* |
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****************************************************************************** |
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*/ |
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/* USER CODE END Header */ |
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/* Define to prevent recursive inclusion -------------------------------------*/ |
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#ifndef __IWDG_H__ |
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#define __IWDG_H__ |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/* Includes ------------------------------------------------------------------*/ |
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#include "main.h" |
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/* USER CODE BEGIN Includes */ |
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/* USER CODE END Includes */ |
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extern IWDG_HandleTypeDef hiwdg; |
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/* USER CODE BEGIN Private defines */ |
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/* USER CODE END Private defines */ |
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void MX_IWDG_Init(void); |
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/* USER CODE BEGIN Prototypes */ |
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/* USER CODE END Prototypes */ |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* __IWDG_H__ */ |
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/* USER CODE BEGIN Header */ |
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/** |
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****************************************************************************** |
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* @file iwdg.c |
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* @brief This file provides code for the configuration |
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* of the IWDG instances. |
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****************************************************************************** |
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* @attention |
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* |
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* Copyright (c) 2024 STMicroelectronics. |
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* All rights reserved. |
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* |
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* This software is licensed under terms that can be found in the LICENSE file |
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* in the root directory of this software component. |
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* If no LICENSE file comes with this software, it is provided AS-IS. |
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* |
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****************************************************************************** |
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*/ |
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/* USER CODE END Header */ |
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/* Includes ------------------------------------------------------------------*/ |
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#include "iwdg.h" |
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/* USER CODE BEGIN 0 */ |
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/* USER CODE END 0 */ |
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IWDG_HandleTypeDef hiwdg; |
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/* IWDG init function */ |
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void MX_IWDG_Init(void) |
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{ |
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/* USER CODE BEGIN IWDG_Init 0 */ |
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/* USER CODE END IWDG_Init 0 */ |
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/* USER CODE BEGIN IWDG_Init 1 */ |
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/* USER CODE END IWDG_Init 1 */ |
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hiwdg.Instance = IWDG; |
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hiwdg.Init.Prescaler = IWDG_PRESCALER_256; |
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hiwdg.Init.Reload = 500; |
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if (HAL_IWDG_Init(&hiwdg) != HAL_OK) |
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{ |
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Error_Handler(); |
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} |
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/* USER CODE BEGIN IWDG_Init 2 */ |
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/* USER CODE END IWDG_Init 2 */ |
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} |
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/* USER CODE BEGIN 1 */ |
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/* USER CODE END 1 */ |
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/** |
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****************************************************************************** |
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* @file stm32f4xx_hal_iwdg.h |
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* @author MCD Application Team |
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* @brief Header file of IWDG HAL module. |
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****************************************************************************** |
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* @attention |
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* |
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* Copyright (c) 2016 STMicroelectronics. |
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* All rights reserved. |
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* |
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* This software is licensed under terms that can be found in the LICENSE file |
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* in the root directory of this software component. |
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* If no LICENSE file comes with this software, it is provided AS-IS. |
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* |
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****************************************************************************** |
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*/ |
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/* Define to prevent recursive inclusion -------------------------------------*/ |
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#ifndef STM32F4xx_HAL_IWDG_H |
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#define STM32F4xx_HAL_IWDG_H |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/* Includes ------------------------------------------------------------------*/ |
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#include "stm32f4xx_hal_def.h" |
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/** @addtogroup STM32F4xx_HAL_Driver |
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* @{ |
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*/ |
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/** @defgroup IWDG IWDG |
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* @{ |
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*/ |
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/* Exported types ------------------------------------------------------------*/ |
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/** @defgroup IWDG_Exported_Types IWDG Exported Types |
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* @{ |
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*/ |
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/** |
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* @brief IWDG Init structure definition |
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*/ |
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typedef struct |
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{ |
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uint32_t Prescaler; /*!< Select the prescaler of the IWDG. |
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This parameter can be a value of @ref IWDG_Prescaler */ |
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uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. |
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This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ |
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} IWDG_InitTypeDef; |
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/** |
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* @brief IWDG Handle Structure definition |
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*/ |
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typedef struct |
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{ |
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IWDG_TypeDef *Instance; /*!< Register base address */ |
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IWDG_InitTypeDef Init; /*!< IWDG required parameters */ |
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} IWDG_HandleTypeDef; |
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/** |
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* @} |
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*/ |
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/* Exported constants --------------------------------------------------------*/ |
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/** @defgroup IWDG_Exported_Constants IWDG Exported Constants |
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* @{ |
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*/ |
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/** @defgroup IWDG_Prescaler IWDG Prescaler |
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* @{ |
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*/ |
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#define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */ |
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#define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */ |
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#define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */ |
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#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */ |
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#define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */ |
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#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */ |
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#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */ |
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/** |
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* @} |
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*/ |
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/** |
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* @} |
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*/ |
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/* Exported macros -----------------------------------------------------------*/ |
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/** @defgroup IWDG_Exported_Macros IWDG Exported Macros |
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* @{ |
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*/ |
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/** |
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* @brief Enable the IWDG peripheral. |
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* @param __HANDLE__ IWDG handle |
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* @retval None |
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*/ |
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#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) |
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/** |
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* @brief Reload IWDG counter with value defined in the reload register |
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* (write access to IWDG_PR and IWDG_RLR registers disabled). |
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* @param __HANDLE__ IWDG handle |
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* @retval None |
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*/ |
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#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) |
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/** |
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* @} |
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*/ |
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/* Exported functions --------------------------------------------------------*/ |
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/** @defgroup IWDG_Exported_Functions IWDG Exported Functions |
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* @{ |
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*/ |
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/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions |
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* @{ |
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*/ |
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/* Initialization/Start functions ********************************************/ |
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HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); |
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/** |
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* @} |
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*/ |
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/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions |
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* @{ |
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*/ |
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/* I/O operation functions ****************************************************/ |
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HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); |
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/** |
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* @} |
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*/ |
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/** |
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* @} |
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*/ |
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/* Private constants ---------------------------------------------------------*/ |
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/** @defgroup IWDG_Private_Constants IWDG Private Constants |
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* @{ |
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*/ |
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/** |
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* @brief IWDG Key Register BitMask |
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*/ |
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#define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */ |
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#define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */ |
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#define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */ |
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#define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */ |
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/** |
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* @} |
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*/ |
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/* Private macros ------------------------------------------------------------*/ |
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/** @defgroup IWDG_Private_Macros IWDG Private Macros |
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* @{ |
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*/ |
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/** |
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* @brief Enable write access to IWDG_PR and IWDG_RLR registers. |
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* @param __HANDLE__ IWDG handle |
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* @retval None |
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*/ |
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#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) |
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/** |
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* @brief Disable write access to IWDG_PR and IWDG_RLR registers. |
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* @param __HANDLE__ IWDG handle |
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* @retval None |
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*/ |
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#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) |
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/** |
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* @brief Check IWDG prescaler value. |
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* @param __PRESCALER__ IWDG prescaler value |
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* @retval None |
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*/ |
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#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ |
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((__PRESCALER__) == IWDG_PRESCALER_8) || \ |
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((__PRESCALER__) == IWDG_PRESCALER_16) || \ |
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((__PRESCALER__) == IWDG_PRESCALER_32) || \ |
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((__PRESCALER__) == IWDG_PRESCALER_64) || \ |
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((__PRESCALER__) == IWDG_PRESCALER_128)|| \ |
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((__PRESCALER__) == IWDG_PRESCALER_256)) |
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/** |
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* @brief Check IWDG reload value. |
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* @param __RELOAD__ IWDG reload value |
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* @retval None |
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*/ |
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#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) |
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/** |
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* @} |
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*/ |
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/** |
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* @} |
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*/ |
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/** |
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* @} |
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*/ |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* STM32F4xx_HAL_IWDG_H */ |
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/** |
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****************************************************************************** |
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* @file stm32f4xx_ll_iwdg.h |
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* @author MCD Application Team |
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* @brief Header file of IWDG LL module. |
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****************************************************************************** |
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* @attention |
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* |
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* Copyright (c) 2016 STMicroelectronics. |
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* All rights reserved. |
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* |
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* This software is licensed under terms that can be found in the LICENSE file |
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* in the root directory of this software component. |
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* If no LICENSE file comes with this software, it is provided AS-IS. |
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* |
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****************************************************************************** |
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*/ |
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/* Define to prevent recursive inclusion -------------------------------------*/ |
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#ifndef STM32F4xx_LL_IWDG_H |
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#define STM32F4xx_LL_IWDG_H |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/* Includes ------------------------------------------------------------------*/ |
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#include "stm32f4xx.h" |
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/** @addtogroup STM32F4xx_LL_Driver |
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* @{ |
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*/ |
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#if defined(IWDG) |
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/** @defgroup IWDG_LL IWDG |
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* @{ |
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*/ |
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/* Private types -------------------------------------------------------------*/ |
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/* Private variables ---------------------------------------------------------*/ |
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/* Private constants ---------------------------------------------------------*/ |
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/** @defgroup IWDG_LL_Private_Constants IWDG Private Constants |
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* @{ |
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*/ |
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#define LL_IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */ |
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#define LL_IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */ |
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#define LL_IWDG_KEY_WR_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */ |
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#define LL_IWDG_KEY_WR_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */ |
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/** |
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* @} |
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*/ |
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/* Private macros ------------------------------------------------------------*/ |
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/* Exported types ------------------------------------------------------------*/ |
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/* Exported constants --------------------------------------------------------*/ |
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/** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants |
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* @{ |
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*/ |
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/** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines |
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* @brief Flags defines which can be used with LL_IWDG_ReadReg function |
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* @{ |
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*/ |
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#define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */ |
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#define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */ |
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/** |
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* @} |
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*/ |
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/** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider |
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* @{ |
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*/ |
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#define LL_IWDG_PRESCALER_4 0x00000000U /*!< Divider by 4 */ |
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#define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */ |
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#define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */ |
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#define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */ |
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#define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */ |
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#define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */ |
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#define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */ |
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/** |
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* @} |
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*/ |
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/** |
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* @} |
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*/ |
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/* Exported macro ------------------------------------------------------------*/ |
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/** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros |
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* @{ |
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*/ |
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/** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros |
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* @{ |
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*/ |
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/** |
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* @brief Write a value in IWDG register |
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* @param __INSTANCE__ IWDG Instance |
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* @param __REG__ Register to be written |
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* @param __VALUE__ Value to be written in the register |
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* @retval None |
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*/ |
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#define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
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/** |
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* @brief Read a value in IWDG register |
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* @param __INSTANCE__ IWDG Instance |
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* @param __REG__ Register to be read |
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* @retval Register value |
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*/ |
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#define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
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/** |
||||
|
* @} |
||||
|
*/ |
||||
|
|
||||
|
/** |
||||
|
* @} |
||||
|
*/ |
||||
|
|
||||
|
|
||||
|
/* Exported functions --------------------------------------------------------*/ |
||||
|
/** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions |
||||
|
* @{ |
||||
|
*/ |
||||
|
/** @defgroup IWDG_LL_EF_Configuration Configuration |
||||
|
* @{ |
||||
|
*/ |
||||
|
|
||||
|
/** |
||||
|
* @brief Start the Independent Watchdog |
||||
|
* @note Except if the hardware watchdog option is selected |
||||
|
* @rmtoll KR KEY LL_IWDG_Enable |
||||
|
* @param IWDGx IWDG Instance |
||||
|
* @retval None |
||||
|
*/ |
||||
|
__STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx) |
||||
|
{ |
||||
|
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_ENABLE); |
||||
|
} |
||||
|
|
||||
|
/** |
||||
|
* @brief Reloads IWDG counter with value defined in the reload register |
||||
|
* @rmtoll KR KEY LL_IWDG_ReloadCounter |
||||
|
* @param IWDGx IWDG Instance |
||||
|
* @retval None |
||||
|
*/ |
||||
|
__STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx) |
||||
|
{ |
||||
|
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_RELOAD); |
||||
|
} |
||||
|
|
||||
|
/** |
||||
|
* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers |
||||
|
* @rmtoll KR KEY LL_IWDG_EnableWriteAccess |
||||
|
* @param IWDGx IWDG Instance |
||||
|
* @retval None |
||||
|
*/ |
||||
|
__STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx) |
||||
|
{ |
||||
|
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE); |
||||
|
} |
||||
|
|
||||
|
/** |
||||
|
* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers |
||||
|
* @rmtoll KR KEY LL_IWDG_DisableWriteAccess |
||||
|
* @param IWDGx IWDG Instance |
||||
|
* @retval None |
||||
|
*/ |
||||
|
__STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx) |
||||
|
{ |
||||
|
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE); |
||||
|
} |
||||
|
|
||||
|
/** |
||||
|
* @brief Select the prescaler of the IWDG |
||||
|
* @rmtoll PR PR LL_IWDG_SetPrescaler |
||||
|
* @param IWDGx IWDG Instance |
||||
|
* @param Prescaler This parameter can be one of the following values: |
||||
|
* @arg @ref LL_IWDG_PRESCALER_4 |
||||
|
* @arg @ref LL_IWDG_PRESCALER_8 |
||||
|
* @arg @ref LL_IWDG_PRESCALER_16 |
||||
|
* @arg @ref LL_IWDG_PRESCALER_32 |
||||
|
* @arg @ref LL_IWDG_PRESCALER_64 |
||||
|
* @arg @ref LL_IWDG_PRESCALER_128 |
||||
|
* @arg @ref LL_IWDG_PRESCALER_256 |
||||
|
* @retval None |
||||
|
*/ |
||||
|
__STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler) |
||||
|
{ |
||||
|
WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler); |
||||
|
} |
||||
|
|
||||
|
/** |
||||
|
* @brief Get the selected prescaler of the IWDG |
||||
|
* @rmtoll PR PR LL_IWDG_GetPrescaler |
||||
|
* @param IWDGx IWDG Instance |
||||
|
* @retval Returned value can be one of the following values: |
||||
|
* @arg @ref LL_IWDG_PRESCALER_4 |
||||
|
* @arg @ref LL_IWDG_PRESCALER_8 |
||||
|
* @arg @ref LL_IWDG_PRESCALER_16 |
||||
|
* @arg @ref LL_IWDG_PRESCALER_32 |
||||
|
* @arg @ref LL_IWDG_PRESCALER_64 |
||||
|
* @arg @ref LL_IWDG_PRESCALER_128 |
||||
|
* @arg @ref LL_IWDG_PRESCALER_256 |
||||
|
*/ |
||||
|
__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx) |
||||
|
{ |
||||
|
return (READ_REG(IWDGx->PR)); |
||||
|
} |
||||
|
|
||||
|
/** |
||||
|
* @brief Specify the IWDG down-counter reload value |
||||
|
* @rmtoll RLR RL LL_IWDG_SetReloadCounter |
||||
|
* @param IWDGx IWDG Instance |
||||
|
* @param Counter Value between Min_Data=0 and Max_Data=0x0FFF |
||||
|
* @retval None |
||||
|
*/ |
||||
|
__STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter) |
||||
|
{ |
||||
|
WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter); |
||||
|
} |
||||
|
|
||||
|
/** |
||||
|
* @brief Get the specified IWDG down-counter reload value |
||||
|
* @rmtoll RLR RL LL_IWDG_GetReloadCounter |
||||
|
* @param IWDGx IWDG Instance |
||||
|
* @retval Value between Min_Data=0 and Max_Data=0x0FFF |
||||
|
*/ |
||||
|
__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx) |
||||
|
{ |
||||
|
return (READ_REG(IWDGx->RLR)); |
||||
|
} |
||||
|
|
||||
|
/** |
||||
|
* @} |
||||
|
*/ |
||||
|
|
||||
|
/** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management |
||||
|
* @{ |
||||
|
*/ |
||||
|
|
||||
|
/** |
||||
|
* @brief Check if flag Prescaler Value Update is set or not |
||||
|
* @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU |
||||
|
* @param IWDGx IWDG Instance |
||||
|
* @retval State of bit (1 or 0). |
||||
|
*/ |
||||
|
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx) |
||||
|
{ |
||||
|
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL); |
||||
|
} |
||||
|
|
||||
|
/** |
||||
|
* @brief Check if flag Reload Value Update is set or not |
||||
|
* @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU |
||||
|
* @param IWDGx IWDG Instance |
||||
|
* @retval State of bit (1 or 0). |
||||
|
*/ |
||||
|
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx) |
||||
|
{ |
||||
|
return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL); |
||||
|
} |
||||
|
|
||||
|
/** |
||||
|
* @brief Check if flags Prescaler & Reload Value Update are reset or not |
||||
|
* @rmtoll SR PVU LL_IWDG_IsReady\n |
||||
|
* SR RVU LL_IWDG_IsReady |
||||
|
* @param IWDGx IWDG Instance |
||||
|
* @retval State of bits (1 or 0). |
||||
|
*/ |
||||
|
__STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx) |
||||
|
{ |
||||
|
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU) == 0U) ? 1UL : 0UL); |
||||
|
} |
||||
|
|
||||
|
/** |
||||
|
* @} |
||||
|
*/ |
||||
|
|
||||
|
/** |
||||
|
* @} |
||||
|
*/ |
||||
|
|
||||
|
/** |
||||
|
* @} |
||||
|
*/ |
||||
|
|
||||
|
#endif /* IWDG */ |
||||
|
|
||||
|
/** |
||||
|
* @} |
||||
|
*/ |
||||
|
|
||||
|
#ifdef __cplusplus |
||||
|
} |
||||
|
#endif |
||||
|
|
||||
|
#endif /* STM32F4xx_LL_IWDG_H */ |
||||
@ -0,0 +1,262 @@ |
|||||
|
/** |
||||
|
****************************************************************************** |
||||
|
* @file stm32f4xx_hal_iwdg.c |
||||
|
* @author MCD Application Team |
||||
|
* @brief IWDG HAL module driver. |
||||
|
* This file provides firmware functions to manage the following |
||||
|
* functionalities of the Independent Watchdog (IWDG) peripheral: |
||||
|
* + Initialization and Start functions |
||||
|
* + IO operation functions |
||||
|
* |
||||
|
****************************************************************************** |
||||
|
* @attention |
||||
|
* |
||||
|
* Copyright (c) 2016 STMicroelectronics. |
||||
|
* All rights reserved. |
||||
|
* |
||||
|
* This software is licensed under terms that can be found in the LICENSE file |
||||
|
* in the root directory of this software component. |
||||
|
* If no LICENSE file comes with this software, it is provided AS-IS. |
||||
|
* |
||||
|
****************************************************************************** |
||||
|
@verbatim |
||||
|
============================================================================== |
||||
|
##### IWDG Generic features ##### |
||||
|
============================================================================== |
||||
|
[..] |
||||
|
(+) The IWDG can be started by either software or hardware (configurable |
||||
|
through option byte). |
||||
|
|
||||
|
(+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays |
||||
|
active even if the main clock fails. |
||||
|
|
||||
|
(+) Once the IWDG is started, the LSI is forced ON and both cannot be |
||||
|
disabled. The counter starts counting down from the reset value (0xFFF). |
||||
|
When it reaches the end of count value (0x000) a reset signal is |
||||
|
generated (IWDG reset). |
||||
|
|
||||
|
(+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register, |
||||
|
the IWDG_RLR value is reloaded into the counter and the watchdog reset |
||||
|
is prevented. |
||||
|
|
||||
|
(+) The IWDG is implemented in the VDD voltage domain that is still functional |
||||
|
in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY). |
||||
|
IWDGRST flag in RCC_CSR register can be used to inform when an IWDG |
||||
|
reset occurs. |
||||
|
|
||||
|
(+) Debug mode: When the microcontroller enters debug mode (core halted), |
||||
|
the IWDG counter either continues to work normally or stops, depending |
||||
|
on DBG_IWDG_STOP configuration bit in DBG module, accessible through |
||||
|
__HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros. |
||||
|
|
||||
|
[..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s |
||||
|
The IWDG timeout may vary due to LSI clock frequency dispersion. |
||||
|
STM32F4xx devices provide the capability to measure the LSI clock |
||||
|
frequency (LSI clock is internally connected to TIM5 CH4 input capture). |
||||
|
The measured value can be used to have an IWDG timeout with an |
||||
|
acceptable accuracy. |
||||
|
|
||||
|
[..] Default timeout value (necessary for IWDG_SR status register update): |
||||
|
Constant LSI_VALUE is defined based on the nominal LSI clock frequency. |
||||
|
This frequency being subject to variations as mentioned above, the |
||||
|
default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT |
||||
|
below) may become too short or too long. |
||||
|
In such cases, this default timeout value can be tuned by redefining |
||||
|
the constant LSI_VALUE at user-application level (based, for instance, |
||||
|
on the measured LSI clock frequency as explained above). |
||||
|
|
||||
|
##### How to use this driver ##### |
||||
|
============================================================================== |
||||
|
[..] |
||||
|
(#) Use IWDG using HAL_IWDG_Init() function to : |
||||
|
(++) Enable instance by writing Start keyword in IWDG_KEY register. LSI |
||||
|
clock is forced ON and IWDG counter starts counting down. |
||||
|
(++) Enable write access to configuration registers: |
||||
|
IWDG_PR and IWDG_RLR. |
||||
|
(++) Configure the IWDG prescaler and counter reload value. This reload |
||||
|
value will be loaded in the IWDG counter each time the watchdog is |
||||
|
reloaded, then the IWDG will start counting down from this value. |
||||
|
(++) Wait for status flags to be reset. |
||||
|
|
||||
|
(#) Then the application program must refresh the IWDG counter at regular |
||||
|
intervals during normal operation to prevent an MCU reset, using |
||||
|
HAL_IWDG_Refresh() function. |
||||
|
|
||||
|
*** IWDG HAL driver macros list *** |
||||
|
==================================== |
||||
|
[..] |
||||
|
Below the list of most used macros in IWDG HAL driver: |
||||
|
(+) __HAL_IWDG_START: Enable the IWDG peripheral |
||||
|
(+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in |
||||
|
the reload register |
||||
|
|
||||
|
@endverbatim |
||||
|
*/ |
||||
|
|
||||
|
/* Includes ------------------------------------------------------------------*/ |
||||
|
#include "stm32f4xx_hal.h" |
||||
|
|
||||
|
/** @addtogroup STM32F4xx_HAL_Driver |
||||
|
* @{ |
||||
|
*/ |
||||
|
|
||||
|
#ifdef HAL_IWDG_MODULE_ENABLED |
||||
|
/** @addtogroup IWDG |
||||
|
* @brief IWDG HAL module driver. |
||||
|
* @{ |
||||
|
*/ |
||||
|
|
||||
|
/* Private typedef -----------------------------------------------------------*/ |
||||
|
/* Private define ------------------------------------------------------------*/ |
||||
|
/** @defgroup IWDG_Private_Defines IWDG Private Defines |
||||
|
* @{ |
||||
|
*/ |
||||
|
/* Status register needs up to 5 LSI clock periods divided by the clock |
||||
|
prescaler to be updated. The number of LSI clock periods is upper-rounded to |
||||
|
6 for the timeout value calculation. |
||||
|
The timeout value is calculated using the highest prescaler (256) and |
||||
|
the LSI_VALUE constant. The value of this constant can be changed by the user |
||||
|
to take into account possible LSI clock period variations. |
||||
|
The timeout value is multiplied by 1000 to be converted in milliseconds. |
||||
|
LSI startup time is also considered here by adding LSI_STARTUP_TIME |
||||
|
converted in milliseconds. */ |
||||
|
#define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / LSI_VALUE) + ((LSI_STARTUP_TIME / 1000UL) + 1UL)) |
||||
|
#define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_RVU | IWDG_SR_PVU) |
||||
|
/** |
||||
|
* @} |
||||
|
*/ |
||||
|
|
||||
|
/* Private macro -------------------------------------------------------------*/ |
||||
|
/* Private variables ---------------------------------------------------------*/ |
||||
|
/* Private function prototypes -----------------------------------------------*/ |
||||
|
/* Exported functions --------------------------------------------------------*/ |
||||
|
|
||||
|
/** @addtogroup IWDG_Exported_Functions |
||||
|
* @{ |
||||
|
*/ |
||||
|
|
||||
|
/** @addtogroup IWDG_Exported_Functions_Group1 |
||||
|
* @brief Initialization and Start functions. |
||||
|
* |
||||
|
@verbatim |
||||
|
=============================================================================== |
||||
|
##### Initialization and Start functions ##### |
||||
|
=============================================================================== |
||||
|
[..] This section provides functions allowing to: |
||||
|
(+) Initialize the IWDG according to the specified parameters in the |
||||
|
IWDG_InitTypeDef of associated handle. |
||||
|
(+) Once initialization is performed in HAL_IWDG_Init function, Watchdog |
||||
|
is reloaded in order to exit function with correct time base. |
||||
|
|
||||
|
@endverbatim |
||||
|
* @{ |
||||
|
*/ |
||||
|
|
||||
|
/** |
||||
|
* @brief Initialize the IWDG according to the specified parameters in the |
||||
|
* IWDG_InitTypeDef and start watchdog. Before exiting function, |
||||
|
* watchdog is refreshed in order to have correct time base. |
||||
|
* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains |
||||
|
* the configuration information for the specified IWDG module. |
||||
|
* @retval HAL status |
||||
|
*/ |
||||
|
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg) |
||||
|
{ |
||||
|
uint32_t tickstart; |
||||
|
|
||||
|
/* Check the IWDG handle allocation */ |
||||
|
if (hiwdg == NULL) |
||||
|
{ |
||||
|
return HAL_ERROR; |
||||
|
} |
||||
|
|
||||
|
/* Check the parameters */ |
||||
|
assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance)); |
||||
|
assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler)); |
||||
|
assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload)); |
||||
|
|
||||
|
/* Enable IWDG. LSI is turned on automatically */ |
||||
|
__HAL_IWDG_START(hiwdg); |
||||
|
|
||||
|
/* Enable write access to IWDG_PR and IWDG_RLR registers by writing |
||||
|
0x5555 in KR */ |
||||
|
IWDG_ENABLE_WRITE_ACCESS(hiwdg); |
||||
|
|
||||
|
/* Write to IWDG registers the Prescaler & Reload values to work with */ |
||||
|
hiwdg->Instance->PR = hiwdg->Init.Prescaler; |
||||
|
hiwdg->Instance->RLR = hiwdg->Init.Reload; |
||||
|
|
||||
|
/* Check pending flag, if previous update not done, return timeout */ |
||||
|
tickstart = HAL_GetTick(); |
||||
|
|
||||
|
/* Wait for register to be updated */ |
||||
|
while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u) |
||||
|
{ |
||||
|
if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT) |
||||
|
{ |
||||
|
if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u) |
||||
|
{ |
||||
|
return HAL_TIMEOUT; |
||||
|
} |
||||
|
} |
||||
|
} |
||||
|
|
||||
|
/* Reload IWDG counter with value defined in the reload register */ |
||||
|
__HAL_IWDG_RELOAD_COUNTER(hiwdg); |
||||
|
|
||||
|
/* Return function status */ |
||||
|
return HAL_OK; |
||||
|
} |
||||
|
|
||||
|
|
||||
|
/** |
||||
|
* @} |
||||
|
*/ |
||||
|
|
||||
|
|
||||
|
/** @addtogroup IWDG_Exported_Functions_Group2 |
||||
|
* @brief IO operation functions |
||||
|
* |
||||
|
@verbatim |
||||
|
=============================================================================== |
||||
|
##### IO operation functions ##### |
||||
|
=============================================================================== |
||||
|
[..] This section provides functions allowing to: |
||||
|
(+) Refresh the IWDG. |
||||
|
|
||||
|
@endverbatim |
||||
|
* @{ |
||||
|
*/ |
||||
|
|
||||
|
/** |
||||
|
* @brief Refresh the IWDG. |
||||
|
* @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains |
||||
|
* the configuration information for the specified IWDG module. |
||||
|
* @retval HAL status |
||||
|
*/ |
||||
|
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg) |
||||
|
{ |
||||
|
/* Reload IWDG counter with value defined in the reload register */ |
||||
|
__HAL_IWDG_RELOAD_COUNTER(hiwdg); |
||||
|
|
||||
|
/* Return function status */ |
||||
|
return HAL_OK; |
||||
|
} |
||||
|
|
||||
|
|
||||
|
/** |
||||
|
* @} |
||||
|
*/ |
||||
|
|
||||
|
/** |
||||
|
* @} |
||||
|
*/ |
||||
|
|
||||
|
#endif /* HAL_IWDG_MODULE_ENABLED */ |
||||
|
/** |
||||
|
* @} |
||||
|
*/ |
||||
|
|
||||
|
/** |
||||
|
* @} |
||||
|
*/ |
||||
@ -1 +1 @@ |
|||||
Subproject commit 702ffbcb82fa62e2cef6621ac49ede8f913273c8 |
|
||||
|
Subproject commit efbd4c31b82554530300d3104c0e14f2b5e7f581 |
||||
@ -1,48 +1,180 @@ |
|||||
#include "hardware.hpp"
|
#include "hardware.hpp"
|
||||
|
|
||||
|
#include "adc.h"
|
||||
|
#include "tim.h"
|
||||
|
#include "zsdk/hmp110/hmp110.hpp"
|
||||
#include "zsdk/zcanreceiver/zcanreceiver.hpp"
|
#include "zsdk/zcanreceiver/zcanreceiver.hpp"
|
||||
#define TAG "PROTO"
|
|
||||
|
#define TAG "HARD"
|
||||
using namespace iflytop; |
using namespace iflytop; |
||||
|
|
||||
/***********************************************************************************************************************
|
/***********************************************************************************************************************
|
||||
* EXT * |
* EXT * |
||||
***********************************************************************************************************************/ |
***********************************************************************************************************************/ |
||||
|
|
||||
|
static osThreadId H2O2CaptureThreadId; |
||||
|
static osThreadId AdcCaptureThreadId; |
||||
|
|
||||
|
// MINI_PWM 鼓风机
|
||||
|
static TIM_HandleTypeDef* m_miniPwmBlower_htim; |
||||
|
static uint32_t m_miniPwmBlower_channle; |
||||
|
static ZGPIO m_miniPwmBlower_enGpio; |
||||
|
static ZGPIO m_miniPwmBlower_fbGpio; |
||||
|
|
||||
|
// 加热片控制
|
||||
|
static ZGPIO m_Heater_ctrlGpio; |
||||
|
static ZGPIO m_Heater_safeCtrlGpio; |
||||
|
static ZADC m_Heater_electricCurrentAdc; |
||||
|
static ZADC m_Heater_temperatureAdc; |
||||
|
|
||||
|
// H2O2过氧化氢
|
||||
|
static ModbusBlockHost m_H2o2Sensor_TempSensorModbusBlockHost; //
|
||||
|
static ZADC m_H2o2Sensor_H2O2Adc; // H2O2传感器控制
|
||||
|
static HMP110 m_H2o2Sensor_HMP110; // H2O2传感器
|
||||
|
static int32_t m_hmp100_detectId = -1; |
||||
|
|
||||
|
static void onAdcCaptureThreadId(void const* argument) { |
||||
|
while (1) { |
||||
|
osDelay(30); |
||||
|
m_Heater_electricCurrentAdc.updateAdcValToCache(); |
||||
|
m_Heater_temperatureAdc.updateAdcValToCache(); |
||||
|
} |
||||
|
} |
||||
|
|
||||
|
static void onH2O2CaptureThreadId(void const* argument) { |
||||
|
while (1) { |
||||
|
osDelay(1000); |
||||
|
if (m_hmp100_detectId > 0) { |
||||
|
m_H2o2Sensor_H2O2Adc.updateAdcValToCache(); |
||||
|
m_H2o2Sensor_HMP110.updateSensorDataAndErrorcode(); |
||||
|
|
||||
|
// float mv = adcv / 4095.0 * 3.3 * 1000;
|
||||
|
// float ma = mv / 150.0;
|
||||
|
// float ppm = (ma - 4) / (20 - 4) * 2000;
|
||||
|
} |
||||
|
} |
||||
|
} |
||||
|
|
||||
void Hardware::init() { |
void Hardware::init() { |
||||
m_motor_spi.init(&MOTOR_SPI); |
|
||||
m_modbusBlockHost.initialize(&huart3); |
|
||||
|
m_miniPwmBlower_htim = &htim3; |
||||
|
m_miniPwmBlower_channle = TIM_CHANNEL_3; |
||||
|
m_miniPwmBlower_enGpio.initAsOutput(PC10, kxs_gpio_nopull, true, false); |
||||
|
m_miniPwmBlower_fbGpio.initAsInput(PC9, kxs_gpio_nopull, kxs_gpio_rising_irq, false); |
||||
|
|
||||
m_sl_mini_ac_ctrl.initAsOutput(PD14, kxs_gpio_nopull, true, false); // m_sl_mini_ac_ctrl
|
|
||||
m_atta_mini_air_compressor_ctrl.initAsOutput(PD15, kxs_gpio_nopull, true, false); // m_atta_mini_air_compressor_ctrl
|
|
||||
|
m_Heater_ctrlGpio.initAsOutput(PC6, kxs_gpio_nopull, true, false); |
||||
|
m_Heater_safeCtrlGpio.initAsOutput(PC7, kxs_gpio_nopull, true, false); |
||||
|
// m_Heater_electricCurrentAdc.initialize(&hadc1, ADC_CHANNEL_0); //暂时注释掉，板子少了一个ADC，该ADC用于H2O2浓度
|
||||
|
m_Heater_temperatureAdc.initialize(&hadc1, ADC_CHANNEL_1); // PA0
|
||||
|
|
||||
m_motor[0].initialize(&m_motor_spi, MOTOR1_ENN, MOTOR1_CSN); |
|
||||
m_motor[0].setIHOLD_IRUN(1, 15, 0); |
|
||||
m_motor[0].setMotorShaft(true); |
|
||||
m_motor[0].setAcceleration(300000); |
|
||||
m_motor[0].setDeceleration(300000); |
|
||||
|
m_H2o2Sensor_TempSensorModbusBlockHost.initialize(&huart2); |
||||
|
m_H2o2Sensor_H2O2Adc.initialize(&hadc1, ADC_CHANNEL_0); // PA0
|
||||
|
m_H2o2Sensor_HMP110.init(&m_H2o2Sensor_TempSensorModbusBlockHost); |
||||
|
|
||||
m_motor[1].initialize(&m_motor_spi, MOTOR2_ENN, MOTOR2_CSN); |
|
||||
m_motor[1].setIHOLD_IRUN(1, 15, 0); |
|
||||
m_motor[1].setMotorShaft(true); |
|
||||
m_motor[1].setAcceleration(300000); |
|
||||
m_motor[1].setDeceleration(300000); |
|
||||
|
/**
|
||||
|
* @brief 探测HMP110 |
||||
|
*/ |
||||
|
osDelay(2000); // 等待传感器上电
|
||||
|
if (m_H2o2Sensor_HMP110.ping(1)) { |
||||
|
m_hmp100_detectId = 1; |
||||
|
} |
||||
|
if (m_H2o2Sensor_HMP110.ping(240)) { |
||||
|
m_hmp100_detectId = 240; |
||||
|
} |
||||
|
m_H2o2Sensor_HMP110.setid(m_hmp100_detectId); |
||||
|
ZLOGI(TAG, "H2O2 Sensor detect id: %d", m_hmp100_detectId); |
||||
|
|
||||
int32_t chipv0 = m_motor[0].readChipVERSION(); // 5130:0x11
|
|
||||
int32_t chipv1 = m_motor[1].readChipVERSION(); // 5130:0x11
|
|
||||
// m_motor[0].rotate(500000);
|
|
||||
// m_motor[1].rotate(500000);
|
|
||||
ZLOGI(TAG, "chipv0: %x, chipv1: %x", chipv0, chipv1); |
|
||||
|
osThreadDef(AdcCaptureThread, onAdcCaptureThreadId, osPriorityNormal, 0, 1024); |
||||
|
AdcCaptureThreadId = osThreadCreate(osThread(AdcCaptureThread), NULL); |
||||
|
|
||||
auto gstate0 = m_motor[0].getGState(); |
|
||||
auto gstate1 = m_motor[1].getGState(); |
|
||||
|
osThreadDef(H2O2CaptureThread, onH2O2CaptureThreadId, osPriorityNormal, 0, 1024); |
||||
|
H2O2CaptureThreadId = osThreadCreate(osThread(H2O2CaptureThread), NULL); |
||||
|
} |
||||
|
|
||||
ZLOGI(TAG, "motor0: reset:%d drv_err:%d uv_cp:%d", gstate0.reset, gstate0.drv_err, gstate0.uv_cp); |
|
||||
ZLOGI(TAG, "motor1: reset:%d drv_err:%d uv_cp:%d", gstate1.reset, gstate1.drv_err, gstate1.uv_cp); |
|
||||
|
/***********************************************************************************************************************
|
||||
|
* FUMP_IMPL * |
||||
|
***********************************************************************************************************************/ |
||||
|
void Hardware::mini_pwm_blower_ctrl(int32_t duty) { |
||||
|
duty = 100 - duty; |
||||
|
if (duty < 0) duty = 0; |
||||
|
if (duty > 100) duty = 100; |
||||
|
|
||||
|
TIM_OC_InitTypeDef sConfigOC = {0}; |
||||
|
sConfigOC.OCMode = TIM_OCMODE_PWM1; |
||||
|
sConfigOC.Pulse = duty / 100.0 * __HAL_TIM_GET_AUTORELOAD(m_miniPwmBlower_htim); |
||||
|
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; |
||||
|
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; |
||||
|
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET; |
||||
|
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET; |
||||
|
|
||||
gstate0 = m_motor[0].getGState(); |
|
||||
gstate1 = m_motor[1].getGState(); |
|
||||
|
HAL_TIM_PWM_ConfigChannel(m_miniPwmBlower_htim, &sConfigOC, m_miniPwmBlower_channle); |
||||
|
HAL_TIM_PWM_Stop(m_miniPwmBlower_htim, m_miniPwmBlower_channle); |
||||
|
HAL_TIM_PWM_Start(m_miniPwmBlower_htim, m_miniPwmBlower_channle); |
||||
|
|
||||
ZLOGI(TAG, "motor0: reset:%d drv_err:%d uv_cp:%d", gstate0.reset, gstate0.drv_err, gstate0.uv_cp); |
|
||||
ZLOGI(TAG, "motor1: reset:%d drv_err:%d uv_cp:%d", gstate1.reset, gstate1.drv_err, gstate1.uv_cp); |
|
||||
|
m_miniPwmBlower_enGpio.write(duty != 0); |
||||
|
} |
||||
|
int32_t Hardware::mini_pwm_blower_read_fbcount() { //
|
||||
|
return 0; |
||||
|
} |
||||
|
|
||||
m_pressureSensorBus.init(&m_modbusBlockHost); |
|
||||
|
void Hardware::heater_ctrl(int32_t val) { m_Heater_ctrlGpio.write(val); } |
||||
|
void Hardware::heater_ctrl_safe_valve(int32_t val) { m_Heater_safeCtrlGpio.write(val); } |
||||
|
int32_t Hardware::heater_read_electric_current() { |
||||
|
// float mv = adcv / 4095.0 * 3.3 * 1000;
|
||||
|
// float ma = mv / 150.0;
|
||||
|
int32_t adcv = m_Heater_electricCurrentAdc.getCacheVal(); |
||||
|
int32_t ma = (adcv / 4095.0 * 3.3 * 1000) / 150.0; |
||||
|
return ma; |
||||
|
} |
||||
|
int32_t Hardware::heater_read_temperature_data() { |
||||
|
// float mv = adcv / 4095.0 * 3.3 * 1000;
|
||||
|
// float ma = mv / 150.0;
|
||||
|
// float ppm = (ma - 4) / (20 - 4) * 2000;
|
||||
|
int32_t adcv = m_Heater_temperatureAdc.getCacheVal(); |
||||
|
int32_t ma = (adcv / 4095.0 * 3.3 * 1000) / 150.0; |
||||
|
int32_t temp = (ma - 4) / (20 - 4) * (3000 - 0) + 0; |
||||
|
return temp; // C*10
|
||||
} |
} |
||||
|
|
||||
|
bool Hardware::h2o2_sensor_is_online() { |
||||
|
if (m_hmp100_detectId <= 0) { |
||||
|
return false; |
||||
|
} |
||||
|
int32_t ecode = m_H2o2Sensor_HMP110.read_cache_errorcode(); |
||||
|
if (ecode == -1) { |
||||
|
return false; |
||||
|
} |
||||
|
return true; |
||||
|
} |
||||
|
int32_t Hardware::h2o2_sensor_read_calibration_date(int32_t* year, int32_t* month, int32_t* day) { return 0; } |
||||
|
int32_t Hardware::h2o2_sensor_read_sub_ic_errorcode() { return m_H2o2Sensor_HMP110.read_cache_errorcode(); } |
||||
|
int32_t Hardware::h2o2_sensor_read_sub_ic_reg(int32_t add, uint16_t* val, size_t len) { return m_H2o2Sensor_HMP110.read_reg(add, val, len); } |
||||
|
int32_t Hardware::h2o2_sensor_data(report_h2o2_data_t* readdata) { |
||||
|
int32_t ecode = m_H2o2Sensor_HMP110.read_cache_errorcode(); |
||||
|
int32_t h2o2adcVal = m_H2o2Sensor_H2O2Adc.getCacheVal(); |
||||
|
HMP110::hmp110_sensordata_t sensordata; |
||||
|
m_H2o2Sensor_HMP110.read_cache_sensor_data(&sensordata); |
||||
|
|
||||
|
// float mv = adcv / 4095.0 * 3.3 * 1000;
|
||||
|
// float ma = mv / 150.0;
|
||||
|
// float ppm = (ma - 4) / (20 - 4) * 2000;
|
||||
|
int32_t h2o2ma = (h2o2adcVal / 4095.0 * 3.3 * 1000) / 150.0; |
||||
|
int32_t h2o2ppm = (h2o2ma - 4) / (20 - 4) * 2000; |
||||
|
|
||||
|
readdata->subid = 0; |
||||
|
readdata->sensor_error = ecode != 0; |
||||
|
readdata->h2o2 = h2o2ppm; |
||||
|
readdata->humid = sensordata.rh; |
||||
|
readdata->temp = sensordata.temp; |
||||
|
readdata->saturation = 0; |
||||
|
|
||||
|
ZLOGI(TAG, "ppm:%d, rh:%d, temp:%d, df_ptemp:%d, ah:%d, mr:%d, wbt:%d, eh:%d", //
|
||||
|
h2o2ppm, //
|
||||
|
sensordata.rh, //
|
||||
|
sensordata.temp, //
|
||||
|
sensordata.df_ptemp, //
|
||||
|
sensordata.ah, //
|
||||
|
sensordata.mr, //
|
||||
|
sensordata.wet_bulb_temp, //
|
||||
|
sensordata.enthalpy); |
||||
|
|
||||
|
return 0; |
||||
|
} |
||||
@ -1 +1 @@ |
|||||
Subproject commit 7951cee7dfc612be73f402914c12933ddffe37cc |
|
||||
|
Subproject commit f03f8639e81f3e7e5cbe9fd563503f46e46ddf84 |
||||
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