Browse Source

update

master
zhaohe 2 years ago
parent
commit
4abd8c9978
  1. 47
      chip/chip.c
  2. 120
      chip/chip.h
  3. 4
      chip/delay.h
  4. 16
      components/iflytop_can_slave_v1/iflytop_can_slave.cpp
  5. 11
      components/iflytop_can_slave_v1/iflytop_can_slave.hpp
  6. BIN
      components/m3078/M03078_OEM产品手册_V1.1.4.pdf
  7. 37
      components/m3078/m3078_code_scaner.cpp
  8. 59
      components/m3078/m3078_code_scaner.hpp
  9. 4
      hal/clock.hpp
  10. 1
      hal/critical_context.hpp
  11. 462
      hal/gpio.cpp
  12. 368
      hal/gpio.hpp
  13. 7
      hal/zhal.hpp
  14. 231
      hal/zuart.cpp
  15. 68
      hal/zuart.hpp

47
chip/chip.c

@ -23,3 +23,50 @@ void chip_critical_exit(void) {
__enable_irq();
}
}
GPIO_TypeDef* chip_get_gpio(Pin_t pin) {
int port = pin >> 4;
switch (port) {
case 1:
#ifdef GPIOA
return GPIOA;
#endif
break;
case 2:
#ifdef GPIOB
return GPIOB;
#endif
break;
case 3:
#ifdef GPIOC
return GPIOC;
#endif
break;
case 4:
#ifdef GPIOD
return GPIOD;
#endif
break;
case 5:
#ifdef GPIOE
return GPIOE;
#endif
break;
case 6:
#ifdef GPIOF
return GPIOF;
#endif
break;
case 7:
#ifdef GPIOG
return GPIOG;
#endif
break;
default:
break;
}
return NULL;
}
uint16_t chip_get_pinoff(Pin_t pin) { return (pin & 0xF); }

120
chip/chip.h

@ -120,6 +120,126 @@ extern "C" {
#ifdef HAL_CORTEX_MODULE_ENABLED
#endif
typedef enum {
PA0 = 0x10,
PA1,
PA2,
PA3,
PA4,
PA5,
PA6,
PA7,
PA8,
PA9,
PA10,
PA11,
PA12,
PA13,
PA14,
PA15,
PB0 = 0x20,
PB1,
PB2,
PB3,
PB4,
PB5,
PB6,
PB7,
PB8,
PB9,
PB10,
PB11,
PB12,
PB13,
PB14,
PB15,
PC0 = 0x30,
PC1,
PC2,
PC3,
PC4,
PC5,
PC6,
PC7,
PC8,
PC9,
PC10,
PC11,
PC12,
PC13,
PC14,
PC15,
PD0 = 0x40,
PD1,
PD2,
PD3,
PD4,
PD5,
PD6,
PD7,
PD8,
PD9,
PD10,
PD11,
PD12,
PD13,
PD14,
PD15,
PE0 = 0x50,
PE1,
PE2,
PE3,
PE4,
PE5,
PE6,
PE7,
PE8,
PE9,
PE10,
PE11,
PE12,
PE13,
PE14,
PE15,
PF0 = 0x60,
PF1,
PF2,
PF3,
PF4,
PF5,
PF6,
PF7,
PF8,
PF9,
PF10,
PF11,
PF12,
PF13,
PF14,
PF15,
PG0 = 0x70,
PG1,
PG2,
PG3,
PG4,
PG5,
PG6,
PG7,
PG8,
PG9,
PG10,
PG11,
PG12,
PG13,
PG14,
PG15,
} Pin_t;
// GPIO_TypeDef *gpio, uint16_t pin
GPIO_TypeDef* chip_get_gpio(Pin_t pin);
uint16_t chip_get_pinoff(Pin_t pin);
void chip_critical_enter(void);
void chip_critical_exit(void);

4
chip/delay.h

@ -11,12 +11,12 @@ void chip_delay_us(uint32_t n);
void chip_delay_ms(uint32_t n);
void ifly_delay_ms(uint32_t n);
uint32_t chip_get_ticket();
uint32_t haspassedms(uint32_t ticket);
uint32_t haspassedms2(uint32_t lastticket, uint32_t nowticket);
#define ifly_has_passedms haspassedms
#ifdef __cplusplus
}
#endif

16
components/iflytop_can_slave_v1/iflytop_can_slave.cpp

@ -21,10 +21,9 @@ IflytopCanProtocolStackProcesser::IflytopCanProtocolStackProcesser() {
m_reportSeq = 0;
}
void IflytopCanProtocolStackProcesser::createDefaultConfig(iflytop_can_slave_config_t *config, //
uint16_t deviceId, //
icps::Reg_t *regList, //
uint16_t regListSize) {
IflytopCanProtocolStackProcesser::cfg_t *IflytopCanProtocolStackProcesser::createDefaultConfig(uint16_t deviceId, //
uint16_t regListSize) {
cfg_t *config = (cfg_t *)malloc(sizeof(cfg_t));
config->deviceId = deviceId;
#ifdef STM32F103xB
config->canHandle = &hcan;
@ -35,8 +34,9 @@ void IflytopCanProtocolStackProcesser::createDefaultConfig(iflytop_can_slave_con
config->canFilterIndex1 = 1;
config->maxFilterNum = 7;
config->rxfifoNum = CAN_RX_FIFO0;
config->m_regList = regList;
config->m_regList = (icps::Reg_t *)malloc(sizeof(icps::Reg_t) * regListSize);
config->m_regListSize = regListSize;
return config;
}
icps::Reg_t *IflytopCanProtocolStackProcesser::activeReg(uint16_t mappingAdd, uint16_t mask, int32_t defaultValue) {
int off = -1;
@ -48,12 +48,12 @@ icps::Reg_t *IflytopCanProtocolStackProcesser::activeReg(uint16_t mappingAdd, ui
}
if (off == -1) {
ZLOGE(TAG, "active reg fail, no reg");
while (true) {
}
ZASSERT(false);
return NULL;
}
if (off > m_config->m_regListSize) {
ZLOGE(TAG, "active reg %d fail", off);
ZASSERT(false);
return NULL;
}
memset(&m_config->m_regList[off], 0, sizeof(icps::Reg_t));
@ -73,7 +73,7 @@ void IflytopCanProtocolStackProcesser::disablePermission(int regadd, uint32_t ma
}
}
void IflytopCanProtocolStackProcesser::initialize(iflytop_can_slave_config_t *config) {
void IflytopCanProtocolStackProcesser::initialize(cfg_t *config) {
m_reportSeq = 0;
HAL_StatusTypeDef hal_status;
m_config = config;

11
components/iflytop_can_slave_v1/iflytop_can_slave.hpp

@ -68,7 +68,7 @@ class IflytopCanProtocolStackProcesser : public ZCanIRQListener {
int canFilterIndex1; // 过滤器1 接收,全局广播包
int maxFilterNum; // 使用的过滤器数量,最大值14,默认为7
int rxfifoNum; // 使用的FIFO,默认使用FIFO0
} iflytop_can_slave_config_t;
} cfg_t;
class ReportTask {
public:
uint8_t reportoff;
@ -82,7 +82,7 @@ class IflytopCanProtocolStackProcesser : public ZCanIRQListener {
};
private:
iflytop_can_slave_config_t *m_config; // 配置
cfg_t *m_config; // 配置
// IflytopMicroOS *m_os; // 操作系统相关方法
IflytopCanProtocolStackProcesserListener *m_listener; // 监听者
icps::Reg_t *m_regList; // 寄存器列表
@ -98,16 +98,13 @@ class IflytopCanProtocolStackProcesser : public ZCanIRQListener {
public:
IflytopCanProtocolStackProcesser();
static void createDefaultConfig(iflytop_can_slave_config_t *config, //
uint16_t deviceId, //
icps::Reg_t *regList, //
uint16_t regListSize);
static cfg_t *createDefaultConfig(uint16_t deviceId, uint16_t regListSize);
/**
* @brief
*
* @param deviceId 7ID
*/
void initialize(iflytop_can_slave_config_t *config);
void initialize(cfg_t *config);
icps::Reg_t *activeReg(uint16_t mappingAdd, uint16_t mask, int32_t defaultValue);
void disablePermission(int regadd, uint32_t mask);

BIN
components/m3078/M03078_OEM产品手册_V1.1.4.pdf

37
components/m3078/m3078_code_scaner.cpp

@ -0,0 +1,37 @@
#include "m3078_code_scaner.hpp"
using namespace iflytop;
using namespace std;
void M3078CodeScanner::initialize(UART_HandleTypeDef* huart, Pin_t triggerPin) {
ZUART::cfg_t cfg;
cfg.name = "m3078";
cfg.huart = huart;
cfg.rxbuffersize = 300;
cfg.rxovertime_ms = 10;
m_uart.initialize(&cfg, [this](uint8_t* data, size_t len) {
if (m_onidinfo) m_onidinfo((char*)data);
});
m_triggerGpio.initAsOutput(triggerPin, ZGPIO::kOutput_nopull, false, false);
m_trigger = false;
m_uart.startRxIt();
m_triggerGpio.setState(0);
m_onidinfo = NULL;
}
void M3078CodeScanner::regListener(onidinfo_t listener) { m_onidinfo = listener; }
void M3078CodeScanner::trigger() {
if (!m_trigger) {
m_triggerGpio.setState(0);
chip_delay_ms(3);
}
m_uart.clearRxData();
m_triggerGpio.setState(1);
m_trigger = true;
}
void M3078CodeScanner::stopTrigger() {
m_triggerGpio.setState(0);
m_trigger = false;
}

59
components/m3078/m3078_code_scaner.hpp

@ -0,0 +1,59 @@
//
// Created by zwsd
//
#pragma once
#include "sdk\hal\zhal.hpp"
/**
* @brief
*
* service: M3078
*
* :
* :
* :
* :
*
* :
* 1. :
* 2. :9600
* 3. :
*
*/
namespace iflytop {
using namespace std;
class M3078CodeScanner {
typedef function<void(char* idinfo)> onidinfo_t;
private:
ZGPIO m_triggerGpio;
ZUART m_uart;
bool m_trigger;
onidinfo_t m_onidinfo;
public:
M3078CodeScanner(){};
~M3078CodeScanner(){};
/**
* @brief
*
* @param os
* @param uart
* @param triggerGpio
*
* @
* 1. buffer要大于最大的一帧码的长度
* 2. 10ms
*/
void initialize(UART_HandleTypeDef* huart, Pin_t triggerPin);
void regListener(onidinfo_t listener);
void trigger();
void stopTrigger();
};
} // namespace iflytop

4
hal/clock.hpp

@ -0,0 +1,4 @@
#pragma once
#include <functional>
#include "../chip/iflytop_no_os.h"

1
hal/critical_context.hpp

@ -6,4 +6,5 @@ class CriticalContext {
CriticalContext();
~CriticalContext();
};
#define ZCriticalContext CriticalContext
} // namespace iflytop

462
hal/gpio.cpp

@ -6,8 +6,8 @@ namespace iflytop {
* LISTENER *
*******************************************************************************/
static STM32_GPIO *s_irqGPIO[20];
int s_irqGPIO_num = 0;
static ZGPIO *s_irqGPIO[20];
int s_irqGPIO_num = 0;
extern "C" {
/**
@ -40,8 +40,7 @@ void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) {
}
}
void STM32_GPIO::regListener(STM32_GPIO_LISTENER *listener) { m_listener = listener; }
void ZGPIO::regListener(onirq_t listener) { m_onirq = listener; }
/*******************************************************************************
* GPIOIMPL *
@ -50,7 +49,7 @@ void STM32_GPIO::regListener(STM32_GPIO_LISTENER *listener) { m_listener = liste
/*******************************************************************************
* BASE_FUNC *
*******************************************************************************/
bool STM32_GPIO::enableClock() {
bool ZGPIO::enableClock() {
#ifdef GPIOA
if (m_gpio == GPIOA) {
__HAL_RCC_GPIOA_CLK_ENABLE();
@ -120,7 +119,7 @@ bool STM32_GPIO::enableClock() {
return false;
}
void regIRQGPIO(STM32_GPIO *gpio) {
void regIRQGPIO(ZGPIO *gpio) {
for (int i = 0; i < s_irqGPIO_num; i++) {
if (s_irqGPIO[i] == gpio) {
return;
@ -132,90 +131,94 @@ void regIRQGPIO(STM32_GPIO *gpio) {
s_irqGPIO_num++;
}
bool STM32_GPIO::isMirror() { return m_mirror; }
bool ZGPIO::isMirror() { return m_mirror; }
void ZGPIO::initAsInput(Pin_t pin, GPIOMode_t mode, GPIOIrqType_t irqtype, bool mirror) {
m_mirror = mirror;
m_mode = mode;
m_irqtype = irqtype;
m_gpiotype = kInput;
void STM32_GPIO::initAsOutput(GPIOMode_t gpiomode, bool mirror, bool initLevel) {
ZASSERT(gpiomode == kOutput_nopull || gpiomode == kOutput_pullup || gpiomode == kOutput_pulldown || gpiomode == kOutput_od);
init(gpiomode, mirror, initLevel);
}
void STM32_GPIO::initAsOutput(bool initLevel) { initAsOutput(kOutput_nopull, false, initLevel); }
m_gpio = chip_get_gpio(pin);
m_pinoff = chip_get_pinoff(pin);
enableClock();
GPIO_InitTypeDef m_GPIO_InitStruct = {0};
if (m_irqtype == kIRQ_noIrq) {
m_GPIO_InitStruct.Pin = m_pinoff;
m_GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
m_GPIO_InitStruct.Pull = 0;
m_GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
} else if (m_irqtype == kIRQ_risingIrq) {
m_GPIO_InitStruct.Pin = m_pinoff;
m_GPIO_InitStruct.Mode = m_mirror ? GPIO_MODE_IT_FALLING : GPIO_MODE_IT_RISING;
m_GPIO_InitStruct.Pull = 0;
m_GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
} else if (m_irqtype == kIRQ_fallingIrq) {
m_GPIO_InitStruct.Pin = m_pinoff;
m_GPIO_InitStruct.Mode = !m_mirror ? GPIO_MODE_IT_FALLING : GPIO_MODE_IT_RISING;
m_GPIO_InitStruct.Pull = 0;
m_GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
} else if (m_irqtype == kIRQ_risingAndFallingIrq) {
m_GPIO_InitStruct.Pin = m_pinoff;
m_GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING;
m_GPIO_InitStruct.Pull = 0;
m_GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
}
void STM32_GPIO::initAsInput(GPIOMode_t gpiomode, bool mirror) {
ZASSERT(gpiomode == kInput_noIrq || gpiomode == kInput_risingIrq || gpiomode == kInput_fallingIrq || gpiomode == kInput_risingAndFallingIrq);
init(gpiomode, mirror, false);
HAL_GPIO_Init(m_gpio, &m_GPIO_InitStruct);
if (m_irqtype != kIRQ_noIrq) {
regIRQGPIO(this);
lastLevel = getState();
HAL_NVIC_SetPriority(getEXTIIRQn(), 0, 0);
HAL_NVIC_EnableIRQ(getEXTIIRQn());
}
return;
}
void STM32_GPIO::initAsInput() { initAsInput(kInput_noIrq, false); }
void ZGPIO::initAsOutput(Pin_t pin, GPIOMode_t mode, bool mirror, bool initLevel) {
m_mirror = mirror;
m_mode = mode;
m_irqtype = kIRQ_noIrq;
m_gpiotype = kOutput;
void STM32_GPIO::initAsMirrorInput() { init(kInput_noIrq, true, false); }
m_gpio = chip_get_gpio(pin);
m_pinoff = chip_get_pinoff(pin);
void STM32_GPIO::init(GPIOMode_t gpiomode, bool mirror, bool initLevel) {
m_mirror = mirror;
m_mode = gpiomode;
enableClock();
GPIO_InitTypeDef m_GPIO_InitStruct = {0};
initLevel = m_mirror ? !initLevel : initLevel;
GPIO_PinState pinState = initLevel ? GPIO_PIN_SET : GPIO_PIN_RESET;
initLevel = m_mirror ? !initLevel : initLevel;
GPIO_PinState pinState = initLevel ? GPIO_PIN_SET : GPIO_PIN_RESET;
if (m_mode == kOutput_nopull || m_mode == kOutput_pullup || m_mode == kOutput_pulldown || m_mode == kOutput_od) {
HAL_GPIO_WritePin(m_gpio, m_pin, pinState);
HAL_GPIO_WritePin(m_gpio, m_pinoff, pinState);
}
if (m_mode == kOutput_nopull) {
m_GPIO_InitStruct.Pin = m_pin;
m_GPIO_InitStruct.Pin = m_pinoff;
m_GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
m_GPIO_InitStruct.Pull = GPIO_NOPULL;
m_GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
} else if (m_mode == kOutput_pullup) {
m_GPIO_InitStruct.Pin = m_pin;
m_GPIO_InitStruct.Pin = m_pinoff;
m_GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
m_GPIO_InitStruct.Pull = GPIO_PULLUP;
m_GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
} else if (m_mode == kOutput_pulldown) {
m_GPIO_InitStruct.Pin = m_pin;
m_GPIO_InitStruct.Pin = m_pinoff;
m_GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
m_GPIO_InitStruct.Pull = GPIO_PULLDOWN;
m_GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
} else if (m_mode == kOutput_od) {
m_GPIO_InitStruct.Pin = m_pin;
m_GPIO_InitStruct.Pin = m_pinoff;
m_GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
m_GPIO_InitStruct.Pull = 0;
m_GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
} else if (m_mode == kInput_noIrq) {
m_GPIO_InitStruct.Pin = m_pin;
m_GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
m_GPIO_InitStruct.Pull = 0;
m_GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
} else if (m_mode == kInput_risingIrq) {
m_GPIO_InitStruct.Pin = m_pin;
m_GPIO_InitStruct.Mode = m_mirror ? GPIO_MODE_IT_FALLING : GPIO_MODE_IT_RISING;
m_GPIO_InitStruct.Pull = 0;
m_GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
} else if (m_mode == kInput_fallingIrq) {
m_GPIO_InitStruct.Pin = m_pin;
m_GPIO_InitStruct.Mode = !m_mirror ? GPIO_MODE_IT_FALLING : GPIO_MODE_IT_RISING;
m_GPIO_InitStruct.Pull = 0;
m_GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
} else if (m_mode == kInput_risingAndFallingIrq) {
m_GPIO_InitStruct.Pin = m_pin;
m_GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING;
m_GPIO_InitStruct.Pull = 0;
m_GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
}
HAL_GPIO_Init(m_gpio, &m_GPIO_InitStruct);
if (m_mode == kInput_risingIrq || m_mode == kInput_fallingIrq || m_mode == kInput_risingAndFallingIrq) {
regIRQGPIO(this);
lastLevel = getState();
HAL_NVIC_SetPriority(getEXTIIRQn(), 0, 0);
HAL_NVIC_EnableIRQ(getEXTIIRQn());
}
return;
}
bool STM32_GPIO::isItRisingEXITGPIO() { return m_mode == kInput_risingIrq; }
bool STM32_GPIO::isItFallingEXITGPIO() { return m_mode == kInput_fallingIrq; }
bool STM32_GPIO::isItRisingAndItFallingEXITGPIO() { return m_mode == kInput_risingAndFallingIrq; }
bool ZGPIO::isItRisingEXITGPIO() { return m_irqtype == kIRQ_risingIrq; }
bool ZGPIO::isItFallingEXITGPIO() { return m_irqtype == kIRQ_fallingIrq; }
bool ZGPIO::isItRisingAndItFallingEXITGPIO() { return m_irqtype == kIRQ_risingAndFallingIrq; }
/*******************************************************************************
* EXT FUNC *
@ -235,10 +238,10 @@ bool STM32_GPIO::isItRisingAndItFallingEXITGPIO() { return m_mode == kInput_risi
* GPIO_MODE_IT_RISING GPIO_MODE_IT_FALLING
* GPIO_MODE_IT_RISING_FALLING true
*/
bool STM32_GPIO::tryTriggerIRQ(uint16_t GPIO_Pin) {
bool ZGPIO::tryTriggerIRQ(uint16_t GPIO_Pin) {
bool ret = false;
bool nostate = false;
if (GPIO_Pin != m_pin) return false;
if (GPIO_Pin != m_pinoff) return false;
if (!(isItRisingEXITGPIO() || isItFallingEXITGPIO() || isItRisingAndItFallingEXITGPIO())) {
return false;
}
@ -248,25 +251,25 @@ bool STM32_GPIO::tryTriggerIRQ(uint16_t GPIO_Pin) {
if (isItRisingEXITGPIO()) {
if (nostate) {
ret = true;
if (m_listener) {
m_listener->STM32_GPIO_onIRQ(this, kRisingIrqEvent);
if (m_onirq) {
m_onirq(this, kRisingIrqEvent);
}
}
} else if (isItFallingEXITGPIO()) {
if (!nostate) {
ret = true;
if (m_listener) {
m_listener->STM32_GPIO_onIRQ(this, kFallingIrqEvent);
if (m_onirq) {
m_onirq(this, kFallingIrqEvent);
}
}
} else {
if (lastLevel != nostate) {
ret = true;
if (m_listener) {
if (m_onirq) {
if (lastLevel)
m_listener->STM32_GPIO_onIRQ(this, kRisingIrqEvent);
m_onirq(this, kRisingIrqEvent);
else
m_listener->STM32_GPIO_onIRQ(this, kFallingIrqEvent);
m_onirq(this, kFallingIrqEvent);
}
}
}
@ -275,17 +278,17 @@ bool STM32_GPIO::tryTriggerIRQ(uint16_t GPIO_Pin) {
return ret;
}
void STM32_GPIO::toggleState() { HAL_GPIO_TogglePin(m_gpio, m_pin); }
uint32_t STM32_GPIO::getStateUint32() {
void ZGPIO::toggleState() { HAL_GPIO_TogglePin(m_gpio, m_pinoff); }
uint32_t ZGPIO::getStateUint32() {
if (getState())
return 1;
else
return 0;
}
bool STM32_GPIO::getState() {
bool ZGPIO::getState() {
bool ret = false;
if (HAL_GPIO_ReadPin(m_gpio, m_pin) == GPIO_PIN_SET) {
if (HAL_GPIO_ReadPin(m_gpio, m_pinoff) == GPIO_PIN_SET) {
ret = true;
} else {
ret = false;
@ -293,17 +296,17 @@ bool STM32_GPIO::getState() {
if (m_mirror) ret = !ret;
return ret;
}
bool STM32_GPIO::setState(bool state) {
bool ZGPIO::setState(bool state) {
if (m_mirror) state = !state;
if (state) {
HAL_GPIO_WritePin(m_gpio, m_pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(m_gpio, m_pinoff, GPIO_PIN_SET);
} else {
HAL_GPIO_WritePin(m_gpio, m_pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(m_gpio, m_pinoff, GPIO_PIN_RESET);
}
return true;
}
IRQn_Type STM32_GPIO::getEXTIIRQn() {
switch (m_pin) {
IRQn_Type ZGPIO::getEXTIIRQn() {
switch (m_pinoff) {
case GPIO_PIN_0:
return EXTI0_IRQn;
case GPIO_PIN_1:
@ -341,309 +344,4 @@ IRQn_Type STM32_GPIO::getEXTIIRQn() {
* @return false
*/
#ifdef GPIOA
#ifdef GPIO_PIN_0
STM32_GPIO PA0("PA0", GPIOA, GPIO_PIN_0);
#endif
#ifdef GPIO_PIN_1
STM32_GPIO PA1("PA1", GPIOA, GPIO_PIN_1);
#endif
#ifdef GPIO_PIN_2
STM32_GPIO PA2("PA2", GPIOA, GPIO_PIN_2);
#endif
#ifdef GPIO_PIN_3
STM32_GPIO PA3("PA3", GPIOA, GPIO_PIN_3);
#endif
#ifdef GPIO_PIN_4
STM32_GPIO PA4("PA4", GPIOA, GPIO_PIN_4);
#endif
#ifdef GPIO_PIN_5
STM32_GPIO PA5("PA5", GPIOA, GPIO_PIN_5);
#endif
#ifdef GPIO_PIN_6
STM32_GPIO PA6("PA6", GPIOA, GPIO_PIN_6);
#endif
#ifdef GPIO_PIN_7
STM32_GPIO PA7("PA7", GPIOA, GPIO_PIN_7);
#endif
#ifdef GPIO_PIN_8
STM32_GPIO PA8("PA8", GPIOA, GPIO_PIN_8);
#endif
#ifdef GPIO_PIN_9
STM32_GPIO PA9("PA9", GPIOA, GPIO_PIN_9);
#endif
#ifdef GPIO_PIN_10
STM32_GPIO PA10("PA10", GPIOA, GPIO_PIN_10);
#endif
#ifdef GPIO_PIN_11
STM32_GPIO PA11("PA11", GPIOA, GPIO_PIN_11);
#endif
#ifdef GPIO_PIN_12
STM32_GPIO PA12("PA12", GPIOA, GPIO_PIN_12);
#endif
#ifdef GPIO_PIN_13
STM32_GPIO PA13("PA13", GPIOA, GPIO_PIN_13);
#endif
#ifdef GPIO_PIN_14
STM32_GPIO PA14("PA14", GPIOA, GPIO_PIN_14);
#endif
#ifdef GPIO_PIN_15
STM32_GPIO PA15("PA15", GPIOA, GPIO_PIN_15);
#endif
#endif
#ifdef GPIOB
#ifdef GPIO_PIN_0
STM32_GPIO PB0("PB0", GPIOB, GPIO_PIN_0);
#endif
#ifdef GPIO_PIN_1
STM32_GPIO PB1("PB1", GPIOB, GPIO_PIN_1);
#endif
#ifdef GPIO_PIN_2
STM32_GPIO PB2("PB2", GPIOB, GPIO_PIN_2);
#endif
#ifdef GPIO_PIN_3
STM32_GPIO PB3("PB3", GPIOB, GPIO_PIN_3);
#endif
#ifdef GPIO_PIN_4
STM32_GPIO PB4("PB4", GPIOB, GPIO_PIN_4);
#endif
#ifdef GPIO_PIN_5
STM32_GPIO PB5("PB5", GPIOB, GPIO_PIN_5);
#endif
#ifdef GPIO_PIN_6
STM32_GPIO PB6("PB6", GPIOB, GPIO_PIN_6);
#endif
#ifdef GPIO_PIN_7
STM32_GPIO PB7("PB7", GPIOB, GPIO_PIN_7);
#endif
#ifdef GPIO_PIN_8
STM32_GPIO PB8("PB8", GPIOB, GPIO_PIN_8);
#endif
#ifdef GPIO_PIN_9
STM32_GPIO PB9("PB9", GPIOB, GPIO_PIN_9);
#endif
#ifdef GPIO_PIN_10
STM32_GPIO PB10("PB10", GPIOB, GPIO_PIN_10);
#endif
#ifdef GPIO_PIN_11
STM32_GPIO PB11("PB11", GPIOB, GPIO_PIN_11);
#endif
#ifdef GPIO_PIN_12
STM32_GPIO PB12("PB12", GPIOB, GPIO_PIN_12);
#endif
#ifdef GPIO_PIN_13
STM32_GPIO PB13("PB13", GPIOB, GPIO_PIN_13);
#endif
#ifdef GPIO_PIN_14
STM32_GPIO PB14("PB14", GPIOB, GPIO_PIN_14);
#endif
#ifdef GPIO_PIN_15
STM32_GPIO PB15("PB15", GPIOB, GPIO_PIN_15);
#endif
#endif
#ifdef GPIOC
#ifdef GPIO_PIN_0
STM32_GPIO PC0("PC0", GPIOC, GPIO_PIN_0);
#endif
#ifdef GPIO_PIN_1
STM32_GPIO PC1("PC1", GPIOC, GPIO_PIN_1);
#endif
#ifdef GPIO_PIN_2
STM32_GPIO PC2("PC2", GPIOC, GPIO_PIN_2);
#endif
#ifdef GPIO_PIN_3
STM32_GPIO PC3("PC3", GPIOC, GPIO_PIN_3);
#endif
#ifdef GPIO_PIN_4
STM32_GPIO PC4("PC4", GPIOC, GPIO_PIN_4);
#endif
#ifdef GPIO_PIN_5
STM32_GPIO PC5("PC5", GPIOC, GPIO_PIN_5);
#endif
#ifdef GPIO_PIN_6
STM32_GPIO PC6("PC6", GPIOC, GPIO_PIN_6);
#endif
#ifdef GPIO_PIN_7
STM32_GPIO PC7("PC7", GPIOC, GPIO_PIN_7);
#endif
#ifdef GPIO_PIN_8
STM32_GPIO PC8("PC8", GPIOC, GPIO_PIN_8);
#endif
#ifdef GPIO_PIN_9
STM32_GPIO PC9("PC9", GPIOC, GPIO_PIN_9);
#endif
#ifdef GPIO_PIN_10
STM32_GPIO PC10("PC10", GPIOC, GPIO_PIN_10);
#endif
#ifdef GPIO_PIN_11
STM32_GPIO PC11("PC11", GPIOC, GPIO_PIN_11);
#endif
#ifdef GPIO_PIN_12
STM32_GPIO PC12("PC12", GPIOC, GPIO_PIN_12);
#endif
#ifdef GPIO_PIN_13
STM32_GPIO PC13("PC13", GPIOC, GPIO_PIN_13);
#endif
#ifdef GPIO_PIN_14
STM32_GPIO PC14("PC14", GPIOC, GPIO_PIN_14);
#endif
#ifdef GPIO_PIN_15
STM32_GPIO PC15("PC15", GPIOC, GPIO_PIN_15);
#endif
#endif
#ifdef GPIOD
#ifdef GPIO_PIN_0
STM32_GPIO PD0("PD0", GPIOD, GPIO_PIN_0);
#endif
#ifdef GPIO_PIN_1
STM32_GPIO PD1("PD1", GPIOD, GPIO_PIN_1);
#endif
#ifdef GPIO_PIN_2
STM32_GPIO PD2("PD2", GPIOD, GPIO_PIN_2);
#endif
#ifdef GPIO_PIN_3
STM32_GPIO PD3("PD3", GPIOD, GPIO_PIN_3);
#endif
#ifdef GPIO_PIN_4
STM32_GPIO PD4("PD4", GPIOD, GPIO_PIN_4);
#endif
#ifdef GPIO_PIN_5
STM32_GPIO PD5("PD5", GPIOD, GPIO_PIN_5);
#endif
#ifdef GPIO_PIN_6
STM32_GPIO PD6("PD6", GPIOD, GPIO_PIN_6);
#endif
#ifdef GPIO_PIN_7
STM32_GPIO PD7("PD7", GPIOD, GPIO_PIN_7);
#endif
#ifdef GPIO_PIN_8
STM32_GPIO PD8("PD8", GPIOD, GPIO_PIN_8);
#endif
#ifdef GPIO_PIN_9
STM32_GPIO PD9("PD9", GPIOD, GPIO_PIN_9);
#endif
#ifdef GPIO_PIN_10
STM32_GPIO PD10("PD10", GPIOD, GPIO_PIN_10);
#endif
#ifdef GPIO_PIN_11
STM32_GPIO PD11("PD11", GPIOD, GPIO_PIN_11);
#endif
#ifdef GPIO_PIN_12
STM32_GPIO PD12("PD12", GPIOD, GPIO_PIN_12);
#endif
#ifdef GPIO_PIN_13
STM32_GPIO PD13("PD13", GPIOD, GPIO_PIN_13);
#endif
#ifdef GPIO_PIN_14
STM32_GPIO PD14("PD14", GPIOD, GPIO_PIN_14);
#endif
#ifdef GPIO_PIN_15
STM32_GPIO PD15("PD15", GPIOD, GPIO_PIN_15);
#endif
#endif
#ifdef GPIOE
#ifdef GPIO_PIN_0
STM32_GPIO PE0("PE0", GPIOE, GPIO_PIN_0);
#endif
#ifdef GPIO_PIN_1
STM32_GPIO PE1("PE1", GPIOE, GPIO_PIN_1);
#endif
#ifdef GPIO_PIN_2
STM32_GPIO PE2("PE2", GPIOE, GPIO_PIN_2);
#endif
#ifdef GPIO_PIN_3
STM32_GPIO PE3("PE3", GPIOE, GPIO_PIN_3);
#endif
#ifdef GPIO_PIN_4
STM32_GPIO PE4("PE4", GPIOE, GPIO_PIN_4);
#endif
#ifdef GPIO_PIN_5
STM32_GPIO PE5("PE5", GPIOE, GPIO_PIN_5);
#endif
#ifdef GPIO_PIN_6
STM32_GPIO PE6("PE6", GPIOE, GPIO_PIN_6);
#endif
#ifdef GPIO_PIN_7
STM32_GPIO PE7("PE7", GPIOE, GPIO_PIN_7);
#endif
#ifdef GPIO_PIN_8
STM32_GPIO PE8("PE8", GPIOE, GPIO_PIN_8);
#endif
#ifdef GPIO_PIN_9
STM32_GPIO PE9("PE9", GPIOE, GPIO_PIN_9);
#endif
#ifdef GPIO_PIN_10
STM32_GPIO PE10("PE10", GPIOE, GPIO_PIN_10);
#endif
#ifdef GPIO_PIN_11
STM32_GPIO PE11("PE11", GPIOE, GPIO_PIN_11);
#endif
#ifdef GPIO_PIN_12
STM32_GPIO PE12("PE12", GPIOE, GPIO_PIN_12);
#endif
#ifdef GPIO_PIN_13
STM32_GPIO PE13("PE13", GPIOE, GPIO_PIN_13);
#endif
#ifdef GPIO_PIN_14
STM32_GPIO PE14("PE14", GPIOE, GPIO_PIN_14);
#endif
#ifdef GPIO_PIN_15
STM32_GPIO PE15("PE15", GPIOE, GPIO_PIN_15);
#endif
#endif
#ifdef GPIOF
#ifdef GPIO_PIN_0
STM32_GPIO PF0("PF0", GPIOF, GPIO_PIN_0);
#endif
#ifdef GPIO_PIN_1
STM32_GPIO PF1("PF1", GPIOF, GPIO_PIN_1);
#endif
#ifdef GPIO_PIN_2
STM32_GPIO PF2("PF2", GPIOF, GPIO_PIN_2);
#endif
#ifdef GPIO_PIN_3
STM32_GPIO PF3("PF3", GPIOF, GPIO_PIN_3);
#endif
#ifdef GPIO_PIN_4
STM32_GPIO PF4("PF4", GPIOF, GPIO_PIN_4);
#endif
#ifdef GPIO_PIN_5
STM32_GPIO PF5("PF5", GPIOF, GPIO_PIN_5);
#endif
#ifdef GPIO_PIN_6
STM32_GPIO PF6("PF6", GPIOF, GPIO_PIN_6);
#endif
#ifdef GPIO_PIN_7
STM32_GPIO PF7("PF7", GPIOF, GPIO_PIN_7);
#endif
#ifdef GPIO_PIN_8
STM32_GPIO PF8("PF8", GPIOF, GPIO_PIN_8);
#endif
#ifdef GPIO_PIN_9
STM32_GPIO PF9("PF9", GPIOF, GPIO_PIN_9);
#endif
#ifdef GPIO_PIN_10
STM32_GPIO PF10("PF10", GPIOF, GPIO_PIN_10);
#endif
#ifdef GPIO_PIN_11
STM32_GPIO PF11("PF11", GPIOF, GPIO_PIN_11);
#endif
#ifdef GPIO_PIN_12
STM32_GPIO PF12("PF12", GPIOF, GPIO_PIN_12);
#endif
#ifdef GPIO_PIN_13
STM32_GPIO PF13("PF13", GPIOF, GPIO_PIN_13);
#endif
#ifdef GPIO_PIN_14
STM32_GPIO PF14("PF14", GPIOF, GPIO_PIN_14);
#endif
#ifdef GPIO_PIN_15
STM32_GPIO PF15("PF15", GPIOF, GPIO_PIN_15);
#endif
#endif
} // namespace iflytop

368
hal/gpio.hpp

@ -1,13 +1,14 @@
#pragma once
#include <functional>
#include "../chip/iflytop_no_os.h"
namespace iflytop {
using namespace std;
#define STM32_GPIO_LISTENER_NUM 10
class STM32_GPIO;
class STM32_GPIO_LISTENER;
class STM32_GPIO {
class ZGPIO {
public:
typedef enum {
kRisingIrqEvent,
@ -15,43 +16,48 @@ class STM32_GPIO {
} IrqTypeEvent_t;
typedef enum {
kOutput_nopull,
kOutput_pullup,
kOutput_pulldown,
kOutput_od,
kInput_noIrq,
kInput_risingIrq,
kInput_fallingIrq,
kInput_risingAndFallingIrq,
kAIN,
kInput_nopull, //
kInput_pullup, //
kInput_pulldown, //
kInput_od, //
kOutput_nopull, //
kOutput_pullup, //
kOutput_pulldown, //
kOutput_od, //
} GPIOMode_t;
typedef enum { kAIN, kInput, kOutput } GPIOType_t;
typedef enum {
kIRQ_noIrq,
kIRQ_risingIrq,
kIRQ_fallingIrq,
kIRQ_risingAndFallingIrq,
} GPIOIrqType_t;
typedef function<void(ZGPIO *GPIO_Pin, IrqTypeEvent_t irqevent)> onirq_t;
private:
const char *m_name;
GPIO_TypeDef *m_gpio;
uint16_t m_pin;
uint16_t m_pinoff;
GPIOType_t m_gpiotype;
GPIOMode_t m_mode;
GPIOIrqType_t m_irqtype;
bool m_mirror;
bool lastLevel;
STM32_GPIO_LISTENER *m_listener;
private:
void init(GPIOMode_t gpiomode, bool mirror, bool initLevel);
onirq_t m_onirq;
public:
STM32_GPIO(const char *name, GPIO_TypeDef *gpio, uint16_t pin) : m_name(name), m_gpio(gpio), m_pin(pin) { m_mirror = false; }
void initAsOutput(GPIOMode_t gpiomode, bool mirror, bool initLevel);
void initAsOutput(bool initLevel);
void initAsInput(GPIOMode_t gpiomode, bool mirror);
void initAsInput();
ZGPIO(){};
void initAsMirrorInput();
void initAsInput(Pin_t pin, GPIOMode_t mode, GPIOIrqType_t irqtype, bool mirror);
void initAsOutput(Pin_t pin, GPIOMode_t mode, bool mirror, bool initLevel);
void regListener(STM32_GPIO_LISTENER *listener);
void regListener(onirq_t listener);
bool isMirror();
bool isItRisingEXITGPIO();
bool isItFallingEXITGPIO();
bool isItRisingAndItFallingEXITGPIO();
@ -70,7 +76,7 @@ class STM32_GPIO {
*******************************************************************************/
IRQn_Type getEXTIIRQn();
GPIO_TypeDef *getPort() { return m_gpio; }
uint16_t getPin() { return m_pin; }
uint16_t getPin() { return m_pinoff; }
bool tryTriggerIRQ(uint16_t GPIO_Pin);
@ -80,313 +86,7 @@ class STM32_GPIO {
class STM32_GPIO_LISTENER {
public:
virtual void STM32_GPIO_onIRQ(STM32_GPIO *GPIO_Pin, STM32_GPIO::IrqTypeEvent_t irqevent) {}
virtual void STM32_GPIO_onIRQ(ZGPIO *GPIO_Pin, ZGPIO::IrqTypeEvent_t irqevent) {}
};
#ifdef GPIOA
#ifdef GPIO_PIN_0
extern STM32_GPIO PA0;
#endif
#ifdef GPIO_PIN_1
extern STM32_GPIO PA1;
#endif
#ifdef GPIO_PIN_2
extern STM32_GPIO PA2;
#endif
#ifdef GPIO_PIN_3
extern STM32_GPIO PA3;
#endif
#ifdef GPIO_PIN_4
extern STM32_GPIO PA4;
#endif
#ifdef GPIO_PIN_5
extern STM32_GPIO PA5;
#endif
#ifdef GPIO_PIN_6
extern STM32_GPIO PA6;
#endif
#ifdef GPIO_PIN_7
extern STM32_GPIO PA7;
#endif
#ifdef GPIO_PIN_8
extern STM32_GPIO PA8;
#endif
#ifdef GPIO_PIN_9
extern STM32_GPIO PA9;
#endif
#ifdef GPIO_PIN_10
extern STM32_GPIO PA10;
#endif
#ifdef GPIO_PIN_11
extern STM32_GPIO PA11;
#endif
#ifdef GPIO_PIN_12
extern STM32_GPIO PA12;
#endif
#ifdef GPIO_PIN_13
extern STM32_GPIO PA13;
#endif
#ifdef GPIO_PIN_14
extern STM32_GPIO PA14;
#endif
#ifdef GPIO_PIN_15
extern STM32_GPIO PA15;
#endif
#endif
#ifdef GPIOB
#ifdef GPIO_PIN_0
extern STM32_GPIO PB0;
#endif
#ifdef GPIO_PIN_1
extern STM32_GPIO PB1;
#endif
#ifdef GPIO_PIN_2
extern STM32_GPIO PB2;
#endif
#ifdef GPIO_PIN_3
extern STM32_GPIO PB3;
#endif
#ifdef GPIO_PIN_4
extern STM32_GPIO PB4;
#endif
#ifdef GPIO_PIN_5
extern STM32_GPIO PB5;
#endif
#ifdef GPIO_PIN_6
extern STM32_GPIO PB6;
#endif
#ifdef GPIO_PIN_7
extern STM32_GPIO PB7;
#endif
#ifdef GPIO_PIN_8
extern STM32_GPIO PB8;
#endif
#ifdef GPIO_PIN_9
extern STM32_GPIO PB9;
#endif
#ifdef GPIO_PIN_10
extern STM32_GPIO PB10;
#endif
#ifdef GPIO_PIN_11
extern STM32_GPIO PB11;
#endif
#ifdef GPIO_PIN_12
extern STM32_GPIO PB12;
#endif
#ifdef GPIO_PIN_13
extern STM32_GPIO PB13;
#endif
#ifdef GPIO_PIN_14
extern STM32_GPIO PB14;
#endif
#ifdef GPIO_PIN_15
extern STM32_GPIO PB15;
#endif
#endif
#ifdef GPIOC
#ifdef GPIO_PIN_0
extern STM32_GPIO PC0;
#endif
#ifdef GPIO_PIN_1
extern STM32_GPIO PC1;
#endif
#ifdef GPIO_PIN_2
extern STM32_GPIO PC2;
#endif
#ifdef GPIO_PIN_3
extern STM32_GPIO PC3;
#endif
#ifdef GPIO_PIN_4
extern STM32_GPIO PC4;
#endif
#ifdef GPIO_PIN_5
extern STM32_GPIO PC5;
#endif
#ifdef GPIO_PIN_6
extern STM32_GPIO PC6;
#endif
#ifdef GPIO_PIN_7
extern STM32_GPIO PC7;
#endif
#ifdef GPIO_PIN_8
extern STM32_GPIO PC8;
#endif
#ifdef GPIO_PIN_9
extern STM32_GPIO PC9;
#endif
#ifdef GPIO_PIN_10
extern STM32_GPIO PC10;
#endif
#ifdef GPIO_PIN_11
extern STM32_GPIO PC11;
#endif
#ifdef GPIO_PIN_12
extern STM32_GPIO PC12;
#endif
#ifdef GPIO_PIN_13
extern STM32_GPIO PC13;
#endif
#ifdef GPIO_PIN_14
extern STM32_GPIO PC14;
#endif
#ifdef GPIO_PIN_15
extern STM32_GPIO PC15;
#endif
#endif
#ifdef GPIOD
#ifdef GPIO_PIN_0
extern STM32_GPIO PD0;
#endif
#ifdef GPIO_PIN_1
extern STM32_GPIO PD1;
#endif
#ifdef GPIO_PIN_2
extern STM32_GPIO PD2;
#endif
#ifdef GPIO_PIN_3
extern STM32_GPIO PD3;
#endif
#ifdef GPIO_PIN_4
extern STM32_GPIO PD4;
#endif
#ifdef GPIO_PIN_5
extern STM32_GPIO PD5;
#endif
#ifdef GPIO_PIN_6
extern STM32_GPIO PD6;
#endif
#ifdef GPIO_PIN_7
extern STM32_GPIO PD7;
#endif
#ifdef GPIO_PIN_8
extern STM32_GPIO PD8;
#endif
#ifdef GPIO_PIN_9
extern STM32_GPIO PD9;
#endif
#ifdef GPIO_PIN_10
extern STM32_GPIO PD10;
#endif
#ifdef GPIO_PIN_11
extern STM32_GPIO PD11;
#endif
#ifdef GPIO_PIN_12
extern STM32_GPIO PD12;
#endif
#ifdef GPIO_PIN_13
extern STM32_GPIO PD13;
#endif
#ifdef GPIO_PIN_14
extern STM32_GPIO PD14;
#endif
#ifdef GPIO_PIN_15
extern STM32_GPIO PD15;
#endif
#endif
#ifdef GPIOE
#ifdef GPIO_PIN_0
extern STM32_GPIO PE0;
#endif
#ifdef GPIO_PIN_1
extern STM32_GPIO PE1;
#endif
#ifdef GPIO_PIN_2
extern STM32_GPIO PE2;
#endif
#ifdef GPIO_PIN_3
extern STM32_GPIO PE3;
#endif
#ifdef GPIO_PIN_4
extern STM32_GPIO PE4;
#endif
#ifdef GPIO_PIN_5
extern STM32_GPIO PE5;
#endif
#ifdef GPIO_PIN_6
extern STM32_GPIO PE6;
#endif
#ifdef GPIO_PIN_7
extern STM32_GPIO PE7;
#endif
#ifdef GPIO_PIN_8
extern STM32_GPIO PE8;
#endif
#ifdef GPIO_PIN_9
extern STM32_GPIO PE9;
#endif
#ifdef GPIO_PIN_10
extern STM32_GPIO PE10;
#endif
#ifdef GPIO_PIN_11
extern STM32_GPIO PE11;
#endif
#ifdef GPIO_PIN_12
extern STM32_GPIO PE12;
#endif
#ifdef GPIO_PIN_13
extern STM32_GPIO PE13;
#endif
#ifdef GPIO_PIN_14
extern STM32_GPIO PE14;
#endif
#ifdef GPIO_PIN_15
extern STM32_GPIO PE15;
#endif
#endif
#ifdef GPIOF
#ifdef GPIO_PIN_0
extern STM32_GPIO PF0;
#endif
#ifdef GPIO_PIN_1
extern STM32_GPIO PF1;
#endif
#ifdef GPIO_PIN_2
extern STM32_GPIO PF2;
#endif
#ifdef GPIO_PIN_3
extern STM32_GPIO PF3;
#endif
#ifdef GPIO_PIN_4
extern STM32_GPIO PF4;
#endif
#ifdef GPIO_PIN_5
extern STM32_GPIO PF5;
#endif
#ifdef GPIO_PIN_6
extern STM32_GPIO PF6;
#endif
#ifdef GPIO_PIN_7
extern STM32_GPIO PF7;
#endif
#ifdef GPIO_PIN_8
extern STM32_GPIO PF8;
#endif
#ifdef GPIO_PIN_9
extern STM32_GPIO PF9;
#endif
#ifdef GPIO_PIN_10
extern STM32_GPIO PF10;
#endif
#ifdef GPIO_PIN_11
extern STM32_GPIO PF11;
#endif
#ifdef GPIO_PIN_12
extern STM32_GPIO PF12;
#endif
#ifdef GPIO_PIN_13
extern STM32_GPIO PF13;
#endif
#ifdef GPIO_PIN_14
extern STM32_GPIO PF14;
#endif
#ifdef GPIO_PIN_15
extern STM32_GPIO PF15;
#endif
#endif
} // namespace iflytop

7
hal/zhal.hpp

@ -1,6 +1,9 @@
#pragma once
#include "../chip/iflytop_no_os.h"
#include "gpio.hpp"
//
#include "critical_context.hpp"
#include "zhal_core.hpp"
//
#include "gpio.hpp"
#include "zcan.hpp"
#include "critical_context.hpp"
#include "zuart.hpp"

231
hal/zuart.cpp

@ -0,0 +1,231 @@
#include "zuart.hpp"
#include <stdio.h>
#include <string.h>
#include "critical_context.hpp"
#include "zhal_core.hpp"
using namespace iflytop;
static ZUART *s_uart_table[10];
static int s_numUart;
static void prv_reg_uart(ZUART *uart) {
if (s_numUart < 10) {
s_uart_table[s_numUart++] = uart;
}
}
ZUART *prv_find_uart(UART_HandleTypeDef *huart) {
for (int i = 0; i < s_numUart; i++) {
if (s_uart_table[i]->getHuart() == huart) {
return s_uart_table[i];
}
}
return NULL;
}
extern "C" {
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) {
ZUART *stm32uart = prv_find_uart(huart);
if (stm32uart != NULL) stm32uart->HAL_UART_TxCpltCallback();
}
void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart) {
ZUART *stm32uart = prv_find_uart(huart);
if (stm32uart != NULL) stm32uart->HAL_UART_TxHalfCpltCallback();
}
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) {
ZUART *stm32uart = prv_find_uart(huart);
if (stm32uart != NULL) stm32uart->HAL_UART_RxCpltCallback();
}
void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart) {
ZUART *stm32uart = prv_find_uart(huart);
if (stm32uart != NULL) stm32uart->HAL_UART_RxHalfCpltCallback();
}
void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) {
ZUART *stm32uart = prv_find_uart(huart);
if (stm32uart != NULL) stm32uart->HAL_UART_ErrorCallback();
}
void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart) {
ZUART *stm32uart = prv_find_uart(huart);
if (stm32uart != NULL) stm32uart->HAL_UART_AbortCpltCallback();
}
void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart) {
ZUART *stm32uart = prv_find_uart(huart);
if (stm32uart != NULL) stm32uart->HAL_UART_AbortTransmitCpltCallback();
}
void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart) {
ZUART *stm32uart = prv_find_uart(huart);
if (stm32uart != NULL) stm32uart->HAL_UART_AbortReceiveCpltCallback();
}
}
IRQn_Type ZUART::getUartIRQType() {
#ifdef USART1
if (m_huart->Instance == USART1) {
return USART1_IRQn;
}
#endif
#ifdef USART2
if (m_huart->Instance == USART2) {
return USART2_IRQn;
}
#endif
#ifdef USART3
if (m_huart->Instance == USART3) {
return USART3_IRQn;
}
#endif
#ifdef UART4
if (m_huart->Instance == UART4) {
return UART4_IRQn;
}
#endif
#ifdef UART5
if (m_huart->Instance == UART5) {
return UART5_IRQn;
}
#endif
#ifdef USART6
if (m_huart->Instance == USART6) {
return USART6_IRQn;
}
#endif
ZASSERT(false);
return USART1_IRQn;
}
void ZUART::initialize(cfg_t *cfg, callback_t cb) {
m_name = cfg->name;
m_huart = cfg->huart;
m_cb = cb;
m_rxovertime_ms = cfg->rxovertime_ms;
m_rxBuffer = (uint8_t *)malloc(cfg->rxbuffersize);
memset(m_rxBuffer, 0, cfg->rxbuffersize);
ZASSERT(m_rxBuffer != NULL);
m_rxBufferLen = cfg->rxbuffersize;
m_isRxing = false;
m_dataIsReady = false;
m_rxBufferPos = 0;
m_lastRxTime = 0;
onebyte = 0;
ZHALCORE::getInstance()->regPeriodJob([this](ZHALCORE::Context &context) { periodicJob(); }, 1);
}
void ZUART::initialize(cfg_t *cfg) { initialize(cfg, NULL); }
bool ZUART::tx(uint8_t *data, size_t len) {
HAL_UART_Transmit(m_huart, data, len, 0xffff);
return true;
}
bool ZUART::tx(const char *data) {
HAL_UART_Transmit(m_huart, (uint8_t *)data, strlen(data), 0xffff);
return true;
}
bool ZUART::startRxIt() {
ZASSERT(m_rxBuffer != NULL);
ZASSERT(NVIC_GetEnableIRQ(getUartIRQType()) != 0);
if (m_isRxing) return true;
m_isRxing = true;
HAL_UART_Receive_IT(m_huart, &onebyte, 1);
return true;
}
bool ZUART::dataIsReady() {
CriticalContext criticalContext();
if (m_dataIsReady) {
return true;
}
if (!m_dataIsReady && m_rxBufferPos != 0) {
if (ifly_has_passedms(m_lastRxTime) > m_rxovertime_ms) {
m_dataIsReady = true;
return true;
}
}
return false;
}
void ZUART::clearRxData() {
ZCriticalContext criticalContext();
m_dataIsReady = false;
memset(m_rxBuffer, 0, m_rxBufferLen);
m_rxBufferPos = 0;
}
void ZUART::periodicJob() {
if (dataIsReady()) {
if (m_cb) {
m_cb(m_rxBuffer, m_rxBufferPos);
}
clearRxData();
}
}
bool ZUART::startRxIt() {
ZASSERT(m_rxBuffer != NULL);
ZASSERT(NVIC_GetEnableIRQ(getUartIRQType()) != 0);
if (m_isRxing) return true;
m_isRxing = true;
HAL_UART_Receive_IT(m_huart, &onebyte, 1);
return true;
}
/*******************************************************************************
* *
*******************************************************************************/
void ZUART::HAL_UART_TxCpltCallback() {}
void ZUART::HAL_UART_TxHalfCpltCallback() {}
void ZUART::HAL_UART_RxCpltCallback() {
if (m_dataIsReady) {
HAL_UART_Receive_IT(m_huart, &onebyte, 1);
return;
}
m_rxBuffer[m_rxBufferPos] = onebyte;
m_rxBufferPos++;
m_lastRxTime = chip_get_ticket();
if (m_rxBufferPos >= m_rxBufferLen) {
m_dataIsReady = true;
}
HAL_UART_Receive_IT(m_huart, &onebyte, 1);
}
void ZUART::HAL_UART_RxHalfCpltCallback() {}
void ZUART::HAL_UART_ErrorCallback() {
HAL_UART_AbortReceive_IT(m_huart);
HAL_UART_Receive_IT(m_huart, &onebyte, 1);
}
void ZUART::HAL_UART_AbortCpltCallback() {}
void ZUART::HAL_UART_AbortTransmitCpltCallback() {}
void ZUART::HAL_UART_AbortReceiveCpltCallback() {}
namespace iflytop {
#if 0
#ifdef USART1
ZUART STM32_UART1("uart1", USART1);
#endif
#ifdef USART2
ZUART STM32_UART2("uart2", USART2);
#endif
#ifdef USART3
ZUART STM32_UART3("uart3", USART3);
#endif
#ifdef UART4
ZUART STM32_UART4("uart4", UART4);
#endif
#ifdef UART5
ZUART STM32_UART5("uart5", UART5);
#endif
#ifdef USART6
ZUART STM32_UART6("uart6", USART6);
#endif
#endif
} // namespace iflytop

68
hal/zuart.hpp

@ -0,0 +1,68 @@
#pragma once
#include <functional>
#include "../chip/iflytop_no_os.h"
namespace iflytop {
using namespace std;
class ZUART {
public:
typedef struct {
const char *name;
UART_HandleTypeDef *huart;
int32_t rxbuffersize = 128;
int32_t rxovertime_ms = 3;
} cfg_t;
typedef function<void(uint8_t *data, size_t len)> callback_t;
private:
const char *m_name;
UART_HandleTypeDef *m_huart;
uint8_t *m_rxBuffer;
volatile int32_t m_rxBufferPos;
int32_t m_rxBufferLen;
volatile uint32_t m_lastRxTime;
int32_t m_rxovertime_ms = 3;
uint8_t onebyte;
bool m_isRxing = false;
volatile bool m_dataIsReady = false;
callback_t m_cb;
public:
ZUART() {}
void initialize(cfg_t *cfg, callback_t cb);
void initialize(cfg_t *cfg);
void setrxcb(callback_t cb) { m_cb = cb; }
bool tx(const char *data);
bool tx(uint8_t *data, size_t len);
bool startRxIt();
void clearRxData();
public:
void HAL_UART_TxCpltCallback();
void HAL_UART_TxHalfCpltCallback();
void HAL_UART_RxCpltCallback();
void HAL_UART_RxHalfCpltCallback();
void HAL_UART_ErrorCallback();
void HAL_UART_AbortCpltCallback();
void HAL_UART_AbortTransmitCpltCallback();
void HAL_UART_AbortReceiveCpltCallback();
UART_HandleTypeDef *getHuart() { return m_huart; }
private:
IRQn_Type getUartIRQType();
bool dataIsReady();
void periodicJob();
};
} // namespace iflytop
Loading…
Cancel
Save