From 4f8ffcb10f135c99a2c7d9bfed0d1f781702719a Mon Sep 17 00:00:00 2001 From: zhaohe Date: Mon, 3 Jun 2024 14:02:13 +0800 Subject: [PATCH] update --- .cproject | 35 ++- .mxproject | 42 ++-- .settings/stm32cubeide.project.prefs | 4 +- Core/Inc/FreeRTOSConfig.h | 30 ++- Core/Inc/stm32f4xx_hal_conf.h | 76 +++--- Core/Src/freertos.c | 88 +++++++ Core/Src/usart.c.bak | 256 --------------------- .../FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c | 2 +- .../FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h | 2 +- STM32F407VETX_FLASH.ld | 2 +- a8000_protocol | 2 +- a8000_subboard.ioc | 6 +- sdk | 2 +- usrc/main.cpp | 6 + usrc/project_configs.h | 3 +- usrc/public_service/gins.c | 9 +- usrc/public_service/gins.h | 7 +- usrc/public_service/stm32irq.c | 7 +- usrc/subboards/subboard30_shake_module/pri_board.h | 21 ++ .../subboard30_shake_module.cpp | 95 ++++++-- .../subboard30_shake_module_board.c | 73 +++++- .../subboard30_shake_module_board.h | 21 +- usrc/sysmgr/sys_mgr.cpp | 135 +++++++++++ usrc/sysmgr/sys_mgr.hpp | 49 ++++ 24 files changed, 593 insertions(+), 380 deletions(-) delete mode 100644 Core/Src/usart.c.bak create mode 100644 usrc/subboards/subboard30_shake_module/pri_board.h create mode 100644 usrc/sysmgr/sys_mgr.cpp create mode 100644 usrc/sysmgr/sys_mgr.hpp diff --git a/.cproject b/.cproject index ea0dea8..341800b 100644 --- a/.cproject +++ b/.cproject @@ -115,13 +115,42 @@ + + + + - - + + + - diff --git a/.mxproject b/.mxproject index f146401..03fdf00 100644 --- a/.mxproject +++ b/.mxproject @@ -2,42 +2,36 @@ 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[PreviousUsedCubeIDEFiles] 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+SourceFiles=Core\Src\main.c;Core\Src\gpio.c;Core\Src\freertos.c;Core\Src\crc.c;Core\Src\dma.c;Core\Src\rng.c;Core\Src\usart.c;Core\Src\stm32f4xx_it.c;Core\Src\stm32f4xx_hal_msp.c;Core\Src\stm32f4xx_hal_timebase_tim.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_adc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_adc_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_adc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_can.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dac.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dac_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_iwdg.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rng.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_spi.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c;Middlewares\Third_Party\FreeRTOS\Source\croutine.c;Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;Middlewares\Third_Party\FreeRTOS\Source\list.c;Middlewares\Third_Party\FreeRTOS\Source\queue.c;Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;Middlewares\Third_Party\FreeRTOS\Source\tasks.c;Middlewares\Third_Party\FreeRTOS\Source\timers.c;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.c;Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;Middlewares\Third_Party\FreeRTOS\Source\portable\GCC\ARM_CM4F\port.c;Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;Core\Src\system_stm32f4xx.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_adc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_adc_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_ll_adc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rcc_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_flash_ramfunc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_gpio.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dma.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_pwr_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_cortex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_exti.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_can.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_crc.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dac.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_dac_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_i2c_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_iwdg.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_rng.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_spi.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_tim_ex.c;Drivers\STM32F4xx_HAL_Driver\Src\stm32f4xx_hal_uart.c;Middlewares\Third_Party\FreeRTOS\Source\croutine.c;Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;Middlewares\Third_Party\FreeRTOS\Source\list.c;Middlewares\Third_Party\FreeRTOS\Source\queue.c;Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;Middlewares\Third_Party\FreeRTOS\Source\tasks.c;Middlewares\Third_Party\FreeRTOS\Source\timers.c;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.c;Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;Middlewares\Third_Party\FreeRTOS\Source\portable\GCC\ARM_CM4F\port.c;Drivers\CMSIS\Device\ST\STM32F4xx\Source\Templates\system_stm32f4xx.c;Core\Src\system_stm32f4xx.c;;;Middlewares\Third_Party\FreeRTOS\Source\croutine.c;Middlewares\Third_Party\FreeRTOS\Source\event_groups.c;Middlewares\Third_Party\FreeRTOS\Source\list.c;Middlewares\Third_Party\FreeRTOS\Source\queue.c;Middlewares\Third_Party\FreeRTOS\Source\stream_buffer.c;Middlewares\Third_Party\FreeRTOS\Source\tasks.c;Middlewares\Third_Party\FreeRTOS\Source\timers.c;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS\cmsis_os.c;Middlewares\Third_Party\FreeRTOS\Source\portable\MemMang\heap_4.c;Middlewares\Third_Party\FreeRTOS\Source\portable\GCC\ARM_CM4F\port.c; HeaderPath=Drivers\STM32F4xx_HAL_Driver\Inc;Drivers\STM32F4xx_HAL_Driver\Inc\Legacy;Middlewares\Third_Party\FreeRTOS\Source\include;Middlewares\Third_Party\FreeRTOS\Source\CMSIS_RTOS;Middlewares\Third_Party\FreeRTOS\Source\portable\GCC\ARM_CM4F;Drivers\CMSIS\Device\ST\STM32F4xx\Include;Drivers\CMSIS\Include;Core\Inc; CDefines=USE_HAL_DRIVER;STM32F407xx;USE_HAL_DRIVER;USE_HAL_DRIVER; [PreviousGenFiles] AdvancedFolderStructure=true -HeaderFileListSize=12 +HeaderFileListSize=9 HeaderFiles#0=..\Core\Inc\gpio.h HeaderFiles#1=..\Core\Inc\FreeRTOSConfig.h -HeaderFiles#2=..\Core\Inc\can.h -HeaderFiles#3=..\Core\Inc\crc.h -HeaderFiles#4=..\Core\Inc\dma.h -HeaderFiles#5=..\Core\Inc\iwdg.h -HeaderFiles#6=..\Core\Inc\rng.h -HeaderFiles#7=..\Core\Inc\tim.h -HeaderFiles#8=..\Core\Inc\usart.h -HeaderFiles#9=..\Core\Inc\stm32f4xx_it.h -HeaderFiles#10=..\Core\Inc\stm32f4xx_hal_conf.h -HeaderFiles#11=..\Core\Inc\main.h +HeaderFiles#2=..\Core\Inc\crc.h +HeaderFiles#3=..\Core\Inc\dma.h +HeaderFiles#4=..\Core\Inc\rng.h +HeaderFiles#5=..\Core\Inc\usart.h +HeaderFiles#6=..\Core\Inc\stm32f4xx_it.h +HeaderFiles#7=..\Core\Inc\stm32f4xx_hal_conf.h +HeaderFiles#8=..\Core\Inc\main.h HeaderFolderListSize=1 HeaderPath#0=..\Core\Inc HeaderFiles=; -SourceFileListSize=13 +SourceFileListSize=10 SourceFiles#0=..\Core\Src\gpio.c SourceFiles#1=..\Core\Src\freertos.c -SourceFiles#2=..\Core\Src\can.c -SourceFiles#3=..\Core\Src\crc.c -SourceFiles#4=..\Core\Src\dma.c -SourceFiles#5=..\Core\Src\iwdg.c -SourceFiles#6=..\Core\Src\rng.c -SourceFiles#7=..\Core\Src\tim.c -SourceFiles#8=..\Core\Src\usart.c -SourceFiles#9=..\Core\Src\stm32f4xx_it.c -SourceFiles#10=..\Core\Src\stm32f4xx_hal_msp.c -SourceFiles#11=..\Core\Src\stm32f4xx_hal_timebase_tim.c -SourceFiles#12=..\Core\Src\main.c +SourceFiles#2=..\Core\Src\crc.c +SourceFiles#3=..\Core\Src\dma.c +SourceFiles#4=..\Core\Src\rng.c +SourceFiles#5=..\Core\Src\usart.c +SourceFiles#6=..\Core\Src\stm32f4xx_it.c +SourceFiles#7=..\Core\Src\stm32f4xx_hal_msp.c +SourceFiles#8=..\Core\Src\stm32f4xx_hal_timebase_tim.c +SourceFiles#9=..\Core\Src\main.c SourceFolderListSize=1 SourcePath#0=..\Core\Src SourceFiles=; diff --git a/.settings/stm32cubeide.project.prefs b/.settings/stm32cubeide.project.prefs index 4f2e21e..7e5e08c 100644 --- a/.settings/stm32cubeide.project.prefs +++ b/.settings/stm32cubeide.project.prefs @@ -1,6 +1,6 @@ -2F62501ED4689FB349E356AB974DBE57=E20EF8A1CFA8D2AA5E7713614514A9E1 +2F62501ED4689FB349E356AB974DBE57=04980315A9C90A386CC08C1FEA19B581 635E684B79701B039C64EA45C3F84D30=C8B026EBE17C208F17FB66CE4235156C 66BE74F758C12D739921AEA421D593D3=1 -8DF89ED150041C4CBC7CB9A9CAA90856=E20EF8A1CFA8D2AA5E7713614514A9E1 +8DF89ED150041C4CBC7CB9A9CAA90856=04980315A9C90A386CC08C1FEA19B581 DC22A860405A8BF2F2C095E5B6529F12=EC6C4D369FD4F7EABFE17B3222B5F3A0 eclipse.preferences.version=1 diff --git a/Core/Inc/FreeRTOSConfig.h b/Core/Inc/FreeRTOSConfig.h index 05cc8ff..4e6a824 100644 --- a/Core/Inc/FreeRTOSConfig.h +++ b/Core/Inc/FreeRTOSConfig.h @@ -51,6 +51,10 @@ #if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__) #include extern uint32_t SystemCoreClock; +/* USER CODE BEGIN 0 */ + extern void configureTimerForRunTimeStats(void); + extern unsigned long getRunTimeCounterValue(void); +/* USER CODE END 0 */ #endif #define configENABLE_FPU 1 #define configENABLE_MPU 0 @@ -58,18 +62,23 @@ #define configUSE_PREEMPTION 1 #define configSUPPORT_STATIC_ALLOCATION 1 #define configSUPPORT_DYNAMIC_ALLOCATION 1 -#define configUSE_IDLE_HOOK 0 -#define configUSE_TICK_HOOK 0 +#define configUSE_IDLE_HOOK 1 +#define configUSE_TICK_HOOK 1 #define configCPU_CLOCK_HZ ( SystemCoreClock ) #define configTICK_RATE_HZ ((TickType_t)1000) #define configMAX_PRIORITIES ( 7 ) -#define configMINIMAL_STACK_SIZE ((uint16_t)128) -#define configTOTAL_HEAP_SIZE ((size_t)30000) +#define configMINIMAL_STACK_SIZE ((uint16_t)512) +#define configTOTAL_HEAP_SIZE ((size_t)50000) #define configMAX_TASK_NAME_LEN ( 16 ) +#define configGENERATE_RUN_TIME_STATS 1 +#define configUSE_TRACE_FACILITY 1 +#define configUSE_STATS_FORMATTING_FUNCTIONS 1 #define configUSE_16_BIT_TICKS 0 #define configUSE_MUTEXES 1 #define configQUEUE_REGISTRY_SIZE 8 +#define configCHECK_FOR_STACK_OVERFLOW 1 #define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_MALLOC_FAILED_HOOK 1 #define configUSE_COUNTING_SEMAPHORES 1 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 1 #define configRECORD_STACK_HIGH_ADDRESS 1 @@ -83,6 +92,12 @@ #define configUSE_CO_ROUTINES 0 #define configMAX_CO_ROUTINE_PRIORITIES ( 2 ) +/* Software timer definitions. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY ( 3 ) +#define configTIMER_QUEUE_LENGTH 10 +#define configTIMER_TASK_STACK_DEPTH 1024 + /* The following flag must be enabled only when using newlib */ #define configUSE_NEWLIB_REENTRANT 1 @@ -96,6 +111,7 @@ to exclude the API function. */ #define INCLUDE_vTaskDelayUntil 0 #define INCLUDE_vTaskDelay 1 #define INCLUDE_xTaskGetSchedulerState 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 1 /* Cortex-M specific definitions. */ #ifdef __NVIC_PRIO_BITS @@ -138,6 +154,12 @@ standard names. */ #define xPortSysTickHandler SysTick_Handler +/* USER CODE BEGIN 2 */ +/* Definitions needed when configGENERATE_RUN_TIME_STATS is on */ +#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS configureTimerForRunTimeStats +#define portGET_RUN_TIME_COUNTER_VALUE getRunTimeCounterValue +/* USER CODE END 2 */ + /* USER CODE BEGIN Defines */ /* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */ /* USER CODE END Defines */ diff --git a/Core/Inc/stm32f4xx_hal_conf.h b/Core/Inc/stm32f4xx_hal_conf.h index dd1c40f..8e63ac3 100644 --- a/Core/Inc/stm32f4xx_hal_conf.h +++ b/Core/Inc/stm32f4xx_hal_conf.h @@ -154,45 +154,45 @@ #define INSTRUCTION_CACHE_ENABLE 1U #define DATA_CACHE_ENABLE 1U -#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback enabled */ -#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback enabled */ -#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback enabled */ -#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback enabled */ -#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback enabled */ -#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback enabled */ -#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback enabled */ -#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback enabled */ -#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback enabled */ -#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback enabled */ -#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback enabled */ -#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback enabled */ -#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback enabled */ -#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback enabled */ +#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ +#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */ +#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ +#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ +#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ +#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ +#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ +#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ +#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ +#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ +#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ +#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ +#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ +#define USE_HAL_FMPI2C_REGISTER_CALLBACKS 0U /* FMPI2C register callback disabled */ #define USE_HAL_FMPSMBUS_REGISTER_CALLBACKS 0U /* FMPSMBUS register callback disabled */ -#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback enabled */ -#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback enabled */ -#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback enabled */ -#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback enabled */ -#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback enabled */ -#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback enabled */ -#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback enabled */ -#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback enabled */ -#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback enabled */ -#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback enabled */ -#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback enabled */ -#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback enabled */ -#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback enabled */ -#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback enabled */ -#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback enabled */ -#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback enabled */ -#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback enabled */ -#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback enabled */ -#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback enabled */ -#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback enabled */ -#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback enabled */ -#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback enabled */ -#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback enabled */ -#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback enabled */ +#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ +#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ +#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ +#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ +#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ +#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ +#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */ +#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ +#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */ +#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ +#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ +#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ +#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ +#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ +#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ +#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */ +#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ +#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ +#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ +#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ +#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ /* ########################## Assert Selection ############################## */ /** diff --git a/Core/Src/freertos.c b/Core/Src/freertos.c index 677d3be..3ad94ad 100644 --- a/Core/Src/freertos.c +++ b/Core/Src/freertos.c @@ -61,6 +61,81 @@ void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */ /* GetIdleTaskMemory prototype (linked to static allocation support) */ void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize ); +/* GetTimerTaskMemory prototype (linked to static allocation support) */ +void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize ); + +/* Hook prototypes */ +void configureTimerForRunTimeStats(void); +unsigned long getRunTimeCounterValue(void); +void vApplicationIdleHook(void); +void vApplicationTickHook(void); +void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName); +void vApplicationMallocFailedHook(void); + +/* USER CODE BEGIN 1 */ +/* Functions needed when configGENERATE_RUN_TIME_STATS is on */ +__weak void configureTimerForRunTimeStats(void) +{ + +} + +__weak unsigned long getRunTimeCounterValue(void) +{ +return 0; +} +/* USER CODE END 1 */ + +/* USER CODE BEGIN 2 */ +__weak void vApplicationIdleHook( void ) +{ + /* vApplicationIdleHook() will only be called if configUSE_IDLE_HOOK is set + to 1 in FreeRTOSConfig.h. It will be called on each iteration of the idle + task. It is essential that code added to this hook function never attempts + to block in any way (for example, call xQueueReceive() with a block time + specified, or call vTaskDelay()). If the application makes use of the + vTaskDelete() API function (as this demo application does) then it is also + important that vApplicationIdleHook() is permitted to return to its calling + function, because it is the responsibility of the idle task to clean up + memory allocated by the kernel to any task that has since been deleted. */ +} +/* USER CODE END 2 */ + +/* USER CODE BEGIN 3 */ +__weak void vApplicationTickHook( void ) +{ + /* This function will be called by each tick interrupt if + configUSE_TICK_HOOK is set to 1 in FreeRTOSConfig.h. User code can be + added here, but the tick hook is called from an interrupt context, so + code must not attempt to block, and only the interrupt safe FreeRTOS API + functions can be used (those that end in FromISR()). */ +} +/* USER CODE END 3 */ + +/* USER CODE BEGIN 4 */ +__weak void vApplicationStackOverflowHook(xTaskHandle xTask, signed char *pcTaskName) +{ + /* Run time stack overflow checking is performed if + configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook function is + called if a stack overflow is detected. */ +} +/* USER CODE END 4 */ + +/* USER CODE BEGIN 5 */ +__weak void vApplicationMallocFailedHook(void) +{ + /* vApplicationMallocFailedHook() will only be called if + configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook + function that will get called if a call to pvPortMalloc() fails. + pvPortMalloc() is called internally by the kernel whenever a task, queue, + timer or semaphore is created. It is also called by various parts of the + demo application. If heap_1.c or heap_2.c are used, then the size of the + heap available to pvPortMalloc() is defined by configTOTAL_HEAP_SIZE in + FreeRTOSConfig.h, and the xPortGetFreeHeapSize() API function can be used + to query the size of free heap space that remains (although it does not + provide information on how the remaining heap might be fragmented). */ +} +/* USER CODE END 5 */ + /* USER CODE BEGIN GET_IDLE_TASK_MEMORY */ static StaticTask_t xIdleTaskTCBBuffer; static StackType_t xIdleStack[configMINIMAL_STACK_SIZE]; @@ -74,6 +149,19 @@ void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackTy } /* USER CODE END GET_IDLE_TASK_MEMORY */ +/* USER CODE BEGIN GET_TIMER_TASK_MEMORY */ +static StaticTask_t xTimerTaskTCBBuffer; +static StackType_t xTimerStack[configTIMER_TASK_STACK_DEPTH]; + +void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize ) +{ + *ppxTimerTaskTCBBuffer = &xTimerTaskTCBBuffer; + *ppxTimerTaskStackBuffer = &xTimerStack[0]; + *pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH; + /* place for user code */ +} +/* USER CODE END GET_TIMER_TASK_MEMORY */ + /** * @brief FreeRTOS initialization * @param None diff --git a/Core/Src/usart.c.bak b/Core/Src/usart.c.bak deleted file mode 100644 index 0ee5489..0000000 --- a/Core/Src/usart.c.bak +++ /dev/null @@ -1,256 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file usart.c - * @brief This file provides code for the configuration - * of the USART instances. - ****************************************************************************** - * @attention - * - * Copyright (c) 2023 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Includes ------------------------------------------------------------------*/ -#include "usart.h" - -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ - -UART_HandleTypeDef huart1; -UART_HandleTypeDef huart3; -DMA_HandleTypeDef hdma_usart1_rx; -DMA_HandleTypeDef hdma_usart3_rx; -DMA_HandleTypeDef hdma_usart3_tx; - -/* USART1 init function */ - -void MX_USART1_UART_Init(void) -{ - - /* USER CODE BEGIN USART1_Init 0 */ - - /* USER CODE END USART1_Init 0 */ - - /* USER CODE BEGIN USART1_Init 1 */ - - /* USER CODE END USART1_Init 1 */ - huart1.Instance = USART1; - huart1.Init.BaudRate = 460800; - huart1.Init.WordLength = UART_WORDLENGTH_8B; - huart1.Init.StopBits = UART_STOPBITS_1; - huart1.Init.Parity = UART_PARITY_NONE; - huart1.Init.Mode = UART_MODE_TX_RX; - huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; - huart1.Init.OverSampling = UART_OVERSAMPLING_16; - if (HAL_UART_Init(&huart1) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN USART1_Init 2 */ - - /* USER CODE END USART1_Init 2 */ - -} -/* USART3 init function */ - -void MX_USART3_UART_Init(void) -{ - - /* USER CODE BEGIN USART3_Init 0 */ - - /* USER CODE END USART3_Init 0 */ - - /* USER CODE BEGIN USART3_Init 1 */ - - /* USER CODE END USART3_Init 1 */ - huart3.Instance = USART3; - huart3.Init.BaudRate = 1000000; - huart3.Init.WordLength = UART_WORDLENGTH_8B; - huart3.Init.StopBits = UART_STOPBITS_1; - huart3.Init.Parity = UART_PARITY_NONE; - huart3.Init.Mode = UART_MODE_TX_RX; - huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; - huart3.Init.OverSampling = UART_OVERSAMPLING_16; - if (HAL_UART_Init(&huart3) != HAL_OK) - { - Error_Handler(); - } - /* USER CODE BEGIN USART3_Init 2 */ - - /* USER CODE END USART3_Init 2 */ - -} - -void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) -{ - - GPIO_InitTypeDef GPIO_InitStruct = {0}; - if(uartHandle->Instance==USART1) - { - /* USER CODE BEGIN USART1_MspInit 0 */ - - /* USER CODE END USART1_MspInit 0 */ - /* USART1 clock enable */ - __HAL_RCC_USART1_CLK_ENABLE(); - - __HAL_RCC_GPIOA_CLK_ENABLE(); - /**USART1 GPIO Configuration - PA9 ------> USART1_TX - PA10 ------> USART1_RX - */ - GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF7_USART1; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /* USART1 DMA Init */ - /* USART1_RX Init */ - hdma_usart1_rx.Instance = DMA2_Stream2; - hdma_usart1_rx.Init.Channel = DMA_CHANNEL_4; - hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; - hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; - hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; - hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - hdma_usart1_rx.Init.Mode = DMA_NORMAL; - hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; - hdma_usart1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) - { - Error_Handler(); - } - - __HAL_LINKDMA(uartHandle,hdmarx,hdma_usart1_rx); - - /* USART1 interrupt Init */ - HAL_NVIC_SetPriority(USART1_IRQn, 5, 0); - HAL_NVIC_EnableIRQ(USART1_IRQn); - /* USER CODE BEGIN USART1_MspInit 1 */ - - /* USER CODE END USART1_MspInit 1 */ - } - else if(uartHandle->Instance==USART3) - { - /* USER CODE BEGIN USART3_MspInit 0 */ - - /* USER CODE END USART3_MspInit 0 */ - /* USART3 clock enable */ - __HAL_RCC_USART3_CLK_ENABLE(); - - __HAL_RCC_GPIOB_CLK_ENABLE(); - /**USART3 GPIO Configuration - PB10 ------> USART3_TX - PB11 ------> USART3_RX - */ - GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; - GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF7_USART3; - HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - - /* USART3 DMA Init */ - /* USART3_RX Init */ - hdma_usart3_rx.Instance = DMA1_Stream1; - hdma_usart3_rx.Init.Channel = DMA_CHANNEL_4; - hdma_usart3_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; - hdma_usart3_rx.Init.PeriphInc = DMA_PINC_DISABLE; - hdma_usart3_rx.Init.MemInc = DMA_MINC_ENABLE; - hdma_usart3_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - hdma_usart3_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - hdma_usart3_rx.Init.Mode = DMA_NORMAL; - hdma_usart3_rx.Init.Priority = DMA_PRIORITY_LOW; - hdma_usart3_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - if (HAL_DMA_Init(&hdma_usart3_rx) != HAL_OK) - { - Error_Handler(); - } - - __HAL_LINKDMA(uartHandle,hdmarx,hdma_usart3_rx); - - /* USART3_TX Init */ - hdma_usart3_tx.Instance = DMA1_Stream3; - hdma_usart3_tx.Init.Channel = DMA_CHANNEL_4; - hdma_usart3_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; - hdma_usart3_tx.Init.PeriphInc = DMA_PINC_DISABLE; - hdma_usart3_tx.Init.MemInc = DMA_MINC_ENABLE; - hdma_usart3_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - hdma_usart3_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - hdma_usart3_tx.Init.Mode = DMA_NORMAL; - hdma_usart3_tx.Init.Priority = DMA_PRIORITY_LOW; - hdma_usart3_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - if (HAL_DMA_Init(&hdma_usart3_tx) != HAL_OK) - { - Error_Handler(); - } - - __HAL_LINKDMA(uartHandle,hdmatx,hdma_usart3_tx); - - /* USER CODE BEGIN USART3_MspInit 1 */ - - /* USER CODE END USART3_MspInit 1 */ - } -} - -void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle) -{ - - if(uartHandle->Instance==USART1) - { - /* USER CODE BEGIN USART1_MspDeInit 0 */ - - /* USER CODE END USART1_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_USART1_CLK_DISABLE(); - - /**USART1 GPIO Configuration - PA9 ------> USART1_TX - PA10 ------> USART1_RX - */ - HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10); - - /* USART1 DMA DeInit */ - HAL_DMA_DeInit(uartHandle->hdmarx); - - /* USART1 interrupt Deinit */ - HAL_NVIC_DisableIRQ(USART1_IRQn); - /* USER CODE BEGIN USART1_MspDeInit 1 */ - - /* USER CODE END USART1_MspDeInit 1 */ - } - else if(uartHandle->Instance==USART3) - { - /* USER CODE BEGIN USART3_MspDeInit 0 */ - - /* USER CODE END USART3_MspDeInit 0 */ - /* Peripheral clock disable */ - __HAL_RCC_USART3_CLK_DISABLE(); - - /**USART3 GPIO Configuration - PB10 ------> USART3_TX - PB11 ------> USART3_RX - */ - HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10|GPIO_PIN_11); - - /* USART3 DMA DeInit */ - HAL_DMA_DeInit(uartHandle->hdmarx); - HAL_DMA_DeInit(uartHandle->hdmatx); - /* USER CODE BEGIN USART3_MspDeInit 1 */ - - /* USER CODE END USART3_MspDeInit 1 */ - } -} - -/* USER CODE BEGIN 1 */ - -/* USER CODE END 1 */ diff --git a/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c b/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c index 7537718..89c3633 100644 --- a/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c +++ b/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.c @@ -26,7 +26,7 @@ * *---------------------------------------------------------------------------- * - * Portions Copyright ?2016 STMicroelectronics International N.V. All rights reserved. + * Portions Copyright 2016 STMicroelectronics International N.V. All rights reserved. * Portions Copyright (c) 2013 ARM LIMITED * All rights reserved. * Redistribution and use in source and binary forms, with or without diff --git a/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h b/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h index 2db20c5..f53a132 100644 --- a/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h +++ b/Middlewares/Third_Party/FreeRTOS/Source/CMSIS_RTOS/cmsis_os.h @@ -26,7 +26,7 @@ * *---------------------------------------------------------------------------- * - * Portions Copyright ?2016 STMicroelectronics International N.V. All rights reserved. + * Portions Copyright 2016 STMicroelectronics International N.V. All rights reserved. * Portions Copyright (c) 2013 ARM LIMITED * All rights reserved. * Redistribution and use in source and binary forms, with or without diff --git a/STM32F407VETX_FLASH.ld b/STM32F407VETX_FLASH.ld index d2fe0f0..c8ddbb0 100644 --- a/STM32F407VETX_FLASH.ld +++ b/STM32F407VETX_FLASH.ld @@ -40,7 +40,7 @@ ENTRY(Reset_Handler) _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */ _Min_Heap_Size = 0x2000; /* required amount of heap */ -_Min_Stack_Size = 0x1000; /* required amount of stack */ +_Min_Stack_Size = 0x1001; /* required amount of stack */ /* Memories definition */ MEMORY diff --git a/a8000_protocol b/a8000_protocol index 232ed7c..05207cd 160000 --- a/a8000_protocol +++ b/a8000_protocol @@ -1 +1 @@ -Subproject commit 232ed7c739e2ee86fe127f6364648a0d50378391 +Subproject commit 05207cdd53d36969e7d605aa65f3fa34af819e6e diff --git a/a8000_subboard.ioc b/a8000_subboard.ioc index 2e488d8..470c638 100644 --- a/a8000_subboard.ioc +++ b/a8000_subboard.ioc @@ -218,15 +218,15 @@ ProjectManager.ProjectBuild=false ProjectManager.ProjectFileName=a8000_subboard.ioc ProjectManager.ProjectName=a8000_subboard ProjectManager.ProjectStructure= -ProjectManager.RegisterCallBack=TIM,ADC,CAN,CEC,CRYP,DAC,DCMI,DFSDM,DMA2D,DSI,ETH,HASH,HCD,I2C,FMPI2C,I2S,IRDA,LPTIM,LTDC,MMC,NAND,NOR,PCCARD,PCD,QSPI,RNG,RTC,SAI,SD,SMARTCARD,SDRAM,SRAM,SPDIFRX,SMBUS,SPI,UART,USART,WWDG -ProjectManager.StackSize=0x1000 +ProjectManager.RegisterCallBack= +ProjectManager.StackSize=0x1001 ProjectManager.TargetToolchain=STM32CubeIDE ProjectManager.ThreadSafeStrategy=Cortex-M4NS\:Default, ProjectManager.ToolChainLocation= ProjectManager.UAScriptAfterPath= ProjectManager.UAScriptBeforePath= ProjectManager.UnderRoot=true -ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_CRC_Init-CRC-false-HAL-true,6-MX_RNG_Init-RNG-false-HAL-true,7-MX_TIM7_Init-TIM7-false-HAL-true,8-MX_TIM6_Init-TIM6-false-HAL-true,9-MX_CAN1_Init-CAN1-false-HAL-true,false-10-MX_I2C1_Init-I2C1-false-HAL-true,false-11-MX_SPI1_Init-SPI1-false-HAL-true,false-12-MX_UART4_Init-UART4-false-HAL-true,false-13-MX_ADC1_Init-ADC1-false-HAL-true,false-14-MX_DAC_Init-DAC-false-HAL-true,15-MX_IWDG_Init-IWDG-false-HAL-true,16-MX_USART3_UART_Init-USART3-false-HAL-true +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,false-4-MX_USART1_UART_Init-USART1-false-HAL-true,5-MX_CRC_Init-CRC-false-HAL-true,6-MX_RNG_Init-RNG-false-HAL-true,false-7-MX_TIM7_Init-TIM7-false-HAL-true,false-8-MX_TIM6_Init-TIM6-false-HAL-true,false-9-MX_CAN1_Init-CAN1-false-HAL-true,false-10-MX_I2C1_Init-I2C1-false-HAL-true,false-11-MX_SPI1_Init-SPI1-false-HAL-true,false-12-MX_UART4_Init-UART4-false-HAL-true,false-13-MX_ADC1_Init-ADC1-false-HAL-true,false-14-MX_DAC_Init-DAC-false-HAL-true,false-15-MX_IWDG_Init-IWDG-false-HAL-true,16-MX_USART3_UART_Init-USART3-false-HAL-true RCC.48MHZClocksFreq_Value=48000000 RCC.AHBFreq_Value=144000000 RCC.APB1CLKDivider=RCC_HCLK_DIV4 diff --git a/sdk b/sdk index faf6a7e..f59bc6e 160000 --- a/sdk +++ b/sdk @@ -1 +1 @@ -Subproject commit faf6a7ee02b3b4d2efa1231430a64ed982ac0f84 +Subproject commit f59bc6e7b8cbaa2a0d57ec2141fa933b202eda5b diff --git a/usrc/main.cpp b/usrc/main.cpp index b2db067..5ada161 100644 --- a/usrc/main.cpp +++ b/usrc/main.cpp @@ -7,6 +7,7 @@ #include "sdk/os/zos.hpp" #include "subboards/subboard30_shake_module/subboard30_shake_module.hpp" #include "subboards/subboard30_shake_module/subboard30_shake_module_board.h" +#include "sysmgr/sys_mgr.hpp" #define TAG "main" using namespace std; using namespace iflytop; @@ -63,6 +64,11 @@ void umain() { break; } + ZLOGI(TAG, "======================= sysinfo ======================= "); + SysMgr::ins()->initedFinished(); + SysMgr::ins()->dumpSysInfo(); + ZLOGI(TAG, "="); + while (true) { GService::inst()->getZCanReceiver()->loop(); zos_delay(1); diff --git a/usrc/project_configs.h b/usrc/project_configs.h index 2027443..a366552 100644 --- a/usrc/project_configs.h +++ b/usrc/project_configs.h @@ -5,7 +5,6 @@ #define PC_IFLYTOP_ENABLE_OS 1 #define PC_DEBUG_UART huart1 -#define PC_DEBUG_UART_DMA_HANDLER hdma_usart1_rx #define PC_DEBUG_UART_RX_BUF_SIZE 1024 #define PC_DEBUG_LIGHT_GPIO PE2 @@ -40,3 +39,5 @@ */ #define SN_FLASH_ADD 0x080E0000 // 使用扇区11存储SN编码 #define SN_FLASH_EARSE_SECTOR FLASH_SECTOR_11 + +#define SDK_MAX_TASK 15 \ No newline at end of file diff --git a/usrc/public_service/gins.c b/usrc/public_service/gins.c index 2d1710e..50206a8 100644 --- a/usrc/public_service/gins.c +++ b/usrc/public_service/gins.c @@ -7,14 +7,17 @@ TIM_HandleTypeDef htim7; CAN_HandleTypeDef hcan1; UART_HandleTypeDef huart1; UART_HandleTypeDef huart3; -DMA_HandleTypeDef hdma_usart1_rx; -DMA_HandleTypeDef hdma_usart3_rx; -DMA_HandleTypeDef hdma_usart3_tx; +DMA_HandleTypeDef *hdma_usart1_rx; +DMA_HandleTypeDef *hdma_usart3_rx; +DMA_HandleTypeDef *hdma_usart3_tx; DMA_HandleTypeDef hdma1_stream1; DMA_HandleTypeDef hdma2_stream2; DMA_HandleTypeDef hdma1_stream3; +extern DMA_HandleTypeDef* hdma_usart3_rx; +extern DMA_HandleTypeDef* hdma_usart3_tx; + SPI_HandleTypeDef hspi1; bool htim6_enable; diff --git a/usrc/public_service/gins.h b/usrc/public_service/gins.h index c125f63..70ae900 100644 --- a/usrc/public_service/gins.h +++ b/usrc/public_service/gins.h @@ -15,10 +15,13 @@ extern CAN_HandleTypeDef hcan1; extern UART_HandleTypeDef huart1; extern UART_HandleTypeDef huart3; extern DMA_HandleTypeDef hdma1_stream1; -extern DMA_HandleTypeDef hdma2_stream2; +extern DMA_HandleTypeDef hdma2_stream2; // used by common board extern DMA_HandleTypeDef hdma1_stream3; extern SPI_HandleTypeDef hspi1; +extern DMA_HandleTypeDef* hdma_usart3_rx; +extern DMA_HandleTypeDef* hdma_usart3_tx; + extern bool htim6_enable; extern bool htim7_enable; extern bool htim11_enable; @@ -26,7 +29,7 @@ extern bool hcan1_enable; extern bool huart1_enable; extern bool huart3_enable; extern bool hdma1_stream1_enable; -extern bool hdma2_stream2_enable; +extern bool hdma2_stream2_enable; // used by common board extern bool hdma1_stream3_enable; extern bool hspi1_enable; #ifdef __cplusplus diff --git a/usrc/public_service/stm32irq.c b/usrc/public_service/stm32irq.c index 2ae5cd6..350cc44 100644 --- a/usrc/public_service/stm32irq.c +++ b/usrc/public_service/stm32irq.c @@ -10,31 +10,34 @@ static void callirqcb(stm32irq_type_t type) { irqcb[type](); } } - void NMI_Handler(void) { + SysMgr_on_NMI_Handler(); while (1) { } } void HardFault_Handler(void) { + SysMgr_on_HardFault_Handler(); while (1) { } } void MemManage_Handler(void) { + SysMgr_on_MemManage_Handler(); while (1) { } } void BusFault_Handler(void) { + SysMgr_on_BusFault_Handler(); while (1) { } } void UsageFault_Handler(void) { + SysMgr_on_UsageFault_Handler(); while (1) { } } void DebugMon_Handler(void) {} - /*********************************************************************************************************************** * IRQ * ***********************************************************************************************************************/ diff --git a/usrc/subboards/subboard30_shake_module/pri_board.h b/usrc/subboards/subboard30_shake_module/pri_board.h new file mode 100644 index 0000000..57b7136 --- /dev/null +++ b/usrc/subboards/subboard30_shake_module/pri_board.h @@ -0,0 +1,21 @@ +#pragma once + +#define TMC_MOTOR_SPI hspi1 +// JL_CSN +#define MOTOR1_CSN PA4 +#define MOTOR1_ENN PE3 +#define MOTOR1_SPI_MODE_SELECT PinNull +#define MOTOR1_REFL PD13 +#define MOTOR1_REFR PD14 +// SL_CSN +#define MOTOR2_CSN PA8 +#define MOTOR2_ENN PE6 +#define MOTOR2_SPI_MODE_SELECT PinNull +#define MOTOR2_REFL PD11 +#define MOTOR2_REFR PD12 +// CL_CSN +#define MOTOR3_CSN PA15 +#define MOTOR3_ENN PE7 +#define MOTOR3_SPI_MODE_SELECT PinNull +#define MOTOR3_REFL PD9 +#define MOTOR3_REFR PD10 \ No newline at end of file diff --git a/usrc/subboards/subboard30_shake_module/subboard30_shake_module.cpp b/usrc/subboards/subboard30_shake_module/subboard30_shake_module.cpp index 69071fb..d9d0eec 100644 --- a/usrc/subboards/subboard30_shake_module/subboard30_shake_module.cpp +++ b/usrc/subboards/subboard30_shake_module/subboard30_shake_module.cpp @@ -2,9 +2,11 @@ extern "C" { #include "subboard30_shake_module_board.h" } -#include "sdk\components\step_motor_ctrl_module\step_motor_ctrl_module.hpp" +#include "pri_board.h" #include "public_service/public_service.hpp" - +#include "sdk/components/mini_servo_motor/feite_servo_motor.hpp" +#include "sdk/components/mini_servo_motor/mini_servo_motor_ctrl_module.hpp" +#include "sdk\components\step_motor_ctrl_module\step_motor_ctrl_module.hpp" #define TAG "ShakeModule" @@ -12,24 +14,37 @@ using namespace iflytop; Subboard30ShakeModule::Subboard30ShakeModule(/* args */) {} Subboard30ShakeModule::~Subboard30ShakeModule() {} - -int32_t Subboard30ShakeModule::getmoduleId(int off) { return zdevice_id_mgr_get_device_id() + off; } +int32_t Subboard30ShakeModule::getmoduleId(int off) { return zdevice_id_mgr_get_device_id() + off; } +Subboard30ShakeModule *Subboard30ShakeModule::ins() { + static Subboard30ShakeModule instance; + return &instance; +} /*********************************************************************************************************************** - * ZIModule * + * PRI * ***********************************************************************************************************************/ + +static ZGPIO IO[4]; + int32_t Subboard30ShakeModule::getid(int32_t *id) { *id = getmoduleId(0); return 0; } int32_t Subboard30ShakeModule::module_xxx_reg(int32_t param_id, bool read, int32_t &val) { return err::kmodule_not_find_reg; } -/*********************************************************************************************************************** - * ZIBoard * - ***********************************************************************************************************************/ -int32_t Subboard30ShakeModule::board_read_io(int32_t ioindex, int32_t *val) { return 0; } +int32_t Subboard30ShakeModule::board_read_io(int32_t ioindex, int32_t *val) { + if (ioindex < 0 || ioindex >= ZARRAY_SIZE(IO)) { + return err::kparam_out_of_range; + } + *val = IO[ioindex].getState(); + return 0; +} int32_t Subboard30ShakeModule::board_write_io(int32_t ioindex, int32_t val) { return 0; } void Subboard30ShakeModule::initialize() { + IO[0].initAsInput(PinNull, ZGPIO::kMode_nopull, ZGPIO::kIRQ_noIrq, true); + IO[1].initAsInput(PinNull, ZGPIO::kMode_nopull, ZGPIO::kIRQ_noIrq, true); + IO[2].initAsInput(PinNull, ZGPIO::kMode_nopull, ZGPIO::kIRQ_noIrq, true); + IO[3].initAsInput(PinNull, ZGPIO::kMode_nopull, ZGPIO::kIRQ_noIrq, true); #if 1 @@ -88,7 +103,7 @@ void Subboard30ShakeModule::initialize() { StepMotorCtrlModule::create_default_cfg(stepcfg); stepcfg.stepmotor_irun = 15; - module.initialize(getmoduleId(subid), &motor, input, ZARRAY_SIZE(input), &stepcfg); + module.initialize(getmoduleId(subid), &motor, input, ZARRAY_SIZE(input), &stepcfg); GService::inst()->getZCanProtocolParser()->registerModule(&module); ZLOGI(TAG, "motor%d readic version %x", subid, motor.readICVersion()); } @@ -117,14 +132,62 @@ void Subboard30ShakeModule::initialize() { StepMotorCtrlModule::create_default_cfg(stepcfg); stepcfg.stepmotor_irun = 15; - module.initialize(getmoduleId(subid), &motor, input, ZARRAY_SIZE(input), &stepcfg); + module.initialize(getmoduleId(subid), &motor, input, ZARRAY_SIZE(input), &stepcfg); GService::inst()->getZCanProtocolParser()->registerModule(&module); ZLOGI(TAG, "motor%d readic version %x", subid, motor.readICVersion()); } -#endif -} -Subboard30ShakeModule *Subboard30ShakeModule::ins() { - static Subboard30ShakeModule instance; - return &instance; + static FeiTeServoMotor feiteservomotor_bus; // 飞特舵机总线 + + { + // 飞特舵机总线 + ZASSERT(huart3.Init.BaudRate == 1000000); + feiteservomotor_bus.initialize(&huart3, hdma_usart3_rx, hdma_usart3_tx); + } + + { + static MiniServoCtrlModule::config_t cfg = {0}; + static MiniServoCtrlModule module; + int subid = 4; + int subidInBus = 1; + + module.create_default_config(cfg); + module.initialize(getmoduleId(subid), &feiteservomotor_bus, subidInBus, &cfg); + GService::inst()->getZCanProtocolParser()->registerModule(&module); + } + + { + static MiniServoCtrlModule::config_t cfg = {0}; + static MiniServoCtrlModule module; + int subid = 5; + int subidInBus = 2; + + module.create_default_config(cfg); + module.initialize(getmoduleId(subid), &feiteservomotor_bus, subidInBus, &cfg); + GService::inst()->getZCanProtocolParser()->registerModule(&module); + } + + { + static MiniServoCtrlModule::config_t cfg = {0}; + static MiniServoCtrlModule module; + int subid = 6; + int subidInBus = 3; + + module.create_default_config(cfg); + module.initialize(getmoduleId(subid), &feiteservomotor_bus, subidInBus, &cfg); + GService::inst()->getZCanProtocolParser()->registerModule(&module); + } + + { + static MiniServoCtrlModule::config_t cfg = {0}; + static MiniServoCtrlModule module; + int subid = 7; + int subidInBus = 4; + + module.create_default_config(cfg); + module.initialize(getmoduleId(subid), &feiteservomotor_bus, subidInBus, &cfg); + GService::inst()->getZCanProtocolParser()->registerModule(&module); + } + +#endif } diff --git a/usrc/subboards/subboard30_shake_module/subboard30_shake_module_board.c b/usrc/subboards/subboard30_shake_module/subboard30_shake_module_board.c index abcc36b..d8c9185 100644 --- a/usrc/subboards/subboard30_shake_module/subboard30_shake_module_board.c +++ b/usrc/subboards/subboard30_shake_module/subboard30_shake_module_board.c @@ -2,7 +2,7 @@ #include "public_service/public_service.h" /* SPI1 init function */ -void MX_SPI1_Init(void) { +static void MX_SPI1_Init(void) { __HAL_RCC_SPI1_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE(); @@ -32,7 +32,78 @@ void MX_SPI1_Init(void) { hspi1_enable = true; } +static void UART3_Init() { + GPIO_InitTypeDef GPIO_InitStruct = {0}; + + __HAL_RCC_USART3_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_DMA1_CLK_ENABLE(); + + huart3.Instance = USART3; + huart3.Init.BaudRate = 1000000; + huart3.Init.WordLength = UART_WORDLENGTH_8B; + huart3.Init.StopBits = UART_STOPBITS_1; + huart3.Init.Parity = UART_PARITY_NONE; + huart3.Init.Mode = UART_MODE_TX_RX; + huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart3.Init.OverSampling = UART_OVERSAMPLING_16; + if (HAL_UART_Init(&huart3) != HAL_OK) { + Error_Handler(); + } + + GPIO_InitStruct.Pin = GPIO_PIN_10 | GPIO_PIN_11; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF7_USART3; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + hdma1_stream1.Instance = DMA1_Stream1; + hdma1_stream1.Init.Channel = DMA_CHANNEL_4; + hdma1_stream1.Init.Direction = DMA_PERIPH_TO_MEMORY; + hdma1_stream1.Init.PeriphInc = DMA_PINC_DISABLE; + hdma1_stream1.Init.MemInc = DMA_MINC_ENABLE; + hdma1_stream1.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma1_stream1.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma1_stream1.Init.Mode = DMA_NORMAL; + hdma1_stream1.Init.Priority = DMA_PRIORITY_LOW; + hdma1_stream1.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + if (HAL_DMA_Init(&hdma1_stream1) != HAL_OK) { + Error_Handler(); + } + + __HAL_LINKDMA(&huart3, hdmarx, hdma1_stream1); + + hdma1_stream3.Instance = DMA1_Stream3; + hdma1_stream3.Init.Channel = DMA_CHANNEL_4; + hdma1_stream3.Init.Direction = DMA_MEMORY_TO_PERIPH; + hdma1_stream3.Init.PeriphInc = DMA_PINC_DISABLE; + hdma1_stream3.Init.MemInc = DMA_MINC_ENABLE; + hdma1_stream3.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma1_stream3.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma1_stream3.Init.Mode = DMA_NORMAL; + hdma1_stream3.Init.Priority = DMA_PRIORITY_LOW; + hdma1_stream3.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + if (HAL_DMA_Init(&hdma1_stream3) != HAL_OK) { + Error_Handler(); + } + + __HAL_LINKDMA(&huart3, hdmatx, hdma1_stream3); + + hdma_usart3_rx = &hdma1_stream1; + hdma_usart3_tx = &hdma1_stream3; + hdma1_stream1_enable = true; + hdma1_stream3_enable = true; + + HAL_NVIC_SetPriority(DMA1_Stream1_IRQn, 5, 0); + HAL_NVIC_EnableIRQ(DMA1_Stream1_IRQn); + + HAL_NVIC_SetPriority(DMA1_Stream3_IRQn, 5, 0); + HAL_NVIC_EnableIRQ(DMA1_Stream3_IRQn); +} + void subboard30_shake_module_board_init() { common_hardware_init(); MX_SPI1_Init(); + UART3_Init(); } diff --git a/usrc/subboards/subboard30_shake_module/subboard30_shake_module_board.h b/usrc/subboards/subboard30_shake_module/subboard30_shake_module_board.h index dc6e2dd..a684128 100644 --- a/usrc/subboards/subboard30_shake_module/subboard30_shake_module_board.h +++ b/usrc/subboards/subboard30_shake_module/subboard30_shake_module_board.h @@ -1,26 +1,7 @@ #pragma once #include "main.h" -#define TMC_MOTOR_SPI hspi1 -// JL_CSN -#define MOTOR1_CSN PA4 -#define MOTOR1_ENN PE3 -#define MOTOR1_SPI_MODE_SELECT PinNull -#define MOTOR1_REFL PD13 -#define MOTOR1_REFR PD14 -// SL_CSN -#define MOTOR2_CSN PA8 -#define MOTOR2_ENN PE6 -#define MOTOR2_SPI_MODE_SELECT PinNull -#define MOTOR2_REFL PD11 -#define MOTOR2_REFR PD12 -// CL_CSN -#define MOTOR3_CSN PA15 -#define MOTOR3_ENN PE7 -#define MOTOR3_SPI_MODE_SELECT PinNull -#define MOTOR3_REFL PD9 -#define MOTOR3_REFR PD10 -#define MOTOR_CFG_FLASH_MARK "MOTOR_CFG_FLASH_MARK" + #ifdef __cplusplus extern "C" { diff --git a/usrc/sysmgr/sys_mgr.cpp b/usrc/sysmgr/sys_mgr.cpp new file mode 100644 index 0000000..ea8a87e --- /dev/null +++ b/usrc/sysmgr/sys_mgr.cpp @@ -0,0 +1,135 @@ +#include "sys_mgr.hpp" +#include "sdk/os/zos.hpp" +#include "project_configs.h" + +#include +#include + +using namespace iflytop; + +#define TAG "SysMgr" + + +extern "C" { + +/*********************************************************************************************************************** + * STM32_CODE_ERROR * + ***********************************************************************************************************************/ +void SysMgr_on_Error_Handler() { + ZLOGE(TAG, "Error_Handler\n"); + while (1) { + } +} + +void SysMgr_on_assert_failed(uint8_t* file, uint32_t line) { + ZLOGE(TAG, "ASSERT: %s [%s:%d]\n", file, line); + while (1) { + } +} + +/*********************************************************************************************************************** + * STM32_ERROR_IRQ * + ***********************************************************************************************************************/ +void SysMgr_on_NMI_Handler(void) { ZLOGI(TAG, "on NMI_Handler"); } +void SysMgr_on_HardFault_Handler(void) { ZLOGI(TAG, "on HardFault_Handler"); } +void SysMgr_on_MemManage_Handler(void) { ZLOGI(TAG, "on MemManage_Handler"); } +void SysMgr_on_BusFault_Handler(void) { ZLOGI(TAG, "on BusFault_Handler"); } +void SysMgr_on_UsageFault_Handler(void) { ZLOGI(TAG, "on UsageFault_Handler"); } + +/*********************************************************************************************************************** + * FREERTOS_ERROR * + ***********************************************************************************************************************/ +void vApplicationStackOverflowHook(xTaskHandle xTask, signed char* pcTaskName) { + ZLOGE(TAG, "StackOverflowHook: %s\n", pcTaskName); + __disable_irq(); + while (1) { + } +} +void vApplicationMallocFailedHook(void) { + ZLOGE(TAG, "MallocFailedHook\n"); + __disable_irq(); + while (1) { + } +} +} +SysMgr* SysMgr::ins() { + static SysMgr s_ins; + return &s_ins; +} +// void SysMgr::regTaskId(osThreadId id) { +// m_task[m_ntask].Id = id; +// m_ntask++; +// } +size_t SysMgr::osGetSysRunTime() { return HAL_GetTick(); } +UBaseType_t uxTaskGetSystemState(TaskStatus_t* const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t* const pulTotalRunTime); + +void SysMgr::initedFinished() { // + static TaskStatus_t pxTaskStatusArray[SDK_MAX_TASK + 1]; + UBaseType_t uxArraySize = SDK_MAX_TASK + 1; + uint32_t pulTotalRunTime; + m_ntask = uxTaskGetSystemState(pxTaskStatusArray, uxArraySize, &pulTotalRunTime); + for (int i = 0; i < m_ntask; i++) { + m_task[i].Id = pxTaskStatusArray[i].xHandle; + } + ZASSERT_INFO(m_ntask < SDK_MAX_TASK, "task num is too large, please increase SDK_MAX_TASK"); +} + +size_t SysMgr::osGetMinimumEverFreeHeapSize() { return ::xPortGetMinimumEverFreeHeapSize(); } +size_t SysMgr::osGetFreeHeapSize() { return ::xPortGetFreeHeapSize(); } +size_t SysMgr::osGetTotalHeapSize() { return configTOTAL_HEAP_SIZE; } +int32_t SysMgr::getTaskNum() { return m_ntask; } + +void SysMgr::dumpSysInfo() { + zos_log("---------------Heap Info--------------\n"); + zos_log("MinimumEverFreeHeapSize: %d\n", osGetMinimumEverFreeHeapSize()); + zos_log("FreeHeapSize : %d\n", osGetFreeHeapSize()); + zos_log("TotalHeapSize : %d\n", osGetTotalHeapSize()); + zos_log(""); + + zos_log("---------------Task Info--------------\n"); + static char buf[40 * SDK_MAX_TASK]; // 40一个任务，最多支持10个任务 + vTaskList(buf); + zos_log("Name State Priority Stack Num\n"); + zlog_raw(buf); + zos_log("- TaskInfoEnd -\n"); +} + +uint32_t SysMgr::osTaskStackRemainingSize(osThreadId id) { return uxTaskGetStackHighWaterMark(id); } +const char* SysMgr::osTaskName(osThreadId id) { return pcTaskGetName(id); } + +osThreadId SysMgr::osGetId(int offset) { + if (offset < m_ntask) { + return m_task[offset].Id; + } + return NULL; +} + +void SysMgr::osTaskName(osThreadId id, char* name, int bufsize) { + strncpy(name, pcTaskGetName(id), bufsize); + name[bufsize - 1] = 0; +} +void SysMgr::osTaskStackRemainingSize(osThreadId id, uint16_t* remainsize) { *remainsize = uxTaskGetStackHighWaterMark(id); } +void SysMgr::osTaskPriority(osThreadId id, uint16_t* priority) { *priority = uxTaskPriorityGet(id); } +void SysMgr::osTaskGetState(osThreadId id, char* state) { + eTaskState task_state = eTaskGetState(id); + switch (task_state) { + case eRunning: + *state = 'X'; + break; + case eReady: + *state = 'R'; + break; + case eBlocked: + *state = 'B'; + break; + case eSuspended: + *state = 'S'; + break; + case eDeleted: + *state = 'D'; + break; + default: + *state = '?'; + break; + } +} diff --git a/usrc/sysmgr/sys_mgr.hpp b/usrc/sysmgr/sys_mgr.hpp new file mode 100644 index 0000000..6207539 --- /dev/null +++ b/usrc/sysmgr/sys_mgr.hpp @@ -0,0 +1,49 @@ +#pragma once +#include "cmsis_os.h" + +namespace iflytop { +class ZTaskInfo { + public: + osThreadId Id; +}; + +class SysMgr { + private: + /* data */ + + public: + ZTaskInfo m_task[30] = {0}; + int m_ntask = 0; + + static SysMgr* ins(); + void initedFinished(); + + void dumpSysInfo(); + + size_t osGetSysRunTime(); + + /*********************************************************************************************************************** + * HeapMgr * + ***********************************************************************************************************************/ + size_t osGetMinimumEverFreeHeapSize(); + size_t osGetFreeHeapSize(); + size_t osGetTotalHeapSize(); + + /*********************************************************************************************************************** + * TaskInfo * + ***********************************************************************************************************************/ + + osThreadId osGetId(int offset); + + uint32_t osTaskStackRemainingSize(osThreadId id); + const char* osTaskName(osThreadId id); + + void osTaskName(osThreadId id, char* name, int bufsize); + void osTaskStackRemainingSize(osThreadId id, uint16_t* remainsize); + void osTaskPriority(osThreadId id, uint16_t* priority); + void osTaskGetState(osThreadId id, char* state); + + int32_t getTaskNum(); +}; + +} // namespace iflytop