project_boditech_vidas_a8000_v3
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a8000_subboard_sdk
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修改日志接口

master
zhaohe 2 years ago
parent
6d44e64dd5
commit
0a7803b182
15 changed files with 119 additions and 49 deletions
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  1. 12
      chip/basic/logger.cpp
  2. 46
      chip/basic/logger.hpp
  3. 12
      chip/chip.cpp
  4. 6
      chip/chip_tim_irq_shceduler.cpp
  5. 4
      chip/zgpio.cpp
  6. 6
      chip/zpwm_generator.cpp
  7. 12
      chip/ztim.cpp
  8. 8
      chip/zuart.cpp
  9. 2
      os/mutex.cpp
  10. 1
      os/zos.cpp
  11. 3
      os/zos.hpp
  12. 2
      os/zos_schduler.cpp
  13. 1
      os/zos_thread.cpp
  14. 6
      os/zoslogger.cpp
  15. 47
      os/zoslogger.hpp

12
chip/basic/logger.cpp
View File

@ -1,5 +1,9 @@
#include "logger.hpp"
#include <stdarg.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
extern "C" {
static zchip_uart_t* m_huart;
bool g_enable_log = true;
@ -26,4 +30,12 @@ __attribute__((used)) int _write(int fd, char* buf, int size) {
void zchip_loggger_init(zchip_uart_t* huart) { m_huart = huart; }
void zchip_loggger_enable(bool enable) { g_enable_log = enable; }
void zchip_log(const char* fmt, ...) {
if (g_enable_log) {
va_list args;
va_start(args, fmt);
vprintf(fmt, args);
va_end(args);
}
}
}

46
chip/basic/logger.hpp
View File

@ -7,36 +7,36 @@
extern "C" {
extern bool g_enable_log;
#define ZLOG_RELEASE(TAG, fmt, ...) \
if (g_enable_log) { \
printf(TAG "" fmt "\n", ##__VA_ARGS__); \
#define ZEARLY_LOG_RELEASE(TAG, fmt, ...) \
if (g_enable_log) { \
zchip_log(TAG "" fmt "\n", ##__VA_ARGS__); \
}
#define ZLOGI(TAG, fmt, ...) \
if (g_enable_log) { \
printf("%08lu INFO [%-8s] " fmt "\n", zchip_clock_get_ticket(), TAG, ##__VA_ARGS__); \
#define ZEARLY_LOGI(TAG, fmt, ...) \
if (g_enable_log) { \
zchip_log("%08lu INFO [%-8s] " fmt "\n", zchip_clock_get_ticket(), TAG, ##__VA_ARGS__); \
}
#define ZLOGD(TAG, fmt, ...) \
if (g_enable_log) { \
printf("%08lu DEBU [%-8s] " fmt "\n", zchip_clock_get_ticket(), TAG, ##__VA_ARGS__); \
#define ZEARLY_LOGD(TAG, fmt, ...) \
if (g_enable_log) { \
zchip_log("%08lu DEBU [%-8s] " fmt "\n", zchip_clock_get_ticket(), TAG, ##__VA_ARGS__); \
}
#define ZLOGE(TAG, fmt, ...) \
if (g_enable_log) { \
printf("%08lu ERRO [%-8s] " fmt "\n", zchip_clock_get_ticket(), TAG, ##__VA_ARGS__); \
#define ZEARLY_LOGE(TAG, fmt, ...) \
if (g_enable_log) { \
zchip_log("%08lu ERRO [%-8s] " fmt "\n", zchip_clock_get_ticket(), TAG, ##__VA_ARGS__); \
}
#define ZLOGW(TAG, fmt, ...) \
if (g_enable_log) { \
printf("%08lu WARN [%-8s] " fmt "\n", zchip_clock_get_ticket(), TAG, ##__VA_ARGS__); \
#define ZEARLY_LOGW(TAG, fmt, ...) \
if (g_enable_log) { \
zchip_log("%08lu WARN [%-8s] " fmt "\n", zchip_clock_get_ticket(), TAG, ##__VA_ARGS__); \
}
#define ZASSERT(cond) \
if (!(cond)) { \
while (1) { \
printf("ASSERT: %s [%s:%d]\n", #cond, __FILE__, __LINE__); \
zchip_clock_early_delayus(1000 * 1000); \
} \
#define ZEARLY_ASSERT(cond) \
if (!(cond)) { \
while (1) { \
zchip_log("ASSERT: %s [%s:%d]\n", #cond, __FILE__, __LINE__); \
zchip_clock_early_delayus(1000 * 1000); \
} \
}
void zchip_loggger_init(zchip_uart_t *huart);
void zchip_log(const char* fmt, ...);
void zchip_loggger_init(zchip_uart_t* huart);
void zchip_loggger_enable(bool enable);
}

12
chip/chip.cpp
View File

@ -28,11 +28,11 @@ void chip_init(chip_cfg_t *cfg) {
},
300);
ZLOGI("SYS", "chip init ok");
ZLOGI("SYS", "= manufacturer : %s", MANUFACTURER);
ZLOGI("SYS", "= project name : %s", PROJECT_NAME);
ZLOGI("SYS", "= version : %s", VERSION);
ZLOGI("SYS", "= freq : %d", HAL_RCC_GetSysClockFreq());
ZLOGI("SYS", "= build time : %s", __DATE__ " " __TIME__);
ZEARLY_LOGI("SYS", "chip init ok");
ZEARLY_LOGI("SYS", "= manufacturer : %s", MANUFACTURER);
ZEARLY_LOGI("SYS", "= project name : %s", PROJECT_NAME);
ZEARLY_LOGI("SYS", "= version : %s", VERSION);
ZEARLY_LOGI("SYS", "= freq : %d", HAL_RCC_GetSysClockFreq());
ZEARLY_LOGI("SYS", "= build time : %s", __DATE__ " " __TIME__);
}
}

6
chip/chip_tim_irq_shceduler.cpp
View File

@ -18,7 +18,7 @@ void ChipTimIrqShceduler::initialize(Cfg* cfg) {
}
void ChipTimIrqShceduler::regPeriodJob(jobcb_t jobcb, uint32_t period_ms) {
ChipTimIrqShceduler::Job* periodJob = new ChipTimIrqShceduler::Job(jobcb, period_ms);
ZASSERT(periodJob != NULL);
ZEARLY_ASSERT(periodJob != NULL);
m_periodJobs.push_back(periodJob);
}
@ -27,12 +27,12 @@ void ChipTimIrqShceduler::regPeriodJob(jobcb_t jobcb, uint32_t period_ms) {
*******************************************************************************/
void ChipTimIrqShceduler::simpleTimer_startByPeriod(uint32_t periodus) { simpleTimer_startByFreq(1000000.0 / periodus); }
void ChipTimIrqShceduler::simpleTimer_startByFreq(float freq) {
// ZASSERT(m_htim->Init.AutoReloadPreload == TIM_AUTORELOAD_PRELOAD_ENABLE)
// ZEARLY_ASSERT(m_htim->Init.AutoReloadPreload == TIM_AUTORELOAD_PRELOAD_ENABLE)
uint32_t prescaler = 0;
uint32_t autoreload = 0;
ZASSERT(chip_calculate_prescaler_and_autoreload_by_expect_freq(chip_get_timer_clock_sorce_freq(m_htim), freq, &prescaler, &autoreload));
ZEARLY_ASSERT(chip_calculate_prescaler_and_autoreload_by_expect_freq(chip_get_timer_clock_sorce_freq(m_htim), freq, &prescaler, &autoreload));
HAL_TIM_Base_DeInit(m_htim);
m_htim->Init.Prescaler = prescaler;

4
chip/zgpio.cpp
View File

@ -129,7 +129,7 @@ void regIRQGPIO(ZGPIO *gpio) {
}
}
ZASSERT((s_irqGPIO_num + 1) < (int)ZARRAY_SIZE(s_irqGPIO));
EARLY_ASSERT((s_irqGPIO_num + 1) < (int)ZARRAY_SIZE(s_irqGPIO));
s_irqGPIO[s_irqGPIO_num] = gpio;
s_irqGPIO_num++;
}
@ -332,7 +332,7 @@ IRQn_Type ZGPIO::getEXTIIRQn() {
case GPIO_PIN_15:
return EXTI15_10_IRQn;
default:
ZASSERT(0);
ZEARLY_ASSERT(0);
}
return EXTI0_IRQn;
}

6
chip/zpwm_generator.cpp
View File

@ -9,8 +9,8 @@ void ZPWMGenerator::initialize(zchip_tim_t *htim, uint32_t channel, float freq,
m_channel = channel;
m_freq = freq;
ZASSERT(m_htim->Init.AutoReloadPreload == TIM_AUTORELOAD_PRELOAD_ENABLE);
ZASSERT(m_htim->Init.CounterMode == TIM_COUNTERMODE_UP);
ZEARLY_ASSERT(m_htim->Init.AutoReloadPreload == TIM_AUTORELOAD_PRELOAD_ENABLE);
ZEARLY_ASSERT(m_htim->Init.CounterMode == TIM_COUNTERMODE_UP);
}
/******************************************************
@ -29,7 +29,7 @@ void ZPWMGenerator::startPWM(float freq, float duty) {
uint32_t autoreload = 0;
uint32_t timClkFreq = chip_get_timer_clock_sorce_freq(m_htim);
ZASSERT(chip_calculate_prescaler_and_autoreload_by_expect_freq(timClkFreq, freq, &prescaler, &autoreload));
ZEARLY_ASSERT(chip_calculate_prescaler_and_autoreload_by_expect_freq(timClkFreq, freq, &prescaler, &autoreload));
__HAL_TIM_SET_AUTORELOAD(m_htim, autoreload);
__HAL_TIM_SET_PRESCALER(m_htim, prescaler);

12
chip/ztim.cpp
View File

@ -8,9 +8,9 @@ void ZTIM::initialize(zchip_tim_t *htim, mode_t mode) {
m_mode = mode;
if (m_mode == ktm_pwm) {
ZASSERT(m_htim->Init.AutoReloadPreload == TIM_AUTORELOAD_PRELOAD_ENABLE);
ZASSERT(m_htim->Init.CounterMode == TIM_COUNTERMODE_UP);
ZASSERT(m_htim->Channel)
ZEARLY_ASSERT(m_htim->Init.AutoReloadPreload == TIM_AUTORELOAD_PRELOAD_ENABLE);
ZEARLY_ASSERT(m_htim->Init.CounterMode == TIM_COUNTERMODE_UP);
ZEARLY_ASSERT(m_htim->Channel)
}
}
ZTIM::mode_t ZTIM::getMode() { return m_mode; }
@ -28,7 +28,7 @@ ZTIM::mode_t ZTIM::getMode() { return m_mode; }
void ZTIM::simpleTimer_startByPeriod(uint32_t periodus) { simpleTimer_startByFreq(1000000.0 / periodus); }
void ZTIM::simpleTimer_startByFreq(float freq) {
ZASSERT(m_htim->Init.AutoReloadPreload == TIM_AUTORELOAD_PRELOAD_ENABLE)
ZEARLY_ASSERT(m_htim->Init.AutoReloadPreload == TIM_AUTORELOAD_PRELOAD_ENABLE)
m_timer_start = true;
uint32_t prescaler = 0;
@ -36,7 +36,7 @@ void ZTIM::simpleTimer_startByFreq(float freq) {
uint32_t timClkFreq = chip_get_timer_clock_sorce_freq(m_htim);
ZASSERT(chip_calculate_prescaler_and_autoreload_by_expect_freq(timClkFreq, freq, &prescaler, &autoreload));
ZEARLY_ASSERT(chip_calculate_prescaler_and_autoreload_by_expect_freq(timClkFreq, freq, &prescaler, &autoreload));
__HAL_TIM_SET_AUTORELOAD(m_htim, autoreload);
__HAL_TIM_SET_PRESCALER(m_htim, prescaler);
@ -58,7 +58,7 @@ void ZTIM::setPWMFreq(float freq) {
uint32_t autoreload = 0;
uint32_t timClkFreq = chip_get_timer_clock_sorce_freq(m_htim);
ZASSERT(chip_calculate_prescaler_and_autoreload_by_expect_freq(timClkFreq, freq, &prescaler, &autoreload));
ZEARLY_ASSERT(chip_calculate_prescaler_and_autoreload_by_expect_freq(timClkFreq, freq, &prescaler, &autoreload));
__HAL_TIM_SET_AUTORELOAD(m_htim, autoreload);
__HAL_TIM_SET_PRESCALER(m_htim, prescaler);
}

8
chip/zuart.cpp
View File

@ -91,7 +91,7 @@ IRQn_Type ZUART::getUartIRQType() {
return USART6_IRQn;
}
#endif
ZASSERT(false);
ZEARLY_ASSERT(false);
return USART1_IRQn;
}
@ -103,7 +103,7 @@ void ZUART::initialize(cfg_t *cfg, callback_t cb) {
m_rxBuffer = (uint8_t *)malloc(cfg->rxbuffersize);
memset(m_rxBuffer, 0, cfg->rxbuffersize);
ZASSERT(m_rxBuffer != NULL);
ZEARLY_ASSERT(m_rxBuffer != NULL);
m_rxBufferLen = cfg->rxbuffersize;
m_isRxing = false;
@ -127,8 +127,8 @@ bool ZUART::tx(const char *data) {
}
bool ZUART::startRxIt() {
ZASSERT(m_rxBuffer != NULL);
ZASSERT(NVIC_GetEnableIRQ(getUartIRQType()) != 0);
ZEARLY_ASSERT(m_rxBuffer != NULL);
ZEARLY_ASSERT(NVIC_GetEnableIRQ(getUartIRQType()) != 0);
if (m_isRxing) return true;
m_isRxing = true;

2
os/mutex.cpp
View File

@ -29,7 +29,7 @@ bool zmutex::isInit() {
void zmutex::lock() {
#ifdef IFLYTOP_ENABLE_OS
ZASSERT(recursiveMutex != NULL);
ZEARLY_ASSERT(recursiveMutex != NULL);
xSemaphoreTakeRecursive(recursiveMutex, portMAX_DELAY);
#else
chip_critical_enter();

1
os/zos.cpp
View File

@ -1,6 +1,7 @@
#include "zos.hpp"
extern "C" {
void zos_init(zos_cfg_t* cfg) { //
zos_loggger_init();
iflytop::OSDefaultSchduler::getInstance()->initialize();
}
}

3
os/zos.hpp
View File

@ -8,6 +8,8 @@
//
#include "mutex.hpp"
//
#include "zoslogger.hpp"
//
#include "ticket.hpp"
//
#include "os_default_schduler.hpp"
@ -17,6 +19,7 @@
#include "zos_schduler.hpp"
//
#include "zmath.hpp"
extern "C" {
typedef struct {
uint32_t __reserved0;

2
os/zos_schduler.cpp
View File

@ -1,5 +1,5 @@
#include "zos_schduler.hpp"
#include "zoslogger.hpp"
#include "ticket.hpp"
using namespace std;
using namespace iflytop;

1
os/zos_thread.cpp
View File

@ -1,4 +1,5 @@
#include "zos_thread.hpp"
#include "zoslogger.hpp"
using namespace iflytop;
using namespace std;

6
os/zoslogger.cpp
View File

@ -0,0 +1,6 @@
#include "zoslogger.hpp"
iflytop::zmutex glog_mutex;
extern "C" {
void zos_loggger_init() { glog_mutex.init(); }
}

47
os/zoslogger.hpp
View File

@ -0,0 +1,47 @@
#pragma once
#include <stdio.h>
#include "mutex.hpp"
#include "sdk\chip\basic\logger.hpp"
extern iflytop::zmutex glog_mutex;
extern "C" {
extern bool g_enable_log;
#define ZLOG_RELEASE(TAG, fmt, ...) \
if (g_enable_log) { \
iflytop::zlock_guard lock(glog_mutex); \
printf(TAG "" fmt "\n", ##__VA_ARGS__); \
}
#define ZLOGI(TAG, fmt, ...) \
if (g_enable_log) { \
iflytop::zlock_guard lock(glog_mutex); \
printf("%08lu INFO [%-8s] " fmt "\n", zchip_clock_get_ticket(), TAG, ##__VA_ARGS__); \
}
#define ZLOGD(TAG, fmt, ...) \
if (g_enable_log) { \
iflytop::zlock_guard lock(glog_mutex); \
printf("%08lu DEBU [%-8s] " fmt "\n", zchip_clock_get_ticket(), TAG, ##__VA_ARGS__); \
}
#define ZLOGE(TAG, fmt, ...) \
if (g_enable_log) { \
iflytop::zlock_guard lock(glog_mutex); \
printf("%08lu ERRO [%-8s] " fmt "\n", zchip_clock_get_ticket(), TAG, ##__VA_ARGS__); \
}
#define ZLOGW(TAG, fmt, ...) \
if (g_enable_log) { \
iflytop::zlock_guard lock(glog_mutex); \
printf("%08lu WARN [%-8s] " fmt "\n", zchip_clock_get_ticket(), TAG, ##__VA_ARGS__); \
}
#define ZASSERT(cond) \
if (!(cond)) { \
while (1) { \
printf("ASSERT: %s [%s:%d]\n", #cond, __FILE__, __LINE__); \
zchip_clock_early_delayus(1000 * 1000); \
} \
}
void zos_loggger_init();
}
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