From 659c73a84b15e7a9950e73d9e000b0d1d6ce091c Mon Sep 17 00:00:00 2001
From: zhaohe <h_zhaohe@163.com>
Date: Fri, 3 Nov 2023 22:12:55 +0800
Subject: [PATCH] update

---
 chip/basic/chip_helper.cpp | 76 ++++++++++++++++++++++++++++++++++++++++++++++
 chip/basic/chip_helper.hpp |  2 ++
 chip/zgpio.cpp             |  2 ++
 chip/zgpio.hpp             |  8 ++++-
 4 files changed, 87 insertions(+), 1 deletion(-)

diff --git a/chip/basic/chip_helper.cpp b/chip/basic/chip_helper.cpp
index ae97819..2231675 100644
--- a/chip/basic/chip_helper.cpp
+++ b/chip/basic/chip_helper.cpp
@@ -102,6 +102,82 @@ uint16_t chip_get_pinoff(Pin_t pin) {
   return 0;
 }
 
+const char* chip_gpio_group_get_name(GPIO_TypeDef* gpio_group) {
+  if (gpio_group == GPIOA) {
+    return "GPIOA";
+  }
+  if (gpio_group == GPIOB) {
+    return "GPIOB";
+  }
+  if (gpio_group == GPIOC) {
+    return "GPIOC";
+  }
+  if (gpio_group == GPIOD) {
+    return "GPIOD";
+  }
+  if (gpio_group == GPIOE) {
+    return "GPIOE";
+  }
+  if (gpio_group == GPIOF) {
+    return "GPIOF";
+  }
+  if (gpio_group == GPIOG) {
+    return "GPIOG";
+  }
+  return "unknown gpio group";
+}
+const char* chip_pinoff_get_name(uint16_t pinoff) {
+  if (pinoff == GPIO_PIN_0) {
+    return "0";
+  }
+  if (pinoff == GPIO_PIN_1) {
+    return "1";
+  }
+  if (pinoff == GPIO_PIN_2) {
+    return "2";
+  }
+  if (pinoff == GPIO_PIN_3) {
+    return "3";
+  }
+  if (pinoff == GPIO_PIN_4) {
+    return "4";
+  }
+  if (pinoff == GPIO_PIN_5) {
+    return "5";
+  }
+  if (pinoff == GPIO_PIN_6) {
+    return "6";
+  }
+  if (pinoff == GPIO_PIN_7) {
+    return "7";
+  }
+  if (pinoff == GPIO_PIN_8) {
+    return "8";
+  }
+  if (pinoff == GPIO_PIN_9) {
+    return "9";
+  }
+  if (pinoff == GPIO_PIN_10) {
+    return "10";
+  }
+  if (pinoff == GPIO_PIN_11) {
+    return "11";
+  }
+  if (pinoff == GPIO_PIN_12) {
+    return "12";
+  }
+  if (pinoff == GPIO_PIN_13) {
+    return "13";
+  }
+  if (pinoff == GPIO_PIN_14) {
+    return "14";
+  }
+  if (pinoff == GPIO_PIN_15) {
+    return "15";
+  }
+  return "unknown pinoff";
+}
+
 // // no tim1
 // TIM2_IRQn
 // TIM3_IRQn
diff --git a/chip/basic/chip_helper.hpp b/chip/basic/chip_helper.hpp
index b82f08a..34cc833 100644
--- a/chip/basic/chip_helper.hpp
+++ b/chip/basic/chip_helper.hpp
@@ -7,7 +7,9 @@
 
 extern "C" {
 GPIO_TypeDef* chip_get_gpio(Pin_t pin);
+const char*   chip_gpio_group_get_name(GPIO_TypeDef* gpio_group);
 uint16_t      chip_get_pinoff(Pin_t pin);
+const char*   chip_pinoff_get_name(uint16_t pinoff);
 
 void chip_critical_enter(void);
 void chip_critical_exit(void);
diff --git a/chip/zgpio.cpp b/chip/zgpio.cpp
index 1ac9efa..fe0ed54 100644
--- a/chip/zgpio.cpp
+++ b/chip/zgpio.cpp
@@ -312,6 +312,8 @@ bool ZGPIO::getState() {
 }
 bool ZGPIO::setState(bool state) {
   if (m_mirror) state = !state;
+
+  if (m_log_when_setstate) ZEARLY_LOGI(TAG, "%s:%s set %d", chip_gpio_group_get_name(m_gpio), chip_pinoff_get_name(m_pinoff), state);
   if (state) {
     HAL_GPIO_WritePin(m_gpio, m_pinoff, GPIO_PIN_SET);
   } else {
diff --git a/chip/zgpio.hpp b/chip/zgpio.hpp
index 5a0e2cf..674cc0c 100644
--- a/chip/zgpio.hpp
+++ b/chip/zgpio.hpp
@@ -45,9 +45,11 @@ class ZGPIO {
     GPIOMode_t mode;
     bool       mirror;
     bool       initLevel;
+    bool       log_when_setstate;
   } OutputGpioCfg_t;
 
  private:
+  Pin_t         m_pin;
   GPIO_TypeDef *m_gpio;
   uint16_t      m_pinoff;
   GPIOType_t    m_gpiotype;
@@ -55,6 +57,7 @@ class ZGPIO {
   GPIOIrqType_t m_irqtype;
   bool          m_mirror;
   bool          lastLevel;
+  bool          m_log_when_setstate = false;
 
   onirq_t m_onirq;
   bool    m_initflag;
@@ -64,7 +67,10 @@ class ZGPIO {
 
   void initAsInput(Pin_t pin, GPIOMode_t mode, GPIOIrqType_t irqtype, bool mirror);
   void initAsOutput(Pin_t pin, GPIOMode_t mode, bool mirror, bool initLevel);
-  void initAsOutput(OutputGpioCfg_t *outputcfg) { initAsOutput(outputcfg->pin, outputcfg->mode, outputcfg->mirror, outputcfg->initLevel); }
+  void initAsOutput(OutputGpioCfg_t *outputcfg) {
+    m_log_when_setstate = outputcfg->log_when_setstate;
+    initAsOutput(outputcfg->pin, outputcfg->mode, outputcfg->mirror, outputcfg->initLevel);
+  }
   void initAsInput(InputGpioCfg_t *inputcfg) { initAsInput(inputcfg->pin, inputcfg->mode, inputcfg->irqtype, inputcfg->mirror); }
 
   void regListener(onirq_t listener);