syncbox16ch_fpga/source/src/zutils/zutils_genlock_clk_generator.v

module zutils_genlock_clk_generator #(
    parameter SYS_CLOCK_FREQ = 100000000
) (
    input clk,   //clock input
    input rst_n, //asynchronous reset input, low active

    input  wire ctrl_sig ,
    output wire genlock_fps2397_clk,
    output wire genlock_fps2398_clk,
    output wire genlock_fps2400_clk,
    output wire genlock_fps2500_clk,
    output wire genlock_fps2997_clk,
    output wire genlock_fps3000_clk,
    output wire genlock_fps5000_clk,
    output wire genlock_fps5994_clk,
    output wire genlock_fps6000_clk


);

  zutils_pwm_generator_advanced #(
      .SYS_CLOCK_FREQ(SYS_CLOCK_FREQ),
      .OUTPUT_FREQ_P00(2397)
  ) genlock_2397 (
      .clk(clk),
      .rst_n(rst_n),
      .ctrl_sig(ctrl_sig),
      .output_signal(genlock_fps2397_clk)
  );

  zutils_pwm_generator_advanced #(
      .SYS_CLOCK_FREQ(SYS_CLOCK_FREQ),
      .OUTPUT_FREQ_P00(2398)
  ) genlock_2398 (
      .clk(clk),
      .rst_n(rst_n),
      .ctrl_sig(ctrl_sig),
      .output_signal(genlock_fps2398_clk)
  );

  zutils_pwm_generator_advanced #(
      .SYS_CLOCK_FREQ(SYS_CLOCK_FREQ),
      .OUTPUT_FREQ_P00(2400)
  ) genlock_2400 (
      .clk(clk),
      .rst_n(rst_n),
      .ctrl_sig(ctrl_sig),
      .output_signal(genlock_fps2400_clk)
  );

  zutils_pwm_generator_advanced #(
      .SYS_CLOCK_FREQ(SYS_CLOCK_FREQ),
      .OUTPUT_FREQ_P00(2500)
  ) genlock_2500 (
      .clk(clk),
      .rst_n(rst_n),
      .ctrl_sig(ctrl_sig),
      .output_signal(genlock_fps2500_clk)
  );

  zutils_pwm_generator_advanced #(
      .SYS_CLOCK_FREQ(SYS_CLOCK_FREQ),
      .OUTPUT_FREQ_P00(2997)
  ) genlock_2997 (
      .clk(clk),
      .rst_n(rst_n),
      .ctrl_sig(ctrl_sig),
      .output_signal(genlock_fps2997_clk)
  );

  zutils_pwm_generator_advanced #(
      .SYS_CLOCK_FREQ(SYS_CLOCK_FREQ),
      .OUTPUT_FREQ_P00(3000)
  ) genlock_3000 (
      .clk(clk),
      .rst_n(rst_n),
      .ctrl_sig(ctrl_sig),
      .output_signal(genlock_fps3000_clk)
  );

  zutils_pwm_generator_advanced #(
      .SYS_CLOCK_FREQ(SYS_CLOCK_FREQ),
      .OUTPUT_FREQ_P00(5000)
  ) genlock_5000 (
      .clk(clk),
      .rst_n(rst_n),
      .ctrl_sig(ctrl_sig),
      .output_signal(genlock_fps5000_clk)
  );

  zutils_pwm_generator_advanced #(
      .SYS_CLOCK_FREQ(SYS_CLOCK_FREQ),
      .OUTPUT_FREQ_P00(5994)
  ) genlock_5994 (
      .clk(clk),
      .rst_n(rst_n),
      .ctrl_sig(ctrl_sig),
      .output_signal(genlock_fps5994_clk)
  );

  zutils_pwm_generator_advanced #(
      .SYS_CLOCK_FREQ(SYS_CLOCK_FREQ),
      .OUTPUT_FREQ_P00(6000)
  ) genlock_6000 (
      .clk(clk),
      .rst_n(rst_n),
      .ctrl_sig(ctrl_sig),
      .output_signal(genlock_fps6000_clk)
  );


endmodule