From f91c99b4c13294b9f82c3ff8aa06350165d19c3c Mon Sep 17 00:00:00 2001 From: zhaohe Date: Tue, 7 May 2024 11:25:07 +0800 Subject: [PATCH] =?UTF-8?q?=E8=B0=83=E6=95=B4=E6=B5=8B=E8=AF=95=E8=BE=93?= =?UTF-8?q?=E5=87=BA?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- camera_light_src_timing_controller_fpga.pds | 50 ++++++++++++++--------------- source/src/top.v | 23 +++++++------ 2 files changed, 38 insertions(+), 35 deletions(-) diff --git a/camera_light_src_timing_controller_fpga.pds b/camera_light_src_timing_controller_fpga.pds index de61d74..0455821 100644 --- a/camera_light_src_timing_controller_fpga.pds +++ b/camera_light_src_timing_controller_fpga.pds @@ -1,5 +1,5 @@ (_flow fab_demo "2021.1-SP7" - (_comment "Generated by Fabric Compiler (version on 2021.1-SP7) at Tue May 7 10:48:58 2024") + (_comment "Generated by Fabric Compiler (version on 2021.1-SP7) at Tue May 7 11:00:42 2024") (_version "1.0.5") (_status "initial") (_project @@ -19,7 +19,7 @@ (_input (_file "source/src/top.v" + "Top:" (_format verilog) - (_timespec "2024-05-07T10:45:38") + (_timespec "2024-05-07T10:58:09") ) (_file "source/src/spi_reg_reader.v" (_format verilog) @@ -279,17 +279,17 @@ (_db_output (_file "compile/Top_comp.adf" (_format adif) - (_timespec "2024-05-07T10:47:19") + (_timespec "2024-05-07T10:58:33") ) ) (_output (_file "compile/Top.cmr" (_format verilog) - (_timespec "2024-05-07T10:47:16") + (_timespec "2024-05-07T10:58:30") ) (_file "compile/cmr.db" (_format text) - (_timespec "2024-05-07T10:47:19") + (_timespec "2024-05-07T10:58:33") ) ) ) @@ -305,21 +305,21 @@ (_db_output (_file "synthesize/Top_syn.adf" (_format adif) - (_timespec "2024-05-07T10:47:41") + (_timespec "2024-05-07T10:58:57") ) ) (_output (_file "synthesize/Top_syn.vm" (_format structural_verilog) - (_timespec "2024-05-07T10:47:43") + (_timespec "2024-05-07T10:58:59") ) (_file "synthesize/Top.snr" (_format text) - (_timespec "2024-05-07T10:47:45") + (_timespec "2024-05-07T10:59:01") ) (_file "synthesize/snr.db" (_format text) - (_timespec "2024-05-07T10:47:45") + (_timespec "2024-05-07T10:59:01") ) ) ) @@ -340,21 +340,21 @@ (_db_output (_file "device_map/Top_map.adf" (_format adif) - (_timespec "2024-05-07T10:47:51") + (_timespec "2024-05-07T10:59:07") ) ) (_output (_file "device_map/Top_dmr.prt" (_format text) - (_timespec "2024-05-07T10:47:48") + (_timespec "2024-05-07T10:59:04") ) (_file "device_map/Top.dmr" (_format text) - (_timespec "2024-05-07T10:47:51") + (_timespec "2024-05-07T10:59:07") ) (_file "device_map/dmr.db" (_format text) - (_timespec "2024-05-07T10:47:51") + (_timespec "2024-05-07T10:59:07") ) ) ) @@ -363,7 +363,7 @@ (_input (_file "device_map/camera_light_src_timing_controller_fpga.pcf" (_format pcf) - (_timespec "2024-05-07T10:47:51") + (_timespec "2024-05-07T10:59:07") ) ) ) @@ -378,33 +378,33 @@ (_db_output (_file "place_route/Top_pnr.adf" (_format adif) - (_timespec "2024-05-07T10:48:36") + (_timespec "2024-05-07T11:00:20") ) ) (_output (_file "place_route/Top.prr" (_format text) - (_timespec "2024-05-07T10:48:37") + (_timespec "2024-05-07T11:00:20") ) (_file "place_route/Top_prr.prt" (_format text) - (_timespec "2024-05-07T10:48:36") + (_timespec "2024-05-07T11:00:19") ) (_file "place_route/clock_utilization.txt" (_format text) - (_timespec "2024-05-07T10:48:36") + (_timespec "2024-05-07T11:00:19") ) (_file "place_route/Top_plc.adf" (_format adif) - (_timespec "2024-05-07T10:48:06") + (_timespec "2024-05-07T10:59:36") ) (_file "place_route/Top_pnr.netlist" (_format text) - (_timespec "2024-05-07T10:48:37") + (_timespec "2024-05-07T11:00:20") ) (_file "place_route/prr.db" (_format text) - (_timespec "2024-05-07T10:48:37") + (_timespec "2024-05-07T11:00:20") ) ) ) @@ -439,19 +439,19 @@ (_output (_file "generate_bitstream/Top.sbit" (_format text) - (_timespec "2024-05-07T10:48:57") + (_timespec "2024-05-07T11:00:41") ) (_file "generate_bitstream/Top.smsk" (_format text) - (_timespec "2024-05-07T10:48:57") + (_timespec "2024-05-07T11:00:41") ) (_file "generate_bitstream/Top.bgr" (_format text) - (_timespec "2024-05-07T10:48:57") + (_timespec "2024-05-07T11:00:41") ) (_file "generate_bitstream/bgr.db" (_format text) - (_timespec "2024-05-07T10:48:58") + (_timespec "2024-05-07T11:00:41") ) ) ) diff --git a/source/src/top.v b/source/src/top.v index 8cb3201..c77e368 100644 --- a/source/src/top.v +++ b/source/src/top.v @@ -499,18 +499,21 @@ module Top ( assign debug_bus[0] = diff_in1; assign debug_bus[1] = optocoupler_in1; - assign debug_bus[2] = diff_in2; - assign debug_bus[3] = optocoupler_in2; - assign debug_bus[4] = diff_in3; - assign debug_bus[5] = optocoupler_in3; - assign debug_bus[6] = diff_in4; - assign debug_bus[7] = optocoupler_in4; - assign debug_bus[8] = sig_bus[`SIG_EXT_TRIGGER_1]; - assign debug_bus[9] = sig_bus[`SIG_EXT_TRIGGER_2]; - assign debug_bus[10] = sig_bus[`SIG_EXT_TRIGGER_3]; + assign debug_bus[2] = sig_bus[`SIG_EXT_TRIGGER_1]; + + assign debug_bus[3] = diff_in2; + assign debug_bus[4] = optocoupler_in2; + assign debug_bus[5] = sig_bus[`SIG_EXT_TRIGGER_2]; + + assign debug_bus[6] = diff_in3; + assign debug_bus[7] = optocoupler_in3; + assign debug_bus[8] = sig_bus[`SIG_EXT_TRIGGER_3]; + + assign debug_bus[9] = diff_in4; + assign debug_bus[10] = optocoupler_in4; assign debug_bus[11] = sig_bus[`SIG_EXT_TRIGGER_4]; + assign debug_bus[12] = diff_out1; - assign debug_bus[13] = diff_out2; assign debug_bus[14] = diff_out3; assign debug_bus[15] = diff_out4;