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161 lines
3.9 KiB
161 lines
3.9 KiB
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module timecode_basesig_generator #(
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parameter SYS_CLOCK_FREQ = 10000000
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) (
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input clk,
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input rst_n,
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input [31:0] timecode_format,
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input wire en,
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output out_timecode_trigger_sig,
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output reg out_first_frame_sig,
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output reg [7:0] out_frame_num,
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output reg out_drop_frame
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);
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localparam FPS2398Format = 0;
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localparam FPS2400Format = 1;
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localparam FPS2500Format = 2;
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localparam FPS2997Format = 3;
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localparam FPS2997DropFormat = 4;
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localparam FPS3000Format = 5;
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/*******************************************************************************
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* clk generator *
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*******************************************************************************/
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wire fps2398format_clk;
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wire fps2400format_clk;
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wire fps2500format_clk;
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wire fps2997format_clk;
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wire fps2997dropformat_clk;
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wire fps3000format_clk;
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zutils_pwm_generator_advanced #(
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.SYS_CLOCK_FREQ(SYS_CLOCK_FREQ),
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.OUTPUT_FREQ_P00(2398)
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) fps2398format (
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.clk(clk),
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.rst_n(rst_n),
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.ctrl_sig(en),
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.output_signal(fps2398format_clk)
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);
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zutils_pwm_generator_advanced #(
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.SYS_CLOCK_FREQ(SYS_CLOCK_FREQ),
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.OUTPUT_FREQ_P00(2400)
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) fps2400format (
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.clk(clk),
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.rst_n(rst_n),
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.ctrl_sig(en),
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.output_signal(fps2400format_clk)
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);
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zutils_pwm_generator_advanced #(
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.SYS_CLOCK_FREQ(SYS_CLOCK_FREQ),
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.OUTPUT_FREQ_P00(2500)
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) fps2500format (
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.clk(clk),
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.rst_n(rst_n),
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.ctrl_sig(en),
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.output_signal(fps2500format_clk)
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);
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zutils_pwm_generator_advanced #(
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.SYS_CLOCK_FREQ(SYS_CLOCK_FREQ),
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.OUTPUT_FREQ_P00(2997)
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) fps2997format (
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.clk(clk),
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.rst_n(rst_n),
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.ctrl_sig(en),
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.output_signal(fps2997format_clk)
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);
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zutils_pwm_generator_advanced #(
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.SYS_CLOCK_FREQ(SYS_CLOCK_FREQ),
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.OUTPUT_FREQ_P00(2997)
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) fps2997dropformat (
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.clk(clk),
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.rst_n(rst_n),
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.ctrl_sig(en),
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.output_signal(fps2997dropformat_clk)
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);
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zutils_pwm_generator_advanced #(
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.SYS_CLOCK_FREQ(SYS_CLOCK_FREQ),
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.OUTPUT_FREQ_P00(3000)
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) fps3000format (
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.clk(clk),
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.rst_n(rst_n),
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.ctrl_sig(en),
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.output_signal(fps3000format_clk)
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);
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zutils_multiplexer_32t1_v2 timecode_clk_output_mult (
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.chooseindex(timecode_format),
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//in
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.in0(fps2398format_clk),
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.in1(fps2400format_clk),
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.in2(fps2500format_clk),
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.in3(fps2997format_clk),
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.in4(fps2997dropformat_clk),
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.in5(fps3000format_clk),
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//out
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.out(out_timecode_sig_clk_pwm)
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);
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zutils_edge_detecter timecode_sig_clk_output_edge_detecter (
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.clk(clk),
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.rst_n(rst_n),
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.in_signal(out_timecode_sig_clk_pwm),
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.in_signal_rising_edge(out_timecode_trigger_sig)
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);
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always @(posedge clk or negedge rst_n) begin
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if (!rst_n || !en) begin
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out_first_frame_sig <= 1;
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end else begin
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if (out_first_frame_sig && out_timecode_trigger_sig) begin
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out_first_frame_sig <= 0;
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end
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end
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end
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/*******************************************************************************
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* 格式解析 *
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*******************************************************************************/
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always @(*) begin
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case (timecode_format)
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FPS2398Format: begin
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out_frame_num <= 24;
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out_drop_frame <= 0;
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end
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FPS2400Format: begin
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out_frame_num <= 24;
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out_drop_frame <= 0;
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end
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FPS2500Format: begin
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out_frame_num <= 25;
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out_drop_frame <= 0;
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end
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FPS2997Format: begin
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out_frame_num <= 30;
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out_drop_frame <= 0;
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end
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FPS2997DropFormat: begin
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out_frame_num <= 30;
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out_drop_frame <= 0;
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end
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default begin
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out_frame_num <= 30;
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out_drop_frame <= 0;
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end
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endcase
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end
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endmodule
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