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//
// @功能:
// 1. 功能:同步输出,脉冲输出
// 2. 输出脉冲
// 3. 输出脉冲时长可调
// 4. 输出极性可调
//
module camera_sync_signal_output #(
parameter REG_START_ADD = 0,
parameter SYS_CLOCK_FREQ = 10000000
) (
input clk, //clock input
input rst_n, //asynchronous reset input, low active
//寄存器读写接口
input [31:0] addr,
input [31:0] wr_data,
input wr_en,
output wire [31:0] rd_data,
input internal_genlock_sig,
input ext_genlock_sig,
input test_100hz_sig,
output stm32if_camera_sync_out //ttl输出信号
);
/*******************************************************************************
* 寄存器列表 *
*******************************************************************************/
//
// 输入信号选择器
// 0: 关闭
// 1: 内部genlock
// 2: 外部genlock
// 31: 100HZ测试信号
//
wire [31:0] reg_input_signal_select;
//
// 脉冲模式-有效电平长度:
// 0~0xffffffff
//
wire [31:0] reg_pulse_mode_valid_len; // 脉冲模式-有效电平长度: 0~0xffffffff
zutils_register16 #(
.REG_START_ADD(REG_START_ADD),
.REG0_INIT(0),
.REG1_INIT(SYS_CLOCK_FREQ / 10000) //1ms
) _register (
.clk(clk),
.rst_n(rst_n),
.addr(addr),
.wr_data(wr_data),
.wr_en(wr_en),
.rd_data(rd_data),
.reg0(reg_input_signal_select),
.reg1(reg_pulse_mode_valid_len)
);
/*******************************************************************************
* 内部信号 *
*******************************************************************************/
wire in_signal_rising_edge;
wire signal_in_choose;
wire signal_pluse_output;
wire [31:0] signal_in;
assign signal_in[0] = 0;
assign signal_in[1] = internal_genlock_sig;
assign signal_in[2] = ext_genlock_sig;
assign signal_in[31] = test_100hz_sig;
zutils_multiplexer_32t1 _signal_select (
.chooseindex(reg_input_signal_select),
.signal(signal_in),
.signalout(signal_in_choose)
);
// 边沿检测
zutils_edge_detecter _signal_in (
.clk(clk),
.rst_n(rst_n),
.in_signal(signal_in_choose),
.in_signal_rising_edge(in_signal_rising_edge)
);
// 短脉冲,触发生成,长脉冲
zutils_pluse_generator _pluse_generator (
.clk(clk),
.rst_n(rst_n),
.pluse_width(reg_pulse_mode_valid_len),
.pluse_delay(0),
.trigger(in_signal_rising_edge),
.output_signal(signal_pluse_output)
);
assign stm32if_camera_sync_out = signal_pluse_output;
endmodule