zfpga_stm32_transparent/usrc/project_configs.h

#pragma once

/*******************************************************************************
 *                                ��Ŀ��������                                 *
 *******************************************************************************/
#define VERSION(main, sub, fix) (main << 16 | sub << 8 | fix << 0)


#define PC_VERSION              VERSION(3, 0, 1)
#define PC_MANUFACTURER0        ('i' | 'f' << 8 | 'l' << 16 | 'y' << 24)
#define PC_MANUFACTURER1        ('t' | 'o' << 8 | 'p' << 16 | '\0' << 24)
#define PC_PROJECT_NAME         "zlogic"
#define PC_IFLYTOP_ENABLE_OS    1
#define PC_DEVICE_TYPE          ('c' | 'l' << 8 | 's' << 16 | 't' << 24)

#define PC_DEBUG_UART             huart1
#define PC_DEBUG_UART_DMA_HANDLER hdma_usart1_rx
#define PC_DEBUG_UART_RX_BUF_SIZE 1024
#define PC_DEBUG_LIGHT_GPIO       PB0

#define PC_SYS_DELAY_US_TIMER          htim6  // US��ʱ��ʱ��
#define PC_SYS_ZTICKET_TIMER           TIM11  // ϵͳticket��ʱ��
#define PC_SYS_TIM_IRQ_SCHEDULER_TIMER htim7  // �ж϶�ʱ���жϵ�����

#define PC_IRQ_PREEMPTPRIORITY_DEFAULT 5

#define PC_NVS_ENABLE 1

/*******************************************************************************
 *                                ����ͨ�ýӿ�                                 *
 *******************************************************************************/

#define FACTORY_RESET_KEY PinNull

/**
 * @brief ״ָ̬ʾ��
 */
#define LED_R_PIN PD9
#define LED_G_PIN PD10
#define LED_B_PIN PD11

#define SPI_CS PA4

#define FPGA_UART             huart6
#define FPGA_UART_DMA_HANDLER hdma_usart6_rx

/**
 * @brief FPGA����
 */
#define FPGA_RESERVE_IOA0 PE0
#define FPGA_RESERVE_IOA1 PE1
#define FPGA_RESERVE_IOA2 PE2
#define FPGA_RESERVE_IOA3 PE3
#define FPGA_RESERVE_IOA4 PE4
#define FPGA_RESERVE_IOA5 PE5
#define FPGA_RESERVE_IOA6 PE6
#define FPGA_RESERVE_IOA7 PE7
#define FPGA_RESERVE_IOB0 PE8
#define FPGA_RESERVE_IOB1 PE9
#define FPGA_RESERVE_IOB2 PE10
#define FPGA_RESERVE_IOB3 PE11
#define FPGA_RESERVE_IOB4 PE12
#define FPGA_RESERVE_IOB5 PE13
#define FPGA_RESERVE_IOB6 PE14
#define FPGA_RESERVE_IOB7 PE15

/**
 * @brief �����
 */
#define COMMAND_UART             huart3
#define COMMAND_UART_DMA_HANDLER hdma_usart3_rx
#define COMMAND_UART_RX_BUF_SIZE 1024

/*******************************************************************************
 *                                ��Ŀ���ؽӿ�                                 *
 *******************************************************************************/

#define TEMPERATURE_SENSOR_PIN PD4  // �������¶ȴ�����
#define FAN0_POWER_PIN         PD0  // ����0
#define FAN0_FB_PIN            PD5  // ����0-FB
#define FAN1_POWER_PIN         PD1  // ����1
#define FAN1_FB_PIN            PD6  // ����1-FB