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1 year ago
  1. #include "fpga_if.h"
  2. /**
  3. * @brief fpga_ifʼ
  4. */
  5. #define TAG "fpga_if"
  6. static fpga_if_t fpga_if;
  7. zaf_gpio_t spi_cs;
  8. SemaphoreHandle_t m_spilock;
  9. #define CHECK_PIN(pin0, pin1) \
  10. { \
  11. zaf_gpio_write(&pin0, false); \
  12. bool readbak = zaf_gpio_read(&pin1); \
  13. if (readbak != false) { \
  14. ZLOGI(TAG, "pin %s %s error", #pin0, #pin1); \
  15. } \
  16. osDelay(1); \
  17. zaf_gpio_write(&pin0, true); \
  18. readbak = zaf_gpio_read(&pin1); \
  19. if (readbak != true) { \
  20. ZLOGI(TAG, "pin %s %s error", #pin0, #pin1); \
  21. } \
  22. }
  23. // void fpga_test() {
  24. // while (true) {
  25. // CHECK_PIN(fpga_if.fpga_reserve_iob0, fpga_if.fpga_reserve_ioa0);
  26. // CHECK_PIN(fpga_if.fpga_reserve_iob1, fpga_if.fpga_reserve_ioa1);
  27. // CHECK_PIN(fpga_if.fpga_reserve_iob2, fpga_if.fpga_reserve_ioa2);
  28. // CHECK_PIN(fpga_if.fpga_reserve_iob3, fpga_if.fpga_reserve_ioa3);
  29. // CHECK_PIN(fpga_if.fpga_reserve_iob4, fpga_if.fpga_reserve_ioa4);
  30. // CHECK_PIN(fpga_if.fpga_reserve_iob5, fpga_if.fpga_reserve_ioa5);
  31. // CHECK_PIN(fpga_if.fpga_reserve_iob6, fpga_if.fpga_reserve_ioa6);
  32. // CHECK_PIN(fpga_if.fpga_reserve_iob7, fpga_if.fpga_reserve_ioa7);
  33. // }
  34. // }
  35. void fpga_if_init() { //
  36. uint8_t rxbuf[1];
  37. m_spilock = xSemaphoreCreateRecursiveMutex();
  38. /**
  39. * @brief SPIδһ֮֡ǰʱǵ͵ƽ(ӦΪ)
  40. * ٴһ֡ݣʹʱ߱Ϊߵƽ
  41. */
  42. fpga_if.spi1 = &hspi1;
  43. zaf_gpio_init_as_output(&spi_cs, SPI_CS, kxs_gpio_nopull, false, true);
  44. HAL_SPI_Receive(fpga_if.spi1, rxbuf, 1, 1000);
  45. //! ioa0 ��ʱ���ڵ�����λ����
  46. zaf_gpio_init_as_input(&fpga_if.fpga_reserve_ioa0, FPGA_RESERVE_IOA0, kxs_gpio_nopull, kxs_gpio_no_irq, false);
  47. zaf_gpio_init_as_input(&fpga_if.fpga_reserve_ioa1, FPGA_RESERVE_IOA1, kxs_gpio_nopull, kxs_gpio_no_irq, false);
  48. zaf_gpio_init_as_input(&fpga_if.fpga_reserve_ioa2, FPGA_RESERVE_IOA2, kxs_gpio_nopull, kxs_gpio_no_irq, false);
  49. zaf_gpio_init_as_input(&fpga_if.fpga_reserve_ioa3, FPGA_RESERVE_IOA3, kxs_gpio_nopull, kxs_gpio_no_irq, false);
  50. zaf_gpio_init_as_input(&fpga_if.fpga_reserve_ioa4, FPGA_RESERVE_IOA4, kxs_gpio_nopull, kxs_gpio_no_irq, false);
  51. zaf_gpio_init_as_input(&fpga_if.fpga_reserve_ioa5, FPGA_RESERVE_IOA5, kxs_gpio_nopull, kxs_gpio_no_irq, false);
  52. zaf_gpio_init_as_input(&fpga_if.fpga_reserve_ioa6, FPGA_RESERVE_IOA6, kxs_gpio_nopull, kxs_gpio_no_irq, false);
  53. zaf_gpio_init_as_input(&fpga_if.fpga_reserve_ioa7, FPGA_RESERVE_IOA7, kxs_gpio_nopull, kxs_gpio_no_irq, false);
  54. zaf_gpio_init_as_output(&fpga_if.fpga_reserve_iob0, FPGA_RESERVE_IOB0, kxs_gpio_od, false, false);
  55. zaf_gpio_init_as_output(&fpga_if.fpga_reserve_iob1, FPGA_RESERVE_IOB1, kxs_gpio_od, false, false);
  56. zaf_gpio_init_as_output(&fpga_if.fpga_reserve_iob2, FPGA_RESERVE_IOB2, kxs_gpio_od, false, false);
  57. zaf_gpio_init_as_output(&fpga_if.fpga_reserve_iob3, FPGA_RESERVE_IOB3, kxs_gpio_od, false, false);
  58. zaf_gpio_init_as_output(&fpga_if.fpga_reserve_iob4, FPGA_RESERVE_IOB4, kxs_gpio_od, false, false);
  59. zaf_gpio_init_as_output(&fpga_if.fpga_reserve_iob5, FPGA_RESERVE_IOB5, kxs_gpio_od, false, false);
  60. zaf_gpio_init_as_output(&fpga_if.fpga_reserve_iob6, FPGA_RESERVE_IOB6, kxs_gpio_od, false, false);
  61. zaf_gpio_init_as_output(&fpga_if.fpga_reserve_iob7, FPGA_RESERVE_IOB7, kxs_gpio_od, false, false);
  62. #if 1
  63. zaf_gpio_write(&fpga_if.fpga_reserve_iob0, false);
  64. osDelay(2); // �ȴ�FPGA��Դ�ȶ�
  65. zaf_gpio_write(&fpga_if.fpga_reserve_iob0, true);
  66. osDelay(2); // �ȴ�FPGA�ڲ�ʱ���ȶ�
  67. #endif
  68. while (true) {
  69. uint32_t rxbuf;
  70. fpga_if_spi_read_data(0x1000, &rxbuf);
  71. if (rxbuf == 0x1000) {
  72. break;
  73. }
  74. ZLOGI(TAG, "waitting for fpga is ready %x",rxbuf);
  75. osDelay(10);
  76. }
  77. }
  78. /**
  79. * @brief SPIĴдָ
  80. *
  81. * @param add
  82. * @param txdata
  83. * @param rxdata
  84. */
  85. static void _fpga_if_spi_write_data(SPI_HandleTypeDef *hspi, uint32_t add, uint32_t txdata, uint32_t *rxdata) {
  86. uint8_t txbuf[2 + 5] = {0};
  87. uint8_t rxbuf[2 + 5] = {0};
  88. txbuf[0] = add & 0xFF;
  89. txbuf[1] = (add >> 8) & 0xFF;
  90. txbuf[1] |= 0x80; // write flag
  91. txbuf[2] = txdata & 0xFF;
  92. txbuf[3] = (txdata >> 8) & 0xFF;
  93. txbuf[4] = (txdata >> 16) & 0xFF;
  94. txbuf[5] = (txdata >> 24) & 0xFF;
  95. HAL_SPI_TransmitReceive_DMA(hspi, txbuf, rxbuf, 2 + 5);
  96. while (HAL_SPI_GetState(hspi) != HAL_SPI_STATE_READY) {
  97. }
  98. // HAL_SPI_Transmit(hspi, txbuf, 2 + 4, 1000);
  99. if (rxdata) {
  100. *rxdata = rxbuf[2] | (rxbuf[3] << 8) | (rxbuf[4] << 16) | (rxbuf[5] << 24);
  101. }
  102. }
  103. /**
  104. * @brief SPIĴָ
  105. *
  106. * @param add
  107. * @param rxdata
  108. */
  109. static void _fpga_if_spi_read_data(SPI_HandleTypeDef *hspi, uint32_t add, uint32_t *rxdata) {
  110. uint8_t txbuf[2 + 5] = {0};
  111. uint8_t rxbuf[2 + 5] = {0};
  112. txbuf[0] = add & 0xFF;
  113. txbuf[1] = (add >> 8) & 0xFF;
  114. txbuf[2] = 0;
  115. txbuf[3] = 0;
  116. txbuf[4] = 0;
  117. txbuf[5] = 0;
  118. HAL_SPI_TransmitReceive_DMA(hspi, txbuf, rxbuf, 2 + 5);
  119. while (HAL_SPI_GetState(hspi) != HAL_SPI_STATE_READY) {
  120. }
  121. if (rxdata) {
  122. *rxdata = rxbuf[2] | (rxbuf[3] << 8) | (rxbuf[4] << 16) | (rxbuf[5] << 24);
  123. }
  124. }
  125. void fpga_if_spi_write_data(uint32_t add, uint32_t txdata, uint32_t *rxdata) {
  126. xSemaphoreTakeRecursive(m_spilock, portMAX_DELAY);
  127. zaf_gpio_write(&spi_cs, false);
  128. _fpga_if_spi_write_data(fpga_if.spi1, add, txdata, rxdata);
  129. zaf_gpio_write(&spi_cs, true);
  130. zaf_delay_us(1);
  131. zaf_gpio_write(&spi_cs, false);
  132. _fpga_if_spi_read_data(fpga_if.spi1, add, rxdata);
  133. zaf_gpio_write(&spi_cs, true);
  134. xSemaphoreGiveRecursive(m_spilock);
  135. }
  136. void fpga_if_spi_read_data(uint32_t add, uint32_t *rxdata) {
  137. xSemaphoreTakeRecursive(m_spilock, portMAX_DELAY);
  138. zaf_gpio_write(&spi_cs, false);
  139. _fpga_if_spi_read_data(fpga_if.spi1, add, rxdata);
  140. zaf_gpio_write(&spi_cs, true);
  141. xSemaphoreGiveRecursive(m_spilock);
  142. }