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update

master
zhaohe 2 years ago
parent
commit
1666804f53
  1. 130
      led_test.pds
  2. 52
      source/src/top.v

130
led_test.pds

@ -1,5 +1,5 @@
(_flow fab_demo "2021.1-SP7"
(_comment "Generated by Fabric Compiler (version on 2021.1-SP7<build 86875>) at Fri Jan 12 18:29:24 2024")
(_comment "Generated by Fabric Compiler (version on 2021.1-SP7<build 86875>) at Fri Jan 12 18:49:04 2024")
(_version "1.0.5")
(_status "initial")
(_project
@ -19,7 +19,7 @@
(_input
(_file "source/src/top.v" + "Top:"
(_format verilog)
(_timespec "2024-01-12T18:26:11")
(_timespec "2024-01-12T18:48:50")
)
(_file "source/src/spi_reg_reader.v"
(_format verilog)
@ -188,7 +188,7 @@
(_input
(_file "led_test.fdc"
(_format fdc)
(_timespec "2024-01-12T18:23:52")
(_timespec "2024-01-12T18:41:11")
)
)
)
@ -239,17 +239,17 @@
(_db_output
(_file "compile/Top_comp.adf"
(_format adif)
(_timespec "2024-01-12T18:26:16")
(_timespec "2024-01-12T18:49:03")
)
)
(_output
(_file "compile/Top.cmr"
(_format verilog)
(_timespec "2024-01-12T18:26:14")
(_timespec "2024-01-12T18:49:02")
)
(_file "compile/cmr.db"
(_format text)
(_timespec "2024-01-12T18:26:16")
(_timespec "2024-01-12T18:49:04")
)
)
)
@ -259,29 +259,9 @@
)
(_task tsk_synthesis
(_command cmd_synthesize
(_gci_state (_integer 2))
(_gci_state (_integer 0))
(_option ads (_switch ON))
(_option selected_syn_tool_opt (_integer 2))
(_db_output
(_file "synthesize/Top_syn.adf"
(_format adif)
(_timespec "2024-01-12T18:26:39")
)
)
(_output
(_file "synthesize/Top_syn.vm"
(_format structural_verilog)
(_timespec "2024-01-12T18:26:40")
)
(_file "synthesize/Top.snr"
(_format text)
(_timespec "2024-01-12T18:26:41")
)
(_file "synthesize/snr.db"
(_format text)
(_timespec "2024-01-12T18:26:41")
)
)
)
(_widget wgt_tech_view
(_attribute _click_to_run (_switch ON))
@ -296,34 +276,14 @@
)
(_task tsk_devmap
(_command cmd_devmap
(_gci_state (_integer 2))
(_db_output
(_file "device_map/Top_map.adf"
(_format adif)
(_timespec "2024-01-12T18:26:45")
)
)
(_output
(_file "device_map/Top_dmr.prt"
(_format text)
(_timespec "2024-01-12T18:26:44")
)
(_file "device_map/Top.dmr"
(_format text)
(_timespec "2024-01-12T18:26:45")
)
(_file "device_map/dmr.db"
(_format text)
(_timespec "2024-01-12T18:26:45")
)
)
(_gci_state (_integer 0))
)
(_widget wgt_edit_placement_cons
(_attribute _click_to_run (_switch ON))
(_input
(_file "device_map/led_test.pcf"
(_format pcf)
(_timespec "2024-01-12T18:26:45")
(_timespec "2024-01-12T18:38:49")
)
)
)
@ -333,40 +293,8 @@
)
(_task tsk_pnr
(_command cmd_pnr
(_gci_state (_integer 2))
(_gci_state (_integer 0))
(_option mode (_string "fast"))
(_db_output
(_file "place_route/Top_pnr.adf"
(_format adif)
(_timespec "2024-01-12T18:28:37")
)
)
(_output
(_file "place_route/Top.prr"
(_format text)
(_timespec "2024-01-12T18:28:37")
)
(_file "place_route/Top_prr.prt"
(_format text)
(_timespec "2024-01-12T18:28:36")
)
(_file "place_route/clock_utilization.txt"
(_format text)
(_timespec "2024-01-12T18:28:36")
)
(_file "place_route/Top_plc.adf"
(_format adif)
(_timespec "2024-01-12T18:26:59")
)
(_file "place_route/Top_pnr.netlist"
(_format text)
(_timespec "2024-01-12T18:28:37")
)
(_file "place_route/prr.db"
(_format text)
(_timespec "2024-01-12T18:28:38")
)
)
)
(_widget wgt_power_calculator
(_attribute _click_to_run (_switch ON))
@ -375,24 +303,8 @@
(_attribute _click_to_run (_switch ON))
)
(_command cmd_report_post_pnr_timing
(_gci_state (_integer 2))
(_gci_state (_integer 0))
(_attribute _auto_exe_lock (_switch OFF))
(_db_output
(_file "report_timing/Top_rtp.adf"
(_format adif)
(_timespec "2024-01-12T18:28:44")
)
)
(_output
(_file "report_timing/Top.rtr"
(_format text)
(_timespec "2024-01-12T18:28:44")
)
(_file "report_timing/rtr.db"
(_format text)
(_timespec "2024-01-12T18:28:45")
)
)
)
(_widget wgt_arch_browser
(_attribute _click_to_run (_switch ON))
@ -410,25 +322,7 @@
)
(_task tsk_gen_bitstream
(_command cmd_gen_bitstream
(_gci_state (_integer 2))
(_output
(_file "generate_bitstream/Top.sbit"
(_format text)
(_timespec "2024-01-12T18:29:22")
)
(_file "generate_bitstream/Top.smsk"
(_format text)
(_timespec "2024-01-12T18:29:22")
)
(_file "generate_bitstream/Top.bgr"
(_format text)
(_timespec "2024-01-12T18:29:22")
)
(_file "generate_bitstream/bgr.db"
(_format text)
(_timespec "2024-01-12T18:29:24")
)
)
(_gci_state (_integer 0))
)
)
)

52
source/src/top.v

@ -599,22 +599,42 @@ module Top (
// output reg timecode_out_headphone_select, // 电平选择 0line,1:mic
// output reg timecode_out_headphone_state_led
assign debug_signal_output[0] = ex_rst_n;
assign debug_signal_output[1] = ex_clk;
assign debug_signal_output[2] = sync_ttl_out3;
assign debug_signal_output[3] = sync_ttl_out4;
assign debug_signal_output[4] = stm32if_timecode_sync_out;
assign debug_signal_output[5] = timecode_out_bnc;
assign debug_signal_output[6] = timecode_out_headphone;
assign debug_signal_output[7] = genlock_in_hsync;
assign debug_signal_output[8] = genlock_in_vsync;
assign debug_signal_output[9] = genlock_in_fsync;
assign debug_signal_output[10] = sync_ttl_in1;
assign debug_signal_output[11] = sync_ttl_in2;
assign debug_signal_output[12] = sync_ttl_in3;
assign debug_signal_output[13] = sync_ttl_in4;
assign debug_signal_output[14] = timecode_headphone_in;
assign debug_signal_output[15] = timecode_bnc_in;
// assign debug_signal_output[0] = sync_ttl_out1;
// assign debug_signal_output[1] = sync_ttl_out2;
// assign debug_signal_output[2] = sync_ttl_out3;
// assign debug_signal_output[3] = sync_ttl_out4;
// assign debug_signal_output[4] = stm32if_timecode_sync_out;
// assign debug_signal_output[5] = timecode_out_bnc;
// assign debug_signal_output[6] = timecode_out_headphone;
// assign debug_signal_output[7] = genlock_in_hsync;
// assign debug_signal_output[8] = genlock_in_vsync;
// assign debug_signal_output[9] = genlock_in_fsync;
// assign debug_signal_output[10] = sync_ttl_in1;
// assign debug_signal_output[11] = sync_ttl_in2;
// assign debug_signal_output[12] = sync_ttl_in3;
// assign debug_signal_output[13] = sync_ttl_in4;
// assign debug_signal_output[14] = timecode_headphone_in;
// assign debug_signal_output[15] = timecode_bnc_in;
assign debug_signal_output[0] = sys_clk;
assign debug_signal_output[1] = sync_ttl_in1;
assign debug_signal_output[2] = sync_ttl_in2;
assign debug_signal_output[3] = sync_ttl_in3;
assign debug_signal_output[4] = sync_ttl_in4;
assign debug_signal_output[5] = sync_ttl_out1;
assign debug_signal_output[6] = sync_ttl_out2;
assign debug_signal_output[7] = sync_ttl_out3;
assign debug_signal_output[8] = sync_ttl_out4;
assign debug_signal_output[9] = genlock_in_fsync;
assign debug_signal_output[10] = timecode_headphone_in;
assign debug_signal_output[11] = timecode_bnc_in;
assign debug_signal_output[12] = timecode_out_headphone;
assign debug_signal_output[13] = timecode_out_bnc;
assign debug_signal_output[14] = ISIG_internal_en_flag;
assign debug_signal_output[15] = 0;
assign core_board_debug_led = 1;

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