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@ -1,7 +1,85 @@ |
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define_attribute {p:rst_n} {PAP_IO_DIRECTION} {INPUT} |
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define_attribute {p:rst_n} {PAP_IO_LOC} {U12} |
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define_attribute {p:rst_n} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:rst_n} {PAP_IO_STANDARD} {LVTTL33} |
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# debug_signal_output[0] output M18 |
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# debug_signal_output[1] output K18 |
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# debug_signal_output[2] output K17 |
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# debug_signal_output[3] output H18 |
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# debug_signal_output[4] output H17 |
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# debug_signal_output[5] output G18 |
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# debug_signal_output[6] output G17 |
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# debug_signal_output[7] output F18 |
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# debug_signal_output[8] output F17 |
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# debug_signal_output[9] output G16 |
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# debug_signal_output[10] output F16 |
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# debug_signal_output[11] output H16 |
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# debug_signal_output[12] output J16 |
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# debug_signal_output[13] output C17 |
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# debug_signal_output[14] output C18 |
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# debug_signal_output[15] output A18 |
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# genlock_out_dac[0] OUTPUT A16 |
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# genlock_out_dac[1] OUTPUT B16 |
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# genlock_out_dac[2] OUTPUT A15 |
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# genlock_out_dac[3] OUTPUT B15 |
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# genlock_out_dac[4] OUTPUT A14 |
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# genlock_out_dac[5] OUTPUT B14 |
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# genlock_out_dac[6] OUTPUT A12 |
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# genlock_out_dac[7] OUTPUT B12 |
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# genlock_out_dac[8] OUTPUT A11 |
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# genlock_out_dac[9] OUTPUT B11 |
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# genlock_out_dac_clk OUTPUT H13 |
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# genlock_out_dac_state_led OUTPUT D17 |
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# stm32if_camera_sync_out OUTPUT C10 |
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# stm32if_start_signal_out OUTPUT F12 |
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# stm32if_timecode_sync_out OUTPUT G12 |
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# stm32if_timecode_add[0] OUTPUT D13 |
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# stm32if_timecode_add[1] OUTPUT D15 |
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# stm32if_timecode_add[2] OUTPUT C15 |
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# stm32if_timecode_add[3] OUTPUT E15 |
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# stm32if_timecode_data[0] OUTPUT E16 |
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# stm32if_timecode_data[1] OUTPUT A17 |
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# stm32if_timecode_data[2] OUTPUT B17 |
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# stm32if_timecode_data[3] OUTPUT B18 |
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# spi2_cs_pin INPUT V14 |
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# spi2_clk_pin INPUT V13 |
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# spi2_rx_pin INPUT U14 |
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# spi2_tx_pin OUTPUT U13 |
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# spi1_cs_pin INPUT P17 |
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# spi1_clk_pin INPUT L12 |
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# spi1_rx_pin INPUT R18 |
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# spi1_tx_pin OUTPUT R17 |
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# sync_ttl_in1 INPUT R11 |
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# sync_ttl_in1_state_led OUTPUT U10 |
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# sync_ttl_in2 INPUT P11 |
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# sync_ttl_in2_state_led OUTPUT V10 |
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# sync_ttl_in3 INPUT R13 |
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# sync_ttl_in3_state_led OUTPUT U11 |
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# sync_ttl_in4 INPUT R14 |
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# sync_ttl_in4_state_led OUTPUT U12 |
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# sync_ttl_out1 OUTPUT V17 |
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# sync_ttl_out1_state_led OUTPUT L18 |
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# sync_ttl_out2 OUTPUT T17 |
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# sync_ttl_out2_state_led OUTPUT L17 |
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# sync_ttl_out3 OUTPUT U17 |
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# sync_ttl_out3_state_led OUTPUT N16 |
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# sync_ttl_out4 OUTPUT M13 |
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# sync_ttl_out4_state_led OUTPUT N15 |
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# genlock_in_hsync INPUT U16 |
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# genlock_in_vsync INPUT V16 |
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# genlock_in_fsync INPUT T16 |
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# genlock_in_state_led OUTPUT N14 |
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# timecode_out_bnc OUTPUT L15 |
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# timecode_out_bnc_select OUTPUT A10 |
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# timecode_out_bnc_state_led OUTPUT E17 |
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# timecode_out_headphone OUTPUT N18 |
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# timecode_out_headphone_select OUTPUT B10 |
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# timecode_out_headphone_state_led OUTPUT E18 |
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# timecode_headphone_in INPUT R16 |
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# timecode_headphone_in_state_led OUTPUT V12 |
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# timecode_bnc_in INPUT R15 |
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# timecode_bnc_in_state_led INPUT D18 |
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# define_attribute {p:rst_n} {PAP_IO_DIRECTION} {INPUT} |
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# define_attribute {p:rst_n} {PAP_IO_LOC} {G13} |
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# define_attribute {p:rst_n} {PAP_IO_VCCIO} {3.3} |
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# define_attribute {p:rst_n} {PAP_IO_STANDARD} {LVTTL33} |
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define_attribute {p:sys_clk} {PAP_IO_DIRECTION} {INPUT} |
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define_attribute {p:sys_clk} {PAP_IO_LOC} {B5} |
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define_attribute {p:sys_clk} {PAP_IO_VCCIO} {3.3} |
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@ -12,21 +90,466 @@ define_attribute {p:core_board_debug_led} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:core_board_debug_led} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:core_board_debug_led} {PAP_IO_DRIVE} {4} |
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define_attribute {p:core_board_debug_led} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:spi1_tx_pin} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:spi1_tx_pin} {PAP_IO_LOC} {U13} |
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define_attribute {p:spi1_tx_pin} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:spi1_tx_pin} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:spi1_tx_pin} {PAP_IO_DRIVE} {4} |
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define_attribute {p:spi1_tx_pin} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:spi1_clk_pin} {PAP_IO_DIRECTION} {INPUT} |
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define_attribute {p:spi1_clk_pin} {PAP_IO_LOC} {V13} |
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define_attribute {p:spi1_clk_pin} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:spi1_clk_pin} {PAP_IO_STANDARD} {LVTTL33} |
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# define_attribute {p:spi1_tx_pin} {PAP_IO_DIRECTION} {OUTPUT} |
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# define_attribute {p:spi1_tx_pin} {PAP_IO_LOC} {U13} |
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# define_attribute {p:spi1_tx_pin} {PAP_IO_VCCIO} {3.3} |
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# define_attribute {p:spi1_tx_pin} {PAP_IO_STANDARD} {LVCMOS33} |
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# define_attribute {p:spi1_tx_pin} {PAP_IO_DRIVE} {4} |
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# define_attribute {p:spi1_tx_pin} {PAP_IO_SLEW} {SLOW} |
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# define_attribute {p:spi1_clk_pin} {PAP_IO_DIRECTION} {INPUT} |
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# define_attribute {p:spi1_clk_pin} {PAP_IO_LOC} {V13} |
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# define_attribute {p:spi1_clk_pin} {PAP_IO_VCCIO} {3.3} |
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# define_attribute {p:spi1_clk_pin} {PAP_IO_STANDARD} {LVTTL33} |
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# define_attribute {p:spi1_cs_pin} {PAP_IO_DIRECTION} {INPUT} |
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# define_attribute {p:spi1_cs_pin} {PAP_IO_LOC} {V14} |
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# define_attribute {p:spi1_cs_pin} {PAP_IO_VCCIO} {3.3} |
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# define_attribute {p:spi1_cs_pin} {PAP_IO_STANDARD} {LVTTL33} |
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# define_attribute {p:spi1_rx_pin} {PAP_IO_DIRECTION} {INPUT} |
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# define_attribute {p:spi1_rx_pin} {PAP_IO_LOC} {U14} |
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# define_attribute {p:spi1_rx_pin} {PAP_IO_VCCIO} {3.3} |
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# define_attribute {p:spi1_rx_pin} {PAP_IO_STANDARD} {LVTTL33} |
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define_attribute {p:debug_signal_output[0]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:debug_signal_output[0]} {PAP_IO_LOC} {M18} |
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define_attribute {p:debug_signal_output[0]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:debug_signal_output[0]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:debug_signal_output[0]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:debug_signal_output[0]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:debug_signal_output[1]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:debug_signal_output[1]} {PAP_IO_LOC} {K18} |
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define_attribute {p:debug_signal_output[1]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:debug_signal_output[1]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:debug_signal_output[1]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:debug_signal_output[1]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:debug_signal_output[2]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:debug_signal_output[2]} {PAP_IO_LOC} {K17} |
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define_attribute {p:debug_signal_output[2]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:debug_signal_output[2]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:debug_signal_output[2]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:debug_signal_output[2]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:debug_signal_output[3]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:debug_signal_output[3]} {PAP_IO_LOC} {H18} |
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define_attribute {p:debug_signal_output[3]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:debug_signal_output[3]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:debug_signal_output[3]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:debug_signal_output[3]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:debug_signal_output[4]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:debug_signal_output[4]} {PAP_IO_LOC} {H17} |
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define_attribute {p:debug_signal_output[4]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:debug_signal_output[4]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:debug_signal_output[4]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:debug_signal_output[4]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:debug_signal_output[5]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:debug_signal_output[5]} {PAP_IO_LOC} {G18} |
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define_attribute {p:debug_signal_output[5]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:debug_signal_output[5]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:debug_signal_output[5]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:debug_signal_output[5]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:debug_signal_output[6]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:debug_signal_output[6]} {PAP_IO_LOC} {G17} |
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define_attribute {p:debug_signal_output[6]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:debug_signal_output[6]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:debug_signal_output[6]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:debug_signal_output[6]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:debug_signal_output[7]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:debug_signal_output[7]} {PAP_IO_LOC} {F18} |
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define_attribute {p:debug_signal_output[7]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:debug_signal_output[7]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:debug_signal_output[7]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:debug_signal_output[7]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:debug_signal_output[8]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:debug_signal_output[8]} {PAP_IO_LOC} {F17} |
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define_attribute {p:debug_signal_output[8]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:debug_signal_output[8]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:debug_signal_output[8]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:debug_signal_output[8]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:debug_signal_output[9]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:debug_signal_output[9]} {PAP_IO_LOC} {G16} |
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define_attribute {p:debug_signal_output[9]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:debug_signal_output[9]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:debug_signal_output[9]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:debug_signal_output[9]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:debug_signal_output[10]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:debug_signal_output[10]} {PAP_IO_LOC} {F16} |
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define_attribute {p:debug_signal_output[10]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:debug_signal_output[10]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:debug_signal_output[10]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:debug_signal_output[10]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:debug_signal_output[11]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:debug_signal_output[11]} {PAP_IO_LOC} {H16} |
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define_attribute {p:debug_signal_output[11]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:debug_signal_output[11]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:debug_signal_output[11]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:debug_signal_output[11]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:debug_signal_output[12]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:debug_signal_output[12]} {PAP_IO_LOC} {J16} |
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define_attribute {p:debug_signal_output[12]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:debug_signal_output[12]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:debug_signal_output[12]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:debug_signal_output[12]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:debug_signal_output[13]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:debug_signal_output[13]} {PAP_IO_LOC} {C17} |
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define_attribute {p:debug_signal_output[13]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:debug_signal_output[13]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:debug_signal_output[13]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:debug_signal_output[13]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:debug_signal_output[14]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:debug_signal_output[14]} {PAP_IO_LOC} {C18} |
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define_attribute {p:debug_signal_output[14]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:debug_signal_output[14]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:debug_signal_output[14]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:debug_signal_output[14]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:debug_signal_output[15]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:debug_signal_output[15]} {PAP_IO_LOC} {A18} |
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define_attribute {p:debug_signal_output[15]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:debug_signal_output[15]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:debug_signal_output[15]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:debug_signal_output[15]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:genlock_out_dac[0]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:genlock_out_dac[0]} {PAP_IO_LOC} {A16} |
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define_attribute {p:genlock_out_dac[0]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:genlock_out_dac[0]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:genlock_out_dac[0]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:genlock_out_dac[0]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:genlock_out_dac[1]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:genlock_out_dac[1]} {PAP_IO_LOC} {B16} |
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define_attribute {p:genlock_out_dac[1]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:genlock_out_dac[1]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:genlock_out_dac[1]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:genlock_out_dac[1]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:genlock_out_dac[2]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:genlock_out_dac[2]} {PAP_IO_LOC} {A15} |
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define_attribute {p:genlock_out_dac[2]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:genlock_out_dac[2]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:genlock_out_dac[2]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:genlock_out_dac[2]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:genlock_out_dac[3]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:genlock_out_dac[3]} {PAP_IO_LOC} {B15} |
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define_attribute {p:genlock_out_dac[3]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:genlock_out_dac[3]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:genlock_out_dac[3]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:genlock_out_dac[3]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:genlock_out_dac[4]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:genlock_out_dac[4]} {PAP_IO_LOC} {A14} |
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define_attribute {p:genlock_out_dac[4]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:genlock_out_dac[4]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:genlock_out_dac[4]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:genlock_out_dac[4]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:genlock_out_dac[5]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:genlock_out_dac[5]} {PAP_IO_LOC} {B14} |
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define_attribute {p:genlock_out_dac[5]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:genlock_out_dac[5]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:genlock_out_dac[5]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:genlock_out_dac[5]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:genlock_out_dac[6]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:genlock_out_dac[6]} {PAP_IO_LOC} {A12} |
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define_attribute {p:genlock_out_dac[6]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:genlock_out_dac[6]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:genlock_out_dac[6]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:genlock_out_dac[6]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:genlock_out_dac[7]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:genlock_out_dac[7]} {PAP_IO_LOC} {B12} |
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define_attribute {p:genlock_out_dac[7]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:genlock_out_dac[7]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:genlock_out_dac[7]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:genlock_out_dac[7]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:genlock_out_dac[8]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:genlock_out_dac[8]} {PAP_IO_LOC} {A11} |
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define_attribute {p:genlock_out_dac[8]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:genlock_out_dac[8]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:genlock_out_dac[8]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:genlock_out_dac[8]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:genlock_out_dac[9]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:genlock_out_dac[9]} {PAP_IO_LOC} {B11} |
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define_attribute {p:genlock_out_dac[9]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:genlock_out_dac[9]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:genlock_out_dac[9]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:genlock_out_dac[9]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:genlock_out_dac_clk} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:genlock_out_dac_clk} {PAP_IO_LOC} {H13} |
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define_attribute {p:genlock_out_dac_clk} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:genlock_out_dac_clk} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:genlock_out_dac_clk} {PAP_IO_DRIVE} {4} |
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define_attribute {p:genlock_out_dac_clk} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:genlock_out_dac_state_led} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:genlock_out_dac_state_led} {PAP_IO_LOC} {D17} |
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define_attribute {p:genlock_out_dac_state_led} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:genlock_out_dac_state_led} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:genlock_out_dac_state_led} {PAP_IO_DRIVE} {4} |
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define_attribute {p:genlock_out_dac_state_led} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:stm32if_camera_sync_out} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:stm32if_camera_sync_out} {PAP_IO_LOC} {C10} |
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define_attribute {p:stm32if_camera_sync_out} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:stm32if_camera_sync_out} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:stm32if_camera_sync_out} {PAP_IO_DRIVE} {4} |
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define_attribute {p:stm32if_camera_sync_out} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:stm32if_start_signal_out} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:stm32if_start_signal_out} {PAP_IO_LOC} {F12} |
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define_attribute {p:stm32if_start_signal_out} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:stm32if_start_signal_out} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:stm32if_start_signal_out} {PAP_IO_DRIVE} {4} |
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define_attribute {p:stm32if_start_signal_out} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:stm32if_timecode_sync_out} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:stm32if_timecode_sync_out} {PAP_IO_LOC} {G12} |
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define_attribute {p:stm32if_timecode_sync_out} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:stm32if_timecode_sync_out} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:stm32if_timecode_sync_out} {PAP_IO_DRIVE} {4} |
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define_attribute {p:stm32if_timecode_sync_out} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:stm32if_timecode_add[0]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:stm32if_timecode_add[0]} {PAP_IO_LOC} {D13} |
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define_attribute {p:stm32if_timecode_add[0]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:stm32if_timecode_add[0]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:stm32if_timecode_add[0]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:stm32if_timecode_add[0]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:stm32if_timecode_add[1]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:stm32if_timecode_add[1]} {PAP_IO_LOC} {D15} |
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define_attribute {p:stm32if_timecode_add[1]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:stm32if_timecode_add[1]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:stm32if_timecode_add[1]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:stm32if_timecode_add[1]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:stm32if_timecode_add[2]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:stm32if_timecode_add[2]} {PAP_IO_LOC} {C15} |
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define_attribute {p:stm32if_timecode_add[2]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:stm32if_timecode_add[2]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:stm32if_timecode_add[2]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:stm32if_timecode_add[2]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:stm32if_timecode_add[3]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:stm32if_timecode_add[3]} {PAP_IO_LOC} {E15} |
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define_attribute {p:stm32if_timecode_add[3]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:stm32if_timecode_add[3]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:stm32if_timecode_add[3]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:stm32if_timecode_add[3]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:stm32if_timecode_data[0]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:stm32if_timecode_data[0]} {PAP_IO_LOC} {E16} |
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define_attribute {p:stm32if_timecode_data[0]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:stm32if_timecode_data[0]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:stm32if_timecode_data[0]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:stm32if_timecode_data[0]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:stm32if_timecode_data[1]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:stm32if_timecode_data[1]} {PAP_IO_LOC} {A17} |
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define_attribute {p:stm32if_timecode_data[1]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:stm32if_timecode_data[1]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:stm32if_timecode_data[1]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:stm32if_timecode_data[1]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:stm32if_timecode_data[2]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:stm32if_timecode_data[2]} {PAP_IO_LOC} {B17} |
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define_attribute {p:stm32if_timecode_data[2]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:stm32if_timecode_data[2]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:stm32if_timecode_data[2]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:stm32if_timecode_data[2]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:stm32if_timecode_data[3]} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:stm32if_timecode_data[3]} {PAP_IO_LOC} {B18} |
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define_attribute {p:stm32if_timecode_data[3]} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:stm32if_timecode_data[3]} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:stm32if_timecode_data[3]} {PAP_IO_DRIVE} {4} |
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define_attribute {p:stm32if_timecode_data[3]} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:spi1_cs_pin} {PAP_IO_DIRECTION} {INPUT} |
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define_attribute {p:spi1_cs_pin} {PAP_IO_LOC} {V14} |
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define_attribute {p:spi1_cs_pin} {PAP_IO_LOC} {P17} |
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define_attribute {p:spi1_cs_pin} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:spi1_cs_pin} {PAP_IO_STANDARD} {LVTTL33} |
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define_attribute {p:spi1_clk_pin} {PAP_IO_DIRECTION} {INPUT} |
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define_attribute {p:spi1_clk_pin} {PAP_IO_LOC} {L12} |
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define_attribute {p:spi1_clk_pin} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:spi1_clk_pin} {PAP_IO_STANDARD} {LVTTL33} |
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define_attribute {p:spi1_rx_pin} {PAP_IO_DIRECTION} {INPUT} |
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define_attribute {p:spi1_rx_pin} {PAP_IO_LOC} {U14} |
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define_attribute {p:spi1_rx_pin} {PAP_IO_LOC} {R18} |
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define_attribute {p:spi1_rx_pin} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:spi1_rx_pin} {PAP_IO_STANDARD} {LVTTL33} |
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define_attribute {p:spi1_tx_pin} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:spi1_tx_pin} {PAP_IO_LOC} {R17} |
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define_attribute {p:spi1_tx_pin} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:spi1_tx_pin} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:spi1_tx_pin} {PAP_IO_DRIVE} {4} |
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|
define_attribute {p:spi1_tx_pin} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:spi2_cs_pin} {PAP_IO_DIRECTION} {INPUT} |
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|
define_attribute {p:spi2_cs_pin} {PAP_IO_LOC} {V14} |
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|
define_attribute {p:spi2_cs_pin} {PAP_IO_VCCIO} {3.3} |
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|
define_attribute {p:spi2_cs_pin} {PAP_IO_STANDARD} {LVTTL33} |
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define_attribute {p:spi2_clk_pin} {PAP_IO_DIRECTION} {INPUT} |
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define_attribute {p:spi2_clk_pin} {PAP_IO_LOC} {V13} |
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|
define_attribute {p:spi2_clk_pin} {PAP_IO_VCCIO} {3.3} |
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|
define_attribute {p:spi2_clk_pin} {PAP_IO_STANDARD} {LVTTL33} |
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define_attribute {p:spi2_rx_pin} {PAP_IO_DIRECTION} {INPUT} |
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|
define_attribute {p:spi2_rx_pin} {PAP_IO_LOC} {U14} |
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|
define_attribute {p:spi2_rx_pin} {PAP_IO_VCCIO} {3.3} |
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|
define_attribute {p:spi2_rx_pin} {PAP_IO_STANDARD} {LVTTL33} |
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|
define_attribute {p:spi2_tx_pin} {PAP_IO_DIRECTION} {OUTPUT} |
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|
define_attribute {p:spi2_tx_pin} {PAP_IO_LOC} {U13} |
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|
define_attribute {p:spi2_tx_pin} {PAP_IO_VCCIO} {3.3} |
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|
define_attribute {p:spi2_tx_pin} {PAP_IO_STANDARD} {LVCMOS33} |
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|
define_attribute {p:spi2_tx_pin} {PAP_IO_DRIVE} {4} |
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|
define_attribute {p:spi2_tx_pin} {PAP_IO_SLEW} {SLOW} |
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|
define_attribute {p:sync_ttl_in1} {PAP_IO_DIRECTION} {INPUT} |
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|
define_attribute {p:sync_ttl_in1} {PAP_IO_LOC} {R11} |
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|
define_attribute {p:sync_ttl_in1} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:sync_ttl_in1} {PAP_IO_STANDARD} {LVTTL33} |
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define_attribute {p:sync_ttl_in1_state_led} {PAP_IO_DIRECTION} {OUTPUT} |
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|
define_attribute {p:sync_ttl_in1_state_led} {PAP_IO_LOC} {U10} |
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|
define_attribute {p:sync_ttl_in1_state_led} {PAP_IO_VCCIO} {3.3} |
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|
define_attribute {p:sync_ttl_in1_state_led} {PAP_IO_STANDARD} {LVCMOS33} |
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|
define_attribute {p:sync_ttl_in1_state_led} {PAP_IO_DRIVE} {4} |
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|
define_attribute {p:sync_ttl_in1_state_led} {PAP_IO_SLEW} {SLOW} |
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|
define_attribute {p:sync_ttl_in2} {PAP_IO_DIRECTION} {INPUT} |
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|
define_attribute {p:sync_ttl_in2} {PAP_IO_LOC} {P11} |
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|
define_attribute {p:sync_ttl_in2} {PAP_IO_VCCIO} {3.3} |
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|
define_attribute {p:sync_ttl_in2} {PAP_IO_STANDARD} {LVTTL33} |
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|
define_attribute {p:sync_ttl_in2_state_led} {PAP_IO_DIRECTION} {OUTPUT} |
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|
define_attribute {p:sync_ttl_in2_state_led} {PAP_IO_LOC} {V10} |
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|
define_attribute {p:sync_ttl_in2_state_led} {PAP_IO_VCCIO} {3.3} |
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|
define_attribute {p:sync_ttl_in2_state_led} {PAP_IO_STANDARD} {LVCMOS33} |
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|
define_attribute {p:sync_ttl_in2_state_led} {PAP_IO_DRIVE} {4} |
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|
define_attribute {p:sync_ttl_in2_state_led} {PAP_IO_SLEW} {SLOW} |
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|
define_attribute {p:sync_ttl_in3} {PAP_IO_DIRECTION} {INPUT} |
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|
define_attribute {p:sync_ttl_in3} {PAP_IO_LOC} {R13} |
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|
define_attribute {p:sync_ttl_in3} {PAP_IO_VCCIO} {3.3} |
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|
define_attribute {p:sync_ttl_in3} {PAP_IO_STANDARD} {LVTTL33} |
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|
define_attribute {p:sync_ttl_in3_state_led} {PAP_IO_DIRECTION} {OUTPUT} |
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|
|
define_attribute {p:sync_ttl_in3_state_led} {PAP_IO_LOC} {U11} |
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|
|
define_attribute {p:sync_ttl_in3_state_led} {PAP_IO_VCCIO} {3.3} |
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|
define_attribute {p:sync_ttl_in3_state_led} {PAP_IO_STANDARD} {LVCMOS33} |
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|
|
define_attribute {p:sync_ttl_in3_state_led} {PAP_IO_DRIVE} {4} |
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|
define_attribute {p:sync_ttl_in3_state_led} {PAP_IO_SLEW} {SLOW} |
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|
define_attribute {p:sync_ttl_in4} {PAP_IO_DIRECTION} {INPUT} |
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|
define_attribute {p:sync_ttl_in4} {PAP_IO_LOC} {R14} |
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|
|
define_attribute {p:sync_ttl_in4} {PAP_IO_VCCIO} {3.3} |
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|
define_attribute {p:sync_ttl_in4} {PAP_IO_STANDARD} {LVTTL33} |
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|
define_attribute {p:sync_ttl_in4_state_led} {PAP_IO_DIRECTION} {OUTPUT} |
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|
define_attribute {p:sync_ttl_in4_state_led} {PAP_IO_LOC} {U12} |
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define_attribute {p:sync_ttl_in4_state_led} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:sync_ttl_in4_state_led} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:sync_ttl_in4_state_led} {PAP_IO_DRIVE} {4} |
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define_attribute {p:sync_ttl_in4_state_led} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:sync_ttl_out1} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:sync_ttl_out1} {PAP_IO_LOC} {V17} |
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define_attribute {p:sync_ttl_out1} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:sync_ttl_out1} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:sync_ttl_out1} {PAP_IO_DRIVE} {4} |
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define_attribute {p:sync_ttl_out1} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:sync_ttl_out1_state_led} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:sync_ttl_out1_state_led} {PAP_IO_LOC} {L18} |
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define_attribute {p:sync_ttl_out1_state_led} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:sync_ttl_out1_state_led} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:sync_ttl_out1_state_led} {PAP_IO_DRIVE} {4} |
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define_attribute {p:sync_ttl_out1_state_led} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:sync_ttl_out2} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:sync_ttl_out2} {PAP_IO_LOC} {T17} |
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define_attribute {p:sync_ttl_out2} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:sync_ttl_out2} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:sync_ttl_out2} {PAP_IO_DRIVE} {4} |
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define_attribute {p:sync_ttl_out2} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:sync_ttl_out2_state_led} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:sync_ttl_out2_state_led} {PAP_IO_LOC} {L17} |
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define_attribute {p:sync_ttl_out2_state_led} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:sync_ttl_out2_state_led} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:sync_ttl_out2_state_led} {PAP_IO_DRIVE} {4} |
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define_attribute {p:sync_ttl_out2_state_led} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:sync_ttl_out3} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:sync_ttl_out3} {PAP_IO_LOC} {U17} |
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define_attribute {p:sync_ttl_out3} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:sync_ttl_out3} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:sync_ttl_out3} {PAP_IO_DRIVE} {4} |
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define_attribute {p:sync_ttl_out3} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:sync_ttl_out3_state_led} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:sync_ttl_out3_state_led} {PAP_IO_LOC} {N16} |
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define_attribute {p:sync_ttl_out3_state_led} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:sync_ttl_out3_state_led} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:sync_ttl_out3_state_led} {PAP_IO_DRIVE} {4} |
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define_attribute {p:sync_ttl_out3_state_led} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:sync_ttl_out4} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:sync_ttl_out4} {PAP_IO_LOC} {M13} |
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define_attribute {p:sync_ttl_out4} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:sync_ttl_out4} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:sync_ttl_out4} {PAP_IO_DRIVE} {4} |
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define_attribute {p:sync_ttl_out4} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:sync_ttl_out4_state_led} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:sync_ttl_out4_state_led} {PAP_IO_LOC} {N15} |
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define_attribute {p:sync_ttl_out4_state_led} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:sync_ttl_out4_state_led} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:sync_ttl_out4_state_led} {PAP_IO_DRIVE} {4} |
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define_attribute {p:sync_ttl_out4_state_led} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:genlock_in_hsync} {PAP_IO_DIRECTION} {INPUT} |
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define_attribute {p:genlock_in_hsync} {PAP_IO_LOC} {U16} |
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define_attribute {p:genlock_in_hsync} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:genlock_in_hsync} {PAP_IO_STANDARD} {LVTTL33} |
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define_attribute {p:genlock_in_vsync} {PAP_IO_DIRECTION} {INPUT} |
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define_attribute {p:genlock_in_vsync} {PAP_IO_LOC} {V16} |
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define_attribute {p:genlock_in_vsync} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:genlock_in_vsync} {PAP_IO_STANDARD} {LVTTL33} |
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define_attribute {p:genlock_in_fsync} {PAP_IO_DIRECTION} {INPUT} |
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define_attribute {p:genlock_in_fsync} {PAP_IO_LOC} {T16} |
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define_attribute {p:genlock_in_fsync} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:genlock_in_fsync} {PAP_IO_STANDARD} {LVTTL33} |
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define_attribute {p:genlock_in_state_led} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:genlock_in_state_led} {PAP_IO_LOC} {N14} |
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define_attribute {p:genlock_in_state_led} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:genlock_in_state_led} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:genlock_in_state_led} {PAP_IO_DRIVE} {4} |
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define_attribute {p:genlock_in_state_led} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:timecode_out_bnc} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:timecode_out_bnc} {PAP_IO_LOC} {L15} |
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define_attribute {p:timecode_out_bnc} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:timecode_out_bnc} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:timecode_out_bnc} {PAP_IO_DRIVE} {4} |
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define_attribute {p:timecode_out_bnc} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:timecode_out_bnc_select} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:timecode_out_bnc_select} {PAP_IO_LOC} {A10} |
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define_attribute {p:timecode_out_bnc_select} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:timecode_out_bnc_select} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:timecode_out_bnc_select} {PAP_IO_DRIVE} {4} |
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define_attribute {p:timecode_out_bnc_select} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:timecode_out_bnc_state_led} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:timecode_out_bnc_state_led} {PAP_IO_LOC} {E17} |
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define_attribute {p:timecode_out_bnc_state_led} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:timecode_out_bnc_state_led} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:timecode_out_bnc_state_led} {PAP_IO_DRIVE} {4} |
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define_attribute {p:timecode_out_bnc_state_led} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:timecode_out_headphone} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:timecode_out_headphone} {PAP_IO_LOC} {N18} |
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define_attribute {p:timecode_out_headphone} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:timecode_out_headphone} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:timecode_out_headphone} {PAP_IO_DRIVE} {4} |
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define_attribute {p:timecode_out_headphone} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:timecode_out_headphone_select} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:timecode_out_headphone_select} {PAP_IO_LOC} {B10} |
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define_attribute {p:timecode_out_headphone_select} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:timecode_out_headphone_select} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:timecode_out_headphone_select} {PAP_IO_DRIVE} {4} |
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define_attribute {p:timecode_out_headphone_select} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:timecode_out_headphone_state_led} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:timecode_out_headphone_state_led} {PAP_IO_LOC} {E18} |
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define_attribute {p:timecode_out_headphone_state_led} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:timecode_out_headphone_state_led} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:timecode_out_headphone_state_led} {PAP_IO_DRIVE} {4} |
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define_attribute {p:timecode_out_headphone_state_led} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:timecode_headphone_in} {PAP_IO_DIRECTION} {INPUT} |
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define_attribute {p:timecode_headphone_in} {PAP_IO_LOC} {R16} |
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define_attribute {p:timecode_headphone_in} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:timecode_headphone_in} {PAP_IO_STANDARD} {LVTTL33} |
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define_attribute {p:timecode_headphone_in_state_led} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:timecode_headphone_in_state_led} {PAP_IO_LOC} {V12} |
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define_attribute {p:timecode_headphone_in_state_led} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:timecode_headphone_in_state_led} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:timecode_headphone_in_state_led} {PAP_IO_DRIVE} {4} |
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define_attribute {p:timecode_headphone_in_state_led} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:timecode_bnc_in} {PAP_IO_DIRECTION} {INPUT} |
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define_attribute {p:timecode_bnc_in} {PAP_IO_LOC} {R15} |
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define_attribute {p:timecode_bnc_in} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:timecode_bnc_in} {PAP_IO_STANDARD} {LVTTL33} |
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define_attribute {p:timecode_bnc_in_state_led} {PAP_IO_DIRECTION} {OUTPUT} |
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define_attribute {p:timecode_bnc_in_state_led} {PAP_IO_LOC} {D18} |
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define_attribute {p:timecode_bnc_in_state_led} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:timecode_bnc_in_state_led} {PAP_IO_STANDARD} {LVCMOS33} |
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define_attribute {p:timecode_bnc_in_state_led} {PAP_IO_DRIVE} {4} |
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define_attribute {p:timecode_bnc_in_state_led} {PAP_IO_SLEW} {SLOW} |
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define_attribute {p:rst_n} {PAP_IO_DIRECTION} {INPUT} |
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define_attribute {p:rst_n} {PAP_IO_LOC} {G13} |
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define_attribute {p:rst_n} {PAP_IO_VCCIO} {3.3} |
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define_attribute {p:rst_n} {PAP_IO_STANDARD} {LVTTL33} |