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fpga_led_test
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zhaohe 2 years ago
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ed58ded258
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f60334450a
3 changed files with 113 additions and 27 deletions
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  1. 118
      led_test.pds
  2. 16
      source/src/top.v
  3. 6
      source/src/xsync_internal_generator.v

118
led_test.pds
View File

@ -1,5 +1,5 @@
(_flow fab_demo "2021.1-SP7"
(_comment "Generated by Fabric Compiler (version on 2021.1-SP7<build 86875>) at Thu Jan 11 11:12:15 2024")
(_comment "Generated by Fabric Compiler (version on 2021.1-SP7<build 86875>) at Thu Jan 11 12:54:38 2024")
(_version "1.0.5")
(_status "initial")
(_project
@ -19,7 +19,7 @@
(_input
(_file "source/src/top.v" + "Top:"
(_format verilog)
(_timespec "2024-01-11T11:12:05")
(_timespec "2024-01-11T11:16:40")
)
(_file "source/src/spi_reg_reader.v"
(_format verilog)
@ -87,7 +87,7 @@
)
(_file "source/src/xsync_internal_generator.v"
(_format verilog)
(_timespec "2024-01-11T11:11:25")
(_timespec "2024-01-11T12:54:37")
)
(_file "source/src/zutils/zutils_pwm_generator_advanced.v"
(_format verilog)
@ -199,17 +199,17 @@
(_db_output
(_file "compile/Top_comp.adf"
(_format adif)
(_timespec "2024-01-11T11:11:40")
(_timespec "2024-01-11T11:46:53")
)
)
(_output
(_file "compile/Top.cmr"
(_format verilog)
(_timespec "2024-01-11T11:11:39")
(_timespec "2024-01-11T11:46:51")
)
(_file "compile/cmr.db"
(_format text)
(_timespec "2024-01-11T11:11:40")
(_timespec "2024-01-11T11:46:53")
)
)
)
@ -219,27 +219,27 @@
)
(_task tsk_synthesis
(_command cmd_synthesize
(_gci_state (_integer 2))
(_gci_state (_integer 3))
(_option ads (_switch ON))
(_option selected_syn_tool_opt (_integer 2))
(_db_output
(_file "synthesize/Top_syn.adf"
(_format adif)
(_timespec "2024-01-11T11:12:09")
(_timespec "2024-01-11T11:47:22")
)
)
(_output
(_file "synthesize/Top_syn.vm"
(_format structural_verilog)
(_timespec "2024-01-11T11:12:12")
(_timespec "2024-01-11T11:47:25")
)
(_file "synthesize/Top.snr"
(_format text)
(_timespec "2024-01-11T11:12:14")
(_timespec "2024-01-11T11:47:27")
)
(_file "synthesize/snr.db"
(_format text)
(_timespec "2024-01-11T11:12:15")
(_timespec "2024-01-11T11:47:28")
)
)
)
@ -256,14 +256,34 @@
)
(_task tsk_devmap
(_command cmd_devmap
(_gci_state (_integer 0))
(_gci_state (_integer 3))
(_db_output
(_file "device_map/Top_map.adf"
(_format adif)
(_timespec "2024-01-11T11:47:31")
)
)
(_output
(_file "device_map/Top_dmr.prt"
(_format text)
(_timespec "2024-01-11T11:47:30")
)
(_file "device_map/Top.dmr"
(_format text)
(_timespec "2024-01-11T11:47:31")
)
(_file "device_map/dmr.db"
(_format text)
(_timespec "2024-01-11T11:47:31")
)
)
)
(_widget wgt_edit_placement_cons
(_attribute _click_to_run (_switch ON))
(_input
(_file "device_map/led_test.pcf"
(_format pcf)
(_timespec "2024-01-11T09:43:56")
(_timespec "2024-01-11T11:47:31")
)
)
)
@ -273,7 +293,39 @@
)
(_task tsk_pnr
(_command cmd_pnr
(_gci_state (_integer 0))
(_gci_state (_integer 3))
(_db_output
(_file "place_route/Top_pnr.adf"
(_format adif)
(_timespec "2024-01-11T11:49:15")
)
)
(_output
(_file "place_route/Top.prr"
(_format text)
(_timespec "2024-01-11T11:49:15")
)
(_file "place_route/Top_prr.prt"
(_format text)
(_timespec "2024-01-11T11:49:14")
)
(_file "place_route/clock_utilization.txt"
(_format text)
(_timespec "2024-01-11T11:49:14")
)
(_file "place_route/Top_plc.adf"
(_format adif)
(_timespec "2024-01-11T11:48:24")
)
(_file "place_route/Top_pnr.netlist"
(_format text)
(_timespec "2024-01-11T11:49:15")
)
(_file "place_route/prr.db"
(_format text)
(_timespec "2024-01-11T11:49:16")
)
)
)
(_widget wgt_power_calculator
(_attribute _click_to_run (_switch ON))
@ -282,8 +334,24 @@
(_attribute _click_to_run (_switch ON))
)
(_command cmd_report_post_pnr_timing
(_gci_state (_integer 0))
(_gci_state (_integer 3))
(_attribute _auto_exe_lock (_switch OFF))
(_db_output
(_file "report_timing/Top_rtp.adf"
(_format adif)
(_timespec "2024-01-11T11:49:21")
)
)
(_output
(_file "report_timing/Top.rtr"
(_format text)
(_timespec "2024-01-11T11:49:21")
)
(_file "report_timing/rtr.db"
(_format text)
(_timespec "2024-01-11T11:49:22")
)
)
)
(_widget wgt_arch_browser
(_attribute _click_to_run (_switch ON))
@ -301,7 +369,25 @@
)
(_task tsk_gen_bitstream
(_command cmd_gen_bitstream
(_gci_state (_integer 0))
(_gci_state (_integer 3))
(_output
(_file "generate_bitstream/Top.sbit"
(_format text)
(_timespec "2024-01-11T11:49:40")
)
(_file "generate_bitstream/Top.smsk"
(_format text)
(_timespec "2024-01-11T11:49:40")
)
(_file "generate_bitstream/Top.bgr"
(_format text)
(_timespec "2024-01-11T11:49:40")
)
(_file "generate_bitstream/bgr.db"
(_format text)
(_timespec "2024-01-11T11:49:42")
)
)
)
)
)

16
source/src/top.v
View File

@ -273,14 +273,14 @@ module Top (
assign ttl_output_module_source_sig_af[7] = ISIG_ttlin3_module_divide;
assign ttl_output_module_source_sig_af[8] = ISIG_ttlin4_module_ext;
assign ttl_output_module_source_sig_af[9] = ISIG_ttlin4_module_divide;
assign ttl_output_module_source_sig_af[10] = ISIG_internal_en_flag;
assign ttl_output_module_source_sig_af[11] = ISIG_genlock_frame_sync_ext;
assign ttl_output_module_source_sig_af[12] = ISIG_genlock_frame_sync_internal;
assign ttl_output_module_source_sig_af[13] = ISIG_timecode_frame_sync_ext;
assign ttl_output_module_source_sig_af[14] = ISIG_timecode_frame_sync_internal;
assign ttl_output_module_source_sig_af[15] = ISIG_timecode_serial_data_ext;
assign ttl_output_module_source_sig_af[16] = ISIG_timecode_serial_data_internal;
assign ttl_output_module_source_sig_af[31] = ISIG_internal_100hz;
assign ttl_output_module_source_sig_af[10] = ISIG_internal_en_flag ;
assign ttl_output_module_source_sig_af[11] = ISIG_genlock_frame_sync_ext ;
assign ttl_output_module_source_sig_af[12] = ISIG_genlock_frame_sync_internal ;
assign ttl_output_module_source_sig_af[13] = ISIG_timecode_frame_sync_ext ;
assign ttl_output_module_source_sig_af[14] = ISIG_timecode_frame_sync_internal ;
assign ttl_output_module_source_sig_af[15] = ISIG_timecode_serial_data_ext ;
assign ttl_output_module_source_sig_af[16] = ISIG_timecode_serial_data_internal ;
assign ttl_output_module_source_sig_af[31] = ISIG_internal_100hz ;
wire ISIG_logic0; // 逻辑0

6
source/src/xsync_internal_generator.v
View File

@ -158,9 +158,9 @@ module xsync_internal_generator #(
// 1.寄存器控制启动
// 2.外部触发启动
// 3.TIMECODE触发启动
// 0.寄存器触发,启动停止
// 1.外部TIMECODE触发启动,寄存器控制停止
//
// 0.手动,启动停止
// 1.外部TIMECODE触发启动
// 2.外部TTL输入1_高电平触发,低电平停止
// 3.外部TTL输入2_高电平触发,低电平停止
// 4.外部TTL输入3_高电平触发,低电平停止

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