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@ -432,6 +432,14 @@ sub tns3($) # print a time in ns, with 3 decimal digits |
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return sprintf("%.3f ns", $_[0]); |
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} |
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sub value_or_undefined |
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{ |
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my ($value, $unit) = @_; |
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return "Undefined!" unless $value; |
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$value .= " $unit" if defined $unit; |
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return $value; |
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} |
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# Parameter: EEPROM bytes 0-127 (using 3-62) |
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sub decode_sdr_sdram($) |
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{ |
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@ -494,9 +502,7 @@ sub decode_sdr_sdram($) |
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else { $temp = $bytes->[4]; } |
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printl("Number of Col Address Bits", $temp); |
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if ($bytes->[5] == 0) { $temp = "Undefined!"; } |
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else { $temp = $bytes->[5]; } |
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printl("Number of Module Rows", $temp); |
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printl("Number of Module Rows", value_or_undefined($bytes->[5])); |
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if ($bytes->[7] > 1) { $temp = "Undefined!"; } |
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else { $temp = ($bytes->[7] * 256) + $bytes->[6]; } |
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@ -534,22 +540,17 @@ sub decode_sdr_sdram($) |
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if ($bytes->[13] > 126) { $temp = "Bank2 = 2 x Bank1"; } |
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else { $temp = "No Bank2 OR Bank2 = Bank1 width"; } |
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printl("Primary SDRAM Component Bank Config", $temp); |
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$temp = $bytes->[13] & 0x7f; |
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if ($temp == 0) { $temp = "Undefined!"; } |
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printl("Primary SDRAM Component Widths", $temp); |
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printl("Primary SDRAM Component Widths", |
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value_or_undefined($bytes->[13] & 0x7f)); |
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if ($bytes->[14] > 126) { $temp = "Bank2 = 2 x Bank1"; } |
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else { $temp = "No Bank2 OR Bank2 = Bank1 width"; } |
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printl("Error Checking SDRAM Component Bank Config", $temp); |
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printl("Error Checking SDRAM Component Widths", |
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value_or_undefined($bytes->[14] & 0x7f)); |
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$temp = $bytes->[14] & 0x7f; |
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if ($temp == 0) { $temp = "Undefined!"; } |
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printl("Error Checking SDRAM Component Widths", $temp); |
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if ($bytes->[15] == 0) { $temp = "Undefined!"; } |
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else { $temp = $bytes->[15]; } |
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printl("Min Clock Delay for Back to Back Random Access", $temp); |
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printl("Min Clock Delay for Back to Back Random Access", |
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value_or_undefined($bytes->[15])); |
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my @array; |
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for ($ii = 0; $ii < 4; $ii++) { |
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@ -560,9 +561,8 @@ sub decode_sdr_sdram($) |
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else { $temp = "None"; } |
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printl("Supported Burst Lengths", $temp); |
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if ($bytes->[17] == 0) { $temp = "Undefined/Reserved!"; } |
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else { $temp = $bytes->[17]; } |
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printl("Number of Device Banks", $temp); |
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printl("Number of Device Banks", |
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value_or_undefined($bytes->[17])); |
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printl("Supported CAS Latencies", cas_latencies(@cas)); |
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@ -652,21 +652,17 @@ sub decode_sdr_sdram($) |
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if ($bytes->[22] & 128) { $temp .= "Undefined (bit 7)\n"; } |
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printl("SDRAM Device Attributes (General)", $temp); |
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if ($bytes->[27] == 0) { $temp = "Undefined!"; } |
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else { $temp = "$bytes->[27] ns"; } |
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printl("Minimum Row Precharge Time", $temp); |
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printl("Minimum Row Precharge Time", |
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value_or_undefined($bytes->[27], "ns")); |
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if ($bytes->[28] == 0) { $temp = "Undefined!"; } |
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else { $temp = "$bytes->[28] ns"; } |
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printl("Row Active to Row Active Min", $temp); |
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printl("Row Active to Row Active Min", |
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value_or_undefined($bytes->[28], "ns")); |
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if ($bytes->[29] == 0) { $temp = "Undefined!"; } |
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else { $temp = "$bytes->[29] ns"; } |
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printl("RAS to CAS Delay", $temp); |
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printl("RAS to CAS Delay", |
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value_or_undefined($bytes->[29], "ns")); |
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if ($bytes->[30] == 0) { $temp = "Undefined!"; } |
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else { $temp = "$bytes->[30] ns"; } |
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printl("Min RAS Pulse Width", $temp); |
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printl("Min RAS Pulse Width", |
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value_or_undefined($bytes->[30], "ns")); |
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$temp = ""; |
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if ($bytes->[31] & 1) { $temp .= "4 MByte\n"; } |
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