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148 lines
5.2 KiB
148 lines
5.2 KiB
.TH I2CGET 8 "May 2022"
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.SH "NAME"
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i2cget \- read from I2C/SMBus chip registers
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.SH SYNOPSIS
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.B i2cget
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.RB [ -f ]
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.RB [ -y ]
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.RB [ -a ]
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.I i2cbus
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.I chip-address
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.RI [ "data-address " [ "mode " [ length ]]]
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.br
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.B i2cget
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.B -V
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.br
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.B i2cget
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.B -h
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.SH DESCRIPTION
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i2cget is a small helper program to read registers visible through the I2C
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bus (or SMBus).
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.SH OPTIONS
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.TP
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.B -V
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Display the version and exit.
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.TP
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.B -h
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Display the help and exit.
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.TP
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.B -f
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Force access to the device even if it is already busy. By default, i2cget
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will refuse to access a device which is already under the control of a
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kernel driver. Using this flag is dangerous, it can seriously confuse the
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kernel driver in question. It can also cause i2cget to return an invalid
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value. So use at your own risk and only if you know what you're doing.
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.TP
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.B -y
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Disable interactive mode. By default, i2cget will wait for a confirmation
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from the user before messing with the I2C bus. When this flag is used, it
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will perform the operation directly. This is mainly meant to be used in
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scripts. Use with caution.
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.TP
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.B -a
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Allow using addresses between 0x00 - 0x07 and 0x78 - 0x7f. Not recommended.
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.PP
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There are two required options to i2cget. \fIi2cbus\fR indicates the number
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or name of the I2C bus to be scanned. This number should correspond to one of
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the busses listed by \fIi2cdetect -l\fR. \fIchip-address\fR specifies the
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address of the chip on that bus, and is an integer between 0x08 and 0x77.
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.PP
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\fIdata-address\fR specifies the address on that chip to read from, and is
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an integer between 0x00 and 0xFF. If omitted, the currently active register
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will be read (if that makes sense for the considered chip).
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.PP
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The \fImode\fR parameter, if specified, is one of the letters \fBb\fP,
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\fBw\fP, \fBc\fP, \fBs\fP, or \fBi\fP, corresponding to a read byte data, a read
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word data, a write byte/read byte, an SMBus block read, or an I2C block read
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transaction, respectively. A \fBp\fP can also be appended to the \fImode\fR
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parameter to enable PEC, except for I2C block transactions. If the \fImode\fR
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parameter is omitted,
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i2cget defaults to a read byte data transaction, unless \fIdata-address\fR is
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also omitted, in which case the default (and only valid) transaction is a
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single read byte.
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.PP
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The \fIlength\fR parameter, if applicable and specified, sets the length
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of the block transaction. Valid values are between 1 and 32. Default value
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is 32.
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.SH WARNING
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i2cget can be extremely dangerous if used improperly. I2C and SMBus are designed
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in such a way that an SMBus read transaction can be seen as a write transaction by
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certain chips. This is particularly true if setting \fImode\fR to \fBcp\fP (write byte/read
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byte with PEC). Be extremely careful using this program.
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.SH EXAMPLES
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.PP
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Get the value of 8-bit register 0x11 of the I2C device at 7-bit address 0x2d
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on bus 1 (i2c-1), after user confirmation:
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.nf
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.RS
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# i2cget 1 0x2d 0x11
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.RE
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.fi
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.PP
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Get the value of 16-bit register 0x00 of the I2C device at 7-bit address 0x48
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on bus 1 (i2c-1), after user confirmation:
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.nf
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.RS
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# i2cget 1 0x48 0x00 w
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.RE
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.fi
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.PP
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Set the internal pointer register of a 24C02 EEPROM at 7-bit address 0x50
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on bus 9 (i2c-9) to 0x00, then read the first 2 bytes from that EEPROM:
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.nf
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.RS
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# i2cset -y 9 0x50 0x00 ; i2cget -y 9 0x50 ; i2cget -y 9 0x50
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.RE
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.fi
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This assumes that the device automatically increments its internal pointer
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register on every read, and supports read byte transactions (read without
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specifying the register address, "Receive Byte" in SMBus terminology.)
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Most EEPROM devices behave that way. Note that this is only safe as long as
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nobody else is accessing the I2C device at the same time. A safer approach
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would be to use a "Read Word" SMBus transaction instead, or an I2C Block
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Read transaction to read more than 2 bytes.
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.PP
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Set the internal pointer register of a 24C32 EEPROM at 7-bit address 0x53
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on bus 9 (i2c-9) to 0x0000, then read the first 2 bytes from that EEPROM:
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.nf
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.RS
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# i2cset -y 9 0x53 0x00 0x00 ; i2cget -y 9 0x53 ; i2cget -y 9 0x53
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.RE
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.fi
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This again assumes that the device automatically increments its internal
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pointer register on every read, and supports read byte transactions. While
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the previous example was for a small EEPROM using 8-bit internal addressing,
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this example is for a larger EEPROM using 16-bit internal addressing. Beware
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that running this command on a small EEPROM using 8-bit internal addressing
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would actually \fIwrite\fR 0x00 to the first byte of that EEPROM. The safety
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concerns raised above still stand, however in this case there is no SMBus
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equivalent, so this is the only way to read data from a large EEPROM if your
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master isn't fully I2C capable. With a fully I2C capable master, you would
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use \fIi2ctransfer\fR to achieve the same in a safe and faster way.
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.PP
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Read the first 8 bytes of an EEPROM device at 7-bit address 0x50
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on bus 4 (i2c-4):
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.nf
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.RS
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# i2cget -y 4 0x50 0x00 i 8
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.RE
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.fi
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.SH BUGS
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To report bugs or send fixes, please write to the Linux I2C mailing list
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<linux-i2c@vger.kernel.org> with Cc to the current maintainer:
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Jean Delvare <jdelvare@suse.de>.
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.SH SEE ALSO
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i2cdetect(8), i2cdump(8), i2cset(8), i2ctransfer(8)
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.SH AUTHOR
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Jean Delvare
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This manual page was strongly inspired from those written by David Z Maze
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for i2cset.
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