zhaohe 8 months ago
parent
commit
c955b971d3
  1. 44
      modbus/modbus_block_host.cpp
  2. 11
      modbus/modbus_block_host.hpp

44
modbus/modbus_block_host.cpp

@ -6,9 +6,10 @@ using namespace iflytop;
ModbusBlockHost::ModbusBlockHost() {}
ModbusBlockHost::~ModbusBlockHost() {}
void ModbusBlockHost::initialize(UART_HandleTypeDef *huart) {
void ModbusBlockHost::initialize(UART_HandleTypeDef *huart, Pin_t rePin) {
this->huart = huart;
this->rePin = rePin;
txEnGpio.initAsOutput(rePin, kxs_gpio_pulldown, false, false);
m_modbus_lock.init();
}
void ModbusBlockHost::enableDump(bool enable) { m_dump = enable; }
@ -31,13 +32,14 @@ void ModbusBlockHost::uarttx(uint8_t *buff, size_t len) {
}
// HAL_UART_Transmit(huart, buff, len, 1000);
HAL_UART_DMAStop(huart);
if (rePin != PinNull) txEnGpio.setState(true);
HAL_StatusTypeDef ret = HAL_UART_Transmit_DMA(huart, buff, len);
ZASSERT(ret == HAL_OK);
// 等待DMA传输完成
while (true) {
if (HAL_UART_GetState(huart) == HAL_UART_STATE_READY) break;
}
if (rePin != PinNull) txEnGpio.setState(false);
return;
}
bool ModbusBlockHost::uartrx(uint8_t *buff, size_t len, int overtimems) {
@ -56,8 +58,8 @@ bool ModbusBlockHost::uartrx(uint8_t *buff, size_t len, int overtimems) {
if (m_dump) {
if (status == HAL_OK) {
printf("uart_rx:");
for (size_t i = 0; i < len; i++) {
printf("%02x ", buff[i]);
for (size_t byteoff = 0; byteoff < len; byteoff++) {
printf("%02x ", buff[byteoff]);
}
printf("\n");
}
@ -115,7 +117,7 @@ bool ModbusBlockHost::readReg03(uint8_t slaveAddr, uint16_t regAddr, uint16_t *r
// return str;
// }
bool ModbusBlockHost::readReg03Muti(uint8_t slaveAddr, uint16_t regAddr, uint16_t *regVal, int regNum, int overtimems) {
bool ModbusBlockHost::readReg03Muti(uint8_t slaveAddr, uint16_t regAddr, int regNum,uint16_t *regVal, int overtimems) {
zlock_guard lck(m_modbus_lock);
txbuff[0] = slaveAddr;
@ -182,7 +184,7 @@ bool ModbusBlockHost::writeReg10(uint8_t slaveAddr, uint16_t regAddr, uint16_t r
txbuff[3] = regAddr & 0xff;
txbuff[4] = 0x00;
txbuff[5] = 0x01;
txbuff[6] = 0x02; // 字节数
txbuff[6] = 0x02; //
txbuff[7] = regVal >> 8;
txbuff[8] = regVal & 0xff;
modbus_pack_crc_to_packet(txbuff, 9 + 2);
@ -199,3 +201,31 @@ bool ModbusBlockHost::writeReg10(uint8_t slaveAddr, uint16_t regAddr, uint16_t r
}
return false;
}
bool ModbusBlockHost::writeReg10Muti(uint8_t slaveAddr, uint16_t regAddr,int regNum, uint16_t *regVal, int overtimems) {
zlock_guard lck(m_modbus_lock);
txbuff[0] = slaveAddr;
txbuff[1] = 0x10;
txbuff[2] = regAddr >> 8;
txbuff[3] = regAddr & 0xff;
txbuff[4] = 0x00;
txbuff[5] = regNum;
txbuff[6] = regNum * 2;
for (int i = 0; i < regNum; i++) {
txbuff[7 + i * 2] = regVal[i] >> 8;
txbuff[7 + i * 2 + 1] = regVal[i] & 0xff;
}
modbus_pack_crc_to_packet(txbuff, 7 + regNum * 2 + 2);
cleanRxBuff();
uarttx(txbuff, 7 + regNum * 2 + 2);
bool status;
status = uartrx(rxbuff, 8, overtimems);
if (status && modbus_checkcrc16(rxbuff, 8)) {
return true;
}
return false;
}

11
modbus/modbus_block_host.hpp

@ -12,18 +12,23 @@ class ModbusBlockHost {
zmutex m_modbus_lock = {"m_modbus_lock"};
bool m_dump = false;
Pin_t rePin = PinNull;
ZGPIO txEnGpio;
public:
ModbusBlockHost();
~ModbusBlockHost();
void initialize(UART_HandleTypeDef *huart);
void initialize(UART_HandleTypeDef *huart, Pin_t rePin = PinNull);
void enableDump(bool enable);
bool readReg03(uint8_t slaveAddr, uint16_t regAddr, uint16_t *regVal, int overtimems);
bool readReg03Muti(uint8_t slaveAddr, uint16_t regAddr, uint16_t *regVal, int regNum, int overtimems);
bool writeReg06(uint8_t slaveAddr, uint16_t regAddr, uint16_t regVal, int overtimems);
bool readReg03(uint8_t slaveAddr, uint16_t regAddr, uint16_t *regVal, int overtimems);
bool readReg03Muti(uint8_t slaveAddr, uint16_t regAddr, int regNum, uint16_t *regVal, int overtimems);
bool writeReg10(uint8_t slaveAddr, uint16_t regAddr, uint16_t regVal, int overtimems);
bool writeReg10Muti(uint8_t slaveAddr, uint16_t regAddr, int regNum, uint16_t *regVal, int overtimems);
private:
void cleanRxBuff();

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