diff --git a/modbus/modbus_basic.cpp b/modbus/modbus_basic.cpp new file mode 100644 index 0000000..56465ae --- /dev/null +++ b/modbus/modbus_basic.cpp @@ -0,0 +1,67 @@ +/** + * Modbus + * | add(1byte) | functionCode(1byte) | ...data... | crc1(1byte) | crc2(2byte)| + * + * + * + * + */ +#include "modbus_basic.hpp" + +#include +// CRC_16高8位数据区 +#define ASSERT(con) \ + while (!(con)) { \ + } +static const uint8_t auchCRCHi[] = { + 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, + 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, + 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, + 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, + 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, + 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, + 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, + 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, + 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, + 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40}; +// CRC低位字节值表 +static const uint8_t auchCRCLo[] = { // CRC_16低8位数据区 + 0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7, 0x05, 0xC5, 0xC4, 0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E, 0x0A, 0xCA, + 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9, 0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC, 0x14, 0xD4, 0xD5, 0x15, + 0xD7, 0x17, 0x16, 0xD6, 0xD2, 0x12, 0x13, 0xD3, 0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32, 0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, + 0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D, 0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38, 0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA, + 0xEE, 0x2E, 0x2F, 0xEF, 0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26, 0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, + 0x61, 0xA1, 0x63, 0xA3, 0xA2, 0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4, 0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB, + 0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA, 0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, 0x74, 0x75, 0xB5, 0x77, 0xB7, + 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0, 0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92, 0x96, 0x56, 0x57, 0x97, 0x55, 0x95, 0x94, 0x54, + 0x9C, 0x5C, 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E, 0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98, 0x88, 0x48, 0x49, 0x89, 0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, + 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C, 0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83, 0x41, 0x81, 0x80, 0x40}; + +/*CRC16查表计算函数*/ + +uint16_t modbus_gen_crc16(uint8_t *puckMsg, uint8_t usDataLen) { + volatile uint8_t uchCRCHi = 0xFF; // 高CRC字节初始化 + volatile uint8_t uchCRCLo = 0xFF; // 低CRC 字节初始化 + volatile uint32_t uIndex; // CRC循环中的索引 + // 传输消息缓冲区 + while (usDataLen--) { + // 计算CRC + uIndex = uchCRCLo ^ *puckMsg++; + uchCRCLo = uchCRCHi ^ auchCRCHi[uIndex]; + uchCRCHi = auchCRCLo[uIndex]; + } + // 返回结果，高位在前 + return (uchCRCLo << 8 | uchCRCHi); +} + +void modbus_pack_crc_to_packet(uint8_t *puckMsg, uint8_t packetlen) { + uint16_t crc = modbus_gen_crc16(puckMsg, packetlen - 2); + puckMsg[packetlen - 2] = crc >> 8; + puckMsg[packetlen - 1] = crc; +} + +/*函数功能：用于校验接收到的信息是否有误 +输入参数：message是接收到的待校验消息，length是消息字节的长度 +函数输出：输出校验结果，没有错返回True，有错返回False +通过CRC校验校验接收的信息是否正确*/ +bool modbus_checkcrc16(uint8_t *message, uint8_t length) { return (modbus_gen_crc16(message, length) == 0x00) ? true : false; } \ No newline at end of file diff --git a/modbus/modbus_basic.hpp b/modbus/modbus_basic.hpp new file mode 100644 index 0000000..35ba61c --- /dev/null +++ b/modbus/modbus_basic.hpp @@ -0,0 +1,28 @@ +#pragma once +#include +#include + +/** + * @brief 生成CRC16校验码 + * + * @param puckMsg 数据指针 + * @param usDataLen 数据长度(不包含CRC16) + * @return uint16_t + */ +uint16_t modbus_gen_crc16(uint8_t *puckMsg, uint8_t usDataLen); +/** + * @brief 将CRC16校验码添加到数据包中 + * + * @param puckMsg 数据指针，数据中预留两个位置给CRC16 + * @param packetlen 数据长度 + */ +void modbus_pack_crc_to_packet(uint8_t *puckMsg, uint8_t packetlen); +/** + * @brief 检查CRC16校验码 + * + * @param message 数据指针 + * @param length 数据长度(包含CRC16) + * @return true 校验成功 + * @return false 校验失败 + */ +bool modbus_checkcrc16(uint8_t *message, uint8_t length); \ No newline at end of file diff --git a/modbus/modbus_block_host.cpp b/modbus/modbus_block_host.cpp new file mode 100644 index 0000000..fda126e --- /dev/null +++ b/modbus/modbus_block_host.cpp @@ -0,0 +1,202 @@ +#include "modbus_block_host.hpp" + +#include "modbus_basic.hpp" +using namespace iflytop; +#define PRV_DEBUG 0 +ModbusBlockHost::ModbusBlockHost() {} +ModbusBlockHost::~ModbusBlockHost() {} + +extern "C" { +void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) {} +} + +void ModbusBlockHost::initialize(UART_HandleTypeDef *huart) { + this->huart = huart; + m_modbus_lock.init(); +} +void ModbusBlockHost::cleanRxBuff() { // + HAL_StatusTypeDef status; + do { + status = HAL_UART_Receive(huart, rxbuff, 1, 1); + } while (status == HAL_OK); +} + +void ModbusBlockHost::uarttx(uint8_t *buff, size_t len) { + ZASSERT(len < sizeof(txbuff)); +#if PRV_DEBUG + printf("uart_tx:\n"); + for (size_t i = 0; i < len; i++) { + printf("%02x ", buff[i]); + } + printf("\n"); +#endif + // HAL_UART_Transmit(huart, buff, len, 1000); + HAL_UART_DMAStop(huart); + HAL_StatusTypeDef ret = HAL_UART_Transmit_DMA(huart, buff, len); + ZASSERT(ret == HAL_OK); + + // 等待DMA传输完成 + while (true) { + if (HAL_UART_GetState(huart) == HAL_UART_STATE_READY) break; + } + return; +} +bool ModbusBlockHost::uartrx(uint8_t *buff, size_t len, int overtimems) { + HAL_StatusTypeDef status; + ZASSERT(len < sizeof(rxbuff)); + + status = HAL_UART_Receive_DMA(huart, buff, len); + + if (status != HAL_OK) { + return false; + } + + for (size_t i = 0; i < overtimems; i++) { + osDelay(3); + if (HAL_UART_GetState(huart) == HAL_UART_STATE_READY) { +#if PRV_DEBUG + if (status == HAL_OK) { + printf("uart_rx:"); + for (size_t i = 0; i < len; i++) { + printf("%02x ", buff[i]); + } + printf("\n"); + } +#endif + return true; + } + } +#if PRV_DEBUG + printf("uart_rx timeout\n"); +#endif + + HAL_UART_Abort(huart); + HAL_UART_DMAStop(huart); + + return false; +} + +bool ModbusBlockHost::readReg03(uint8_t slaveAddr, uint16_t regAddr, uint16_t *regVal, int overtimems) { + zlock_guard lck(m_modbus_lock); + + txbuff[0] = slaveAddr; + txbuff[1] = 0x03; + txbuff[2] = regAddr >> 8; + txbuff[3] = regAddr & 0xff; + txbuff[4] = 0x00; + txbuff[5] = 0x01; + modbus_pack_crc_to_packet(txbuff, 6 + 2); + + cleanRxBuff(); + + uarttx(txbuff, 6 + 2); + + bool status; + status = uartrx(rxbuff, 5 + 2, overtimems); + + if (!status) { + return false; + } + + if (!modbus_checkcrc16(rxbuff, 7)) { + ZLOGE("ModbusBlockHost", "crc error"); + return false; + } + + *regVal = (((uint16_t)(rxbuff[3])) << 8) | rxbuff[4]; + + return true; +} + +// static const char *hex2str(uint8_t *buff, size_t len) { +// static char str[100]; +// for (size_t i = 0; i < len; i++) { +// sprintf(str + i * 2, "%02x", buff[i]); +// } +// return str; +// } + +bool ModbusBlockHost::readReg03Muti(uint8_t slaveAddr, uint16_t regAddr, uint16_t *regVal, int regNum, int overtimems) { + zlock_guard lck(m_modbus_lock); + + txbuff[0] = slaveAddr; + txbuff[1] = 0x03; + txbuff[2] = regAddr >> 8; + txbuff[3] = regAddr & 0xff; + txbuff[4] = 0x00; + txbuff[5] = regNum; + modbus_pack_crc_to_packet(txbuff, 6 + 2); + + cleanRxBuff(); + + uarttx(txbuff, 6 + 2); + + bool status; + // 14*2 = 28 + status = uartrx(rxbuff, 5 + regNum * 2, overtimems); + if (!status) { + return false; + } + + if (!modbus_checkcrc16(rxbuff, 5 + regNum * 2)) { + ZLOGE("ModbusBlockHost", "crc error"); + return false; + } + for (int i = 0; i < regNum; i++) { + regVal[i] = ((uint16_t)(rxbuff[3 + i * 2]) << 8) | rxbuff[4 + i * 2]; + // int16_t val = regVal[i] ; + // ZLOGI("RX", "%d", val); + } + + return true; +} + +bool ModbusBlockHost::writeReg06(uint8_t slaveAddr, uint16_t regAddr, uint16_t regVal, int overtimems) { + zlock_guard lck(m_modbus_lock); + + txbuff[0] = slaveAddr; + txbuff[1] = 0x06; + txbuff[2] = regAddr >> 8; + txbuff[3] = regAddr & 0xff; + txbuff[4] = regVal >> 8; + txbuff[5] = regVal & 0xff; + modbus_pack_crc_to_packet(txbuff, 6 + 2); + + cleanRxBuff(); + + uarttx(txbuff, 6 + 2); + + bool status; + status = uartrx(rxbuff, 8, overtimems); + + if (status && modbus_checkcrc16(rxbuff, 8)) { + return true; + } + return false; +} +bool ModbusBlockHost::writeReg10(uint8_t slaveAddr, uint16_t regAddr, uint16_t regVal, int overtimems) { + zlock_guard lck(m_modbus_lock); + + txbuff[0] = slaveAddr; + txbuff[1] = 0x10; + txbuff[2] = regAddr >> 8; + txbuff[3] = regAddr & 0xff; + txbuff[4] = 0x00; + txbuff[5] = 0x01; + txbuff[6] = 0x02; // 字节数 + txbuff[7] = regVal >> 8; + txbuff[8] = regVal & 0xff; + modbus_pack_crc_to_packet(txbuff, 9 + 2); + + cleanRxBuff(); + + uarttx(txbuff, 9 + 2); + + bool status; + status = uartrx(rxbuff, 8, overtimems); + + if (status && modbus_checkcrc16(rxbuff, 8)) { + return true; + } + return false; +} diff --git a/modbus/modbus_block_host.hpp b/modbus/modbus_block_host.hpp new file mode 100644 index 0000000..52d67be --- /dev/null +++ b/modbus/modbus_block_host.hpp @@ -0,0 +1,31 @@ +#pragma once +// +#include "stm32basic/zbasic.h" +#include "stm32basic/stm32basic.hpp" + +namespace iflytop { +class ModbusBlockHost { + UART_HandleTypeDef *huart; + + uint8_t txbuff[100]; + uint8_t rxbuff[100]; + + zmutex m_modbus_lock; + + public: + ModbusBlockHost(); + ~ModbusBlockHost(); + + void initialize(UART_HandleTypeDef *huart); + + bool readReg03(uint8_t slaveAddr, uint16_t regAddr, uint16_t *regVal, int overtimems); + bool readReg03Muti(uint8_t slaveAddr, uint16_t regAddr, uint16_t *regVal, int regNum, int overtimems); + bool writeReg06(uint8_t slaveAddr, uint16_t regAddr, uint16_t regVal, int overtimems); + bool writeReg10(uint8_t slaveAddr, uint16_t regAddr, uint16_t regVal, int overtimems); + + private: + void cleanRxBuff(); + void uarttx(uint8_t *buff, size_t len); + bool uartrx(uint8_t *buff, size_t len, int overtimems); +}; +} // namespace iflytop diff --git a/stm32components.hpp b/stm32components.hpp new file mode 100644 index 0000000..a530e06 --- /dev/null +++ b/stm32components.hpp @@ -0,0 +1,5 @@ +#pragma once +#include "zcanreceiver/zcanreceiver.hpp" +#include "tmcdriver/tmc51x0/tmc51x0.hpp" +#include "sysmgr/sys_mgr.hpp" +#include "modbus/modbus_block_host.hpp" \ No newline at end of file diff --git a/sysmgr/sys_mgr.cpp b/sysmgr/sys_mgr.cpp new file mode 100644 index 0000000..0ae2fdf --- /dev/null +++ b/sysmgr/sys_mgr.cpp @@ -0,0 +1,153 @@ +#include "sys_mgr.hpp" + +#include + + +using namespace iflytop; + +#define TAG "SysMgr" + +extern "C" { + +/*********************************************************************************************************************** + * STM32_CODE_ERROR * + ***********************************************************************************************************************/ +void SysMgr_on_Error_Handler() { + ZLOGE(TAG, "Error_Handler\n"); + while (1) { + } +} + +void SysMgr_on_assert_failed(uint8_t* file, uint32_t line) { + ZLOGE(TAG, "ASSERT: %s [%s:%d]\n", file, line); + while (1) { + } +} +extern uint8_t _end; /* Symbol defined in the linker script */ +extern uint8_t _estack; /* Symbol defined in the linker script */ +extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ +extern uint8_t* __sbrk_heap_end; + +static size_t get_free_heap_size() { + const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; + const uint8_t* max_heap = (uint8_t*)stack_limit; + uint8_t* prev_heap_end; + return max_heap - __sbrk_heap_end; + // if (__sbrk_heap_end + incr > max_heap) { + // errno = ENOMEM; + // return (void*)-1; + // } +} + +/*********************************************************************************************************************** + * STM32_ERROR_IRQ * + ***********************************************************************************************************************/ +void SysMgr_on_NMI_Handler(void) { ZLOGI(TAG, "on NMI_Handler"); } +void SysMgr_on_HardFault_Handler(void) { ZLOGI(TAG, "on HardFault_Handler"); } +void SysMgr_on_MemManage_Handler(void) { ZLOGI(TAG, "on MemManage_Handler"); } +void SysMgr_on_BusFault_Handler(void) { ZLOGI(TAG, "on BusFault_Handler"); } +void SysMgr_on_UsageFault_Handler(void) { ZLOGI(TAG, "on UsageFault_Handler"); } + +/*********************************************************************************************************************** + * FREERTOS_ERROR * + ***********************************************************************************************************************/ +void vApplicationStackOverflowHook(xTaskHandle xTask, signed char* pcTaskName) { + ZLOGE(TAG, "StackOverflowHook: %s\n", pcTaskName); + __disable_irq(); + while (1) { + } +} +void vApplicationMallocFailedHook(void) { + ZLOGE(TAG, "MallocFailedHook\n"); + __disable_irq(); + + while (1) { + } +} +} +SysMgr* SysMgr::ins() { + static SysMgr s_ins; + return &s_ins; +} +// void SysMgr::regTaskId(osThreadId id) { +// m_task[m_ntask].Id = id; +// m_ntask++; +// } +size_t SysMgr::osGetSysRunTime() { return HAL_GetTick(); } +UBaseType_t uxTaskGetSystemState(TaskStatus_t* const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t* const pulTotalRunTime); + +void SysMgr::initedFinished() { // + static TaskStatus_t pxTaskStatusArray[SDK_MAX_TASK + 1]; + UBaseType_t uxArraySize = SDK_MAX_TASK + 1; + uint32_t pulTotalRunTime; + m_ntask = uxTaskGetSystemState(pxTaskStatusArray, uxArraySize, &pulTotalRunTime); + for (int i = 0; i < m_ntask; i++) { + m_task[i].Id = pxTaskStatusArray[i].xHandle; + } + ZASSERT_INFO(m_ntask < SDK_MAX_TASK, "task num is too large, please increase SDK_MAX_TASK"); +} + +size_t SysMgr::osGetMinimumEverFreeHeapSize() { return ::xPortGetMinimumEverFreeHeapSize(); } +size_t SysMgr::osGetFreeHeapSize() { return ::xPortGetFreeHeapSize(); } +size_t SysMgr::osGetTotalHeapSize() { return configTOTAL_HEAP_SIZE; } +size_t SysMgr::osGetFreeSysHeapSize() { return get_free_heap_size(); } + +int32_t SysMgr::getTaskNum() { return m_ntask; } + +void SysMgr::dumpSysInfo() { + + + zlog("---------------Heap Info--------------\n"); + zlog("MinimumEverFreeHeapSize : %d\n", osGetMinimumEverFreeHeapSize()); + zlog("RTOS FreeHeapSize : %d\n", osGetFreeHeapSize()); + zlog("RTOS TotalHeapSize : %d\n", osGetTotalHeapSize()); + zlog("Sys FreeHeap : %d\n", get_free_heap_size()); + zlog(""); + + zlog("---------------Task Info--------------\n"); + static char buf[40 * SDK_MAX_TASK]; // 40一个任务，最多支持10个任务 + vTaskList(buf); + zlog("Name State Priority Stack Num\n"); + zlog_raw(buf); + zlog("- TaskInfoEnd -\n"); +} + +uint32_t SysMgr::osTaskStackRemainingSize(osThreadId id) { return uxTaskGetStackHighWaterMark(id); } +const char* SysMgr::osTaskName(osThreadId id) { return pcTaskGetName(id); } + +osThreadId SysMgr::osGetId(int offset) { + if (offset < m_ntask) { + return m_task[offset].Id; + } + return NULL; +} + +void SysMgr::osTaskName(osThreadId id, char* name, int bufsize) { + strncpy(name, pcTaskGetName(id), bufsize); + name[bufsize - 1] = 0; +} +void SysMgr::osTaskStackRemainingSize(osThreadId id, uint16_t* remainsize) { *remainsize = uxTaskGetStackHighWaterMark(id); } +void SysMgr::osTaskPriority(osThreadId id, uint16_t* priority) { *priority = uxTaskPriorityGet(id); } +void SysMgr::osTaskGetState(osThreadId id, char* state) { + eTaskState task_state = eTaskGetState(id); + switch (task_state) { + case eRunning: + *state = 'X'; + break; + case eReady: + *state = 'R'; + break; + case eBlocked: + *state = 'B'; + break; + case eSuspended: + *state = 'S'; + break; + case eDeleted: + *state = 'D'; + break; + default: + *state = '?'; + break; + } +} diff --git a/sysmgr/sys_mgr.hpp b/sysmgr/sys_mgr.hpp new file mode 100644 index 0000000..3e43b64 --- /dev/null +++ b/sysmgr/sys_mgr.hpp @@ -0,0 +1,50 @@ +#pragma once +#include "cmsis_os.h" +#include "stm32basic/stm32basic.hpp" +namespace iflytop { +class ZTaskInfo { + public: + osThreadId Id; +}; + +class SysMgr { + private: + /* data */ + + public: + ZTaskInfo m_task[30] = {0}; + int m_ntask = 0; + + static SysMgr* ins(); + void initedFinished(); + + void dumpSysInfo(); + + size_t osGetSysRunTime(); + + /*********************************************************************************************************************** + * HeapMgr * + ***********************************************************************************************************************/ + size_t osGetMinimumEverFreeHeapSize(); + size_t osGetFreeHeapSize(); + size_t osGetTotalHeapSize(); + size_t osGetFreeSysHeapSize(); + + /*********************************************************************************************************************** + * TaskInfo * + ***********************************************************************************************************************/ + + osThreadId osGetId(int offset); + + uint32_t osTaskStackRemainingSize(osThreadId id); + const char* osTaskName(osThreadId id); + + void osTaskName(osThreadId id, char* name, int bufsize); + void osTaskStackRemainingSize(osThreadId id, uint16_t* remainsize); + void osTaskPriority(osThreadId id, uint16_t* priority); + void osTaskGetState(osThreadId id, char* state); + + int32_t getTaskNum(); +}; + +} // namespace iflytop diff --git a/tmcdriver/doc/TMC5130A_datasheet_rev1.20 (1).pdf b/tmcdriver/doc/TMC5130A_datasheet_rev1.20 (1).pdf new file mode 100644 index 0000000..a53a4b7 Binary files /dev/null and b/tmcdriver/doc/TMC5130A_datasheet_rev1.20 (1).pdf differ diff --git a/tmcdriver/tmc/tmc_type.h b/tmcdriver/tmc/tmc_type.h new file mode 100644 index 0000000..5c97d71 --- /dev/null +++ b/tmcdriver/tmc/tmc_type.h @@ -0,0 +1,19 @@ +#pragma once +typedef enum { + kmres_256 = 0x00, + kmres_128 = 0x01, + kmres_64 = 0x02, + kmres_32 = 0x03, + kmres_16 = 0x04, + kmres_8 = 0x05, + kmres_4 = 0x06, + kmres_2 = 0x07, + kmres_1 = 0x08, +} mres_type_t; + +typedef enum { + kTMC4361A = 0x2, + kTMC2160AndTMC5160 = 0x30, + kTMC5130 = 0x11, + // kTMC5160 = 0x30, +} tmcic_id_t; \ No newline at end of file diff --git a/tmcdriver/tmc51x0/reg/TMC5130_Constants.h b/tmcdriver/tmc51x0/reg/TMC5130_Constants.h new file mode 100644 index 0000000..9923fae --- /dev/null +++ b/tmcdriver/tmc51x0/reg/TMC5130_Constants.h @@ -0,0 +1,67 @@ +/* + * TMC5130_Constants.h + * + * Created on: 13.06.2018 + * Author: LK + */ + +#ifndef TMC_IC_TMC5130_TMC5130_CONSTANTS_H_ +#define TMC_IC_TMC5130_TMC5130_CONSTANTS_H_ + +#define TMC5130_REGISTER_COUNT 128 +#define TMC5130_MOTORS 1 +#define TMC5130_WRITE_BIT 0x80 +#define TMC5130_ADDRESS_MASK 0x7F +#define TMC5130_MAX_VELOCITY 8388096 +#define TMC5130_MAX_ACCELERATION 65535 + +// ramp modes (Register TMC5161_RAMPMODE) +#define TMC5130_MODE_POSITION 0 +#define TMC5130_MODE_VELPOS 1 +#define TMC5130_MODE_VELNEG 2 +#define TMC5130_MODE_HOLD 3 + +// limit switch mode bits (Register TMC5130_SWMODE) +#define TMC5130_SW_STOPL_ENABLE 0x0001 +#define TMC5130_SW_STOPR_ENABLE 0x0002 +#define TMC5130_SW_STOPL_POLARITY 0x0004 +#define TMC5130_SW_STOPR_POLARITY 0x0008 +#define TMC5130_SW_SWAP_LR 0x0010 +#define TMC5130_SW_LATCH_L_ACT 0x0020 +#define TMC5130_SW_LATCH_L_INACT 0x0040 +#define TMC5130_SW_LATCH_R_ACT 0x0080 +#define TMC5130_SW_LATCH_R_INACT 0x0100 +#define TMC5130_SW_LATCH_ENC 0x0200 +#define TMC5130_SW_SG_STOP 0x0400 +#define TMC5130_SW_SOFTSTOP 0x0800 + +// Status bits (Register TMC5130_RAMPSTAT) +#define TMC5130_RS_STOPL 0x0001 +#define TMC5130_RS_STOPR 0x0002 +#define TMC5130_RS_LATCHL 0x0004 +#define TMC5130_RS_LATCHR 0x0008 +#define TMC5130_RS_EV_STOPL 0x0010 +#define TMC5130_RS_EV_STOPR 0x0020 +#define TMC5130_RS_EV_STOP_SG 0x0040 +#define TMC5130_RS_EV_POSREACHED 0x0080 +#define TMC5130_RS_VELREACHED 0x0100 +#define TMC5130_RS_POSREACHED 0x0200 +#define TMC5130_RS_VZERO 0x0400 +#define TMC5130_RS_ZEROWAIT 0x0800 +#define TMC5130_RS_SECONDMOVE 0x1000 +#define TMC5130_RS_SG 0x2000 + +// Encoderbits (Register TMC5130_ENCMODE) +#define TMC5130_EM_DECIMAL 0x0400 +#define TMC5130_EM_LATCH_XACT 0x0200 +#define TMC5130_EM_CLR_XENC 0x0100 +#define TMC5130_EM_NEG_EDGE 0x0080 +#define TMC5130_EM_POS_EDGE 0x0040 +#define TMC5130_EM_CLR_ONCE 0x0020 +#define TMC5130_EM_CLR_CONT 0x0010 +#define TMC5130_EM_IGNORE_AB 0x0008 +#define TMC5130_EM_POL_N 0x0004 +#define TMC5130_EM_POL_B 0x0002 +#define TMC5130_EM_POL_A 0x0001 + +#endif /* TMC_IC_TMC5130_TMC5130_CONSTANTS_H_ */ diff --git a/tmcdriver/tmc51x0/reg/TMC5130_Fields.h b/tmcdriver/tmc51x0/reg/TMC5130_Fields.h new file mode 100644 index 0000000..d7f77da --- /dev/null +++ b/tmcdriver/tmc51x0/reg/TMC5130_Fields.h @@ -0,0 +1,1475 @@ +/* + * TMC5130_Fields.h + * Author: LK + * Generated by MaskShiftConverter (unchecked) + */ + +#ifndef TMC5130_FIELDS_H +#define TMC5130_FIELDS_H + +#define TMC5130_SW_STOPL_ENABLE_MASK 0x0001 +#define TMC5130_SW_STOPL_ENABLE_SHIFT 0 +#define TMC5130_SW_STOPL_ENABLE_FIELD TMC5130_SW_STOPL_ENABLE_MASK, TMC5130_SW_STOPL_ENABLE_SHIFT +#define TMC5130_SW_STOPR_ENABLE_MASK 0x0002 +#define TMC5130_SW_STOPR_ENABLE_SHIFT 1 +#define TMC5130_SW_STOPR_ENABLE_FIELD TMC5130_SW_STOPR_ENABLE_MASK, TMC5130_SW_STOPR_ENABLE_SHIFT +#define TMC5130_SW_STOPL_POLARITY_MASK 0x0004 +#define TMC5130_SW_STOPL_POLARITY_SHIFT 2 +#define TMC5130_SW_STOPL_POLARITY_FIELD TMC5130_SW_STOPL_POLARITY_MASK, TMC5130_SW_STOPL_POLARITY_SHIFT +#define TMC5130_SW_STOPR_POLARITY_MASK 0x0008 +#define TMC5130_SW_STOPR_POLARITY_SHIFT 3 +#define TMC5130_SW_STOPR_POLARITY_FIELD TMC5130_SW_STOPR_POLARITY_MASK, TMC5130_SW_STOPR_POLARITY_SHIFT +#define TMC5130_SW_SWAP_LR_MASK 0x0010 +#define TMC5130_SW_SWAP_LR_SHIFT 4 +#define TMC5130_SW_SWAP_LR_FIELD TMC5130_SW_SWAP_LR_MASK, TMC5130_SW_SWAP_LR_SHIFT +#define TMC5130_SW_LATCH_L_ACT_MASK 0x0020 +#define TMC5130_SW_LATCH_L_ACT_SHIFT 5 +#define TMC5130_SW_LATCH_L_ACT_FIELD TMC5130_SW_LATCH_L_ACT_MASK, TMC5130_SW_LATCH_L_ACT_SHIFT +#define TMC5130_SW_LATCH_L_INACT_MASK 0x0040 +#define TMC5130_SW_LATCH_L_INACT_SHIFT 6 +#define TMC5130_SW_LATCH_L_INACT_FIELD TMC5130_SW_LATCH_L_INACT_MASK, TMC5130_SW_LATCH_L_INACT_SHIFT +#define TMC5130_SW_LATCH_R_ACT_MASK 0x0080 +#define TMC5130_SW_LATCH_R_ACT_SHIFT 7 +#define TMC5130_SW_LATCH_R_ACT_FIELD TMC5130_SW_LATCH_R_ACT_MASK, TMC5130_SW_LATCH_R_ACT_SHIFT +#define TMC5130_SW_LATCH_R_INACT_MASK 0x0100 +#define TMC5130_SW_LATCH_R_INACT_SHIFT 8 +#define TMC5130_SW_LATCH_R_INACT_FIELD TMC5130_SW_LATCH_R_INACT_MASK, TMC5130_SW_LATCH_R_INACT_SHIFT +#define TMC5130_SW_LATCH_ENC_MASK 0x0200 +#define TMC5130_SW_LATCH_ENC_SHIFT 9 +#define TMC5130_SW_LATCH_ENC_FIELD TMC5130_SW_LATCH_ENC_MASK, TMC5130_SW_LATCH_ENC_SHIFT +#define TMC5130_SW_SG_STOP_MASK 0x0400 +#define TMC5130_SW_SG_STOP_SHIFT 10 +#define TMC5130_SW_SG_STOP_FIELD TMC5130_SW_SG_STOP_MASK, TMC5130_SW_SG_STOP_SHIFT +#define TMC5130_SW_SOFTSTOP_MASK 0x0800 +#define TMC5130_SW_SOFTSTOP_SHIFT 11 +#define TMC5130_SW_SOFTSTOP_FIELD TMC5130_SW_SOFTSTOP_MASK, TMC5130_SW_SOFTSTOP_SHIFT +#define TMC5130_RS_STOPL_MASK 0x0001 +#define TMC5130_RS_STOPL_SHIFT 0 +#define TMC5130_RS_STOPL_FIELD TMC5130_RS_STOPL_MASK, TMC5130_RS_STOPL_SHIFT +#define TMC5130_RS_STOPR_MASK 0x0002 +#define TMC5130_RS_STOPR_SHIFT 1 +#define TMC5130_RS_STOPR_FIELD TMC5130_RS_STOPR_MASK, TMC5130_RS_STOPR_SHIFT +#define TMC5130_RS_LATCHL_MASK 0x0004 +#define TMC5130_RS_LATCHL_SHIFT 2 +#define TMC5130_RS_LATCHL_FIELD TMC5130_RS_LATCHL_MASK, TMC5130_RS_LATCHL_SHIFT +#define TMC5130_RS_LATCHR_MASK 0x0008 +#define TMC5130_RS_LATCHR_SHIFT 3 +#define TMC5130_RS_LATCHR_FIELD TMC5130_RS_LATCHR_MASK, TMC5130_RS_LATCHR_SHIFT +#define TMC5130_RS_EV_STOPL_MASK 0x0010 +#define TMC5130_RS_EV_STOPL_SHIFT 4 +#define TMC5130_RS_EV_STOPL_FIELD TMC5130_RS_EV_STOPL_MASK, TMC5130_RS_EV_STOPL_SHIFT +#define TMC5130_RS_EV_STOPR_MASK 0x0020 +#define TMC5130_RS_EV_STOPR_SHIFT 5 +#define TMC5130_RS_EV_STOPR_FIELD TMC5130_RS_EV_STOPR_MASK, TMC5130_RS_EV_STOPR_SHIFT +#define TMC5130_RS_EV_STOP_SG_MASK 0x0040 +#define TMC5130_RS_EV_STOP_SG_SHIFT 6 +#define TMC5130_RS_EV_STOP_SG_FIELD TMC5130_RS_EV_STOP_SG_MASK, TMC5130_RS_EV_STOP_SG_SHIFT +#define TMC5130_RS_EV_POSREACHED_MASK 0x0080 +#define TMC5130_RS_EV_POSREACHED_SHIFT 7 +#define TMC5130_RS_EV_POSREACHED_FIELD TMC5130_RS_EV_POSREACHED_MASK, TMC5130_RS_EV_POSREACHED_SHIFT +#define TMC5130_RS_VELREACHED_MASK 0x0100 +#define TMC5130_RS_VELREACHED_SHIFT 8 +#define TMC5130_RS_VELREACHED_FIELD TMC5130_RS_VELREACHED_MASK, TMC5130_RS_VELREACHED_SHIFT +#define TMC5130_RS_POSREACHED_MASK 0x0200 +#define TMC5130_RS_POSREACHED_SHIFT 9 +#define TMC5130_RS_POSREACHED_FIELD TMC5130_RS_POSREACHED_MASK, TMC5130_RS_POSREACHED_SHIFT +#define TMC5130_RS_VZERO_MASK 0x0400 +#define TMC5130_RS_VZERO_SHIFT 10 +#define TMC5130_RS_VZERO_FIELD TMC5130_RS_VZERO_MASK, TMC5130_RS_VZERO_SHIFT +#define TMC5130_RS_ZEROWAIT_MASK 0x0800 +#define TMC5130_RS_ZEROWAIT_SHIFT 11 +#define TMC5130_RS_ZEROWAIT_FIELD TMC5130_RS_ZEROWAIT_MASK, TMC5130_RS_ZEROWAIT_SHIFT +#define TMC5130_RS_SECONDMOVE_MASK 0x1000 +#define TMC5130_RS_SECONDMOVE_SHIFT 12 +#define TMC5130_RS_SECONDMOVE_FIELD TMC5130_RS_SECONDMOVE_MASK, TMC5130_RS_SECONDMOVE_SHIFT +#define TMC5130_RS_SG_MASK 0x2000 +#define TMC5130_RS_SG_SHIFT 13 +#define TMC5130_RS_SG_FIELD TMC5130_RS_SG_MASK, TMC5130_RS_SG_SHIFT +#define TMC5130_I_SCALE_ANALOG_MASK 0x01 // GCONF // +#define TMC5130_I_SCALE_ANALOG_SHIFT 0 // min.: 0, max.: 1, default: 0 +#define TMC5130_I_SCALE_ANALOG_FIELD TMC5130_I_SCALE_ANALOG_MASK, TMC5130_I_SCALE_ANALOG_SHIFT +#define TMC5130_INTERNAL_RSENSE_MASK 0x02 // GCONF // +#define TMC5130_INTERNAL_RSENSE_SHIFT 1 // min.: 0, max.: 1, default: 0 +#define TMC5130_INTERNAL_RSENSE_FIELD TMC5130_INTERNAL_RSENSE_MASK, TMC5130_INTERNAL_RSENSE_SHIFT +#define TMC5130_EN_PWM_MODE_MASK 0x04 // GCONF // +#define TMC5130_EN_PWM_MODE_SHIFT 2 // min.: 0, max.: 1, default: 0 +#define TMC5130_EN_PWM_MODE_FIELD TMC5130_EN_PWM_MODE_MASK, TMC5130_EN_PWM_MODE_SHIFT +#define TMC5130_ENC_COMMUTATION_MASK 0x08 // GCONF // +#define TMC5130_ENC_COMMUTATION_SHIFT 3 // min.: 0, max.: 1, default: 0 +#define TMC5130_ENC_COMMUTATION_FIELD TMC5130_ENC_COMMUTATION_MASK, TMC5130_ENC_COMMUTATION_SHIFT +#define TMC5130_SHAFT_MASK 0x10 // GCONF // +#define TMC5130_SHAFT_SHIFT 4 // min.: 0, max.: 1, default: 0 +#define TMC5130_SHAFT_FIELD TMC5130_SHAFT_MASK, TMC5130_SHAFT_SHIFT +#define TMC5130_DIAG0_ERROR_ONLY_WITH_SD_MODE1_MASK 0x20 // GCONF // +#define TMC5130_DIAG0_ERROR_ONLY_WITH_SD_MODE1_SHIFT 5 // min.: 0, max.: 1, default: 0 +#define TMC5130_DIAG0_ERROR_ONLY_WITH_SD_MODE1_FIELD TMC5130_DIAG0_ERROR_ONLY_WITH_SD_MODE1_MASK, TMC5130_DIAG0_ERROR_ONLY_WITH_SD_MODE1_SHIFT +#define TMC5130_DIAG0_OTPW_ONLY_WITH_SD_MODE1_MASK 0x40 // GCONF // +#define TMC5130_DIAG0_OTPW_ONLY_WITH_SD_MODE1_SHIFT 6 // min.: 0, max.: 1, default: 0 +#define TMC5130_DIAG0_OTPW_ONLY_WITH_SD_MODE1_FIELD TMC5130_DIAG0_OTPW_ONLY_WITH_SD_MODE1_MASK, TMC5130_DIAG0_OTPW_ONLY_WITH_SD_MODE1_SHIFT +#define TMC5130_DIAG0_STALL_MASK 0x80 // GCONF // +#define TMC5130_DIAG0_STALL_SHIFT 7 // min.: 0, max.: 1, default: 0 +#define TMC5130_DIAG0_STALL_FIELD TMC5130_DIAG0_STALL_MASK, TMC5130_DIAG0_STALL_SHIFT +#define TMC5130_DIAG1_STALL_MASK 0x0100 // GCONF // +#define TMC5130_DIAG1_STALL_SHIFT 8 // min.: 0, max.: 1, default: 0 +#define TMC5130_DIAG1_STALL_FIELD TMC5130_DIAG1_STALL_MASK, TMC5130_DIAG1_STALL_SHIFT +#define TMC5130_DIAG1_INDEX_MASK 0x0200 // GCONF // +#define TMC5130_DIAG1_INDEX_SHIFT 9 // min.: 0, max.: 1, default: 0 +#define TMC5130_DIAG1_INDEX_FIELD TMC5130_DIAG1_INDEX_MASK, TMC5130_DIAG1_INDEX_SHIFT +#define TMC5130_DIAG1_ONSTATE_MASK 0x0400 // GCONF // +#define TMC5130_DIAG1_ONSTATE_SHIFT 10 // min.: 0, max.: 1, default: 0 +#define TMC5130_DIAG1_ONSTATE_FIELD TMC5130_DIAG1_ONSTATE_MASK, TMC5130_DIAG1_ONSTATE_SHIFT +#define TMC5130_DIAG1_STEPS_SKIPPED_MASK 0x0800 // GCONF // +#define TMC5130_DIAG1_STEPS_SKIPPED_SHIFT 11 // min.: 0, max.: 1, default: 0 +#define TMC5130_DIAG1_STEPS_SKIPPED_FIELD TMC5130_DIAG1_STEPS_SKIPPED_MASK, TMC5130_DIAG1_STEPS_SKIPPED_SHIFT +#define TMC5130_DIAG0_INT_PUSHPULL_MASK 0x1000 // GCONF // +#define TMC5130_DIAG0_INT_PUSHPULL_SHIFT 12 // min.: 0, max.: 1, default: 0 +#define TMC5130_DIAG0_INT_PUSHPULL_FIELD TMC5130_DIAG0_INT_PUSHPULL_MASK, TMC5130_DIAG0_INT_PUSHPULL_SHIFT +#define TMC5130_DIAG1_POSCOMP_PUSHPULL_MASK 0x2000 // GCONF // +#define TMC5130_DIAG1_POSCOMP_PUSHPULL_SHIFT 13 // min.: 0, max.: 1, default: 0 +#define TMC5130_DIAG1_POSCOMP_PUSHPULL_FIELD TMC5130_DIAG1_POSCOMP_PUSHPULL_MASK, TMC5130_DIAG1_POSCOMP_PUSHPULL_SHIFT +#define TMC5130_SMALL_HYSTERESIS_MASK 0x4000 // GCONF // +#define TMC5130_SMALL_HYSTERESIS_SHIFT 14 // min.: 0, max.: 1, default: 0 +#define TMC5130_SMALL_HYSTERESIS_FIELD TMC5130_SMALL_HYSTERESIS_MASK, TMC5130_SMALL_HYSTERESIS_SHIFT +#define TMC5130_STOP_ENABLE_MASK 0x8000 // GCONF // +#define TMC5130_STOP_ENABLE_SHIFT 15 // min.: 0, max.: 1, default: 0 +#define TMC5130_STOP_ENABLE_FIELD TMC5130_STOP_ENABLE_MASK, TMC5130_STOP_ENABLE_SHIFT +#define TMC5130_DIRECT_MODE_MASK 0x010000 // GCONF // +#define TMC5130_DIRECT_MODE_SHIFT 16 // min.: 0, max.: 1, default: 0 +#define TMC5130_DIRECT_MODE_FIELD TMC5130_DIRECT_MODE_MASK, TMC5130_DIRECT_MODE_SHIFT +#define TMC5130_TEST_MODE_MASK 0x020000 // GCONF // +#define TMC5130_TEST_MODE_SHIFT 17 // min.: 0, max.: 1, default: 0 +#define TMC5130_TEST_MODE_FIELD TMC5130_TEST_MODE_MASK, TMC5130_TEST_MODE_SHIFT +#define TMC5130_I_SCALE_ANALOG_MASK 0x01 // GCONF // +#define TMC5130_I_SCALE_ANALOG_SHIFT 0 // min.: 0, max.: 1, default: 0 +#define TMC5130_I_SCALE_ANALOG_FIELD TMC5130_I_SCALE_ANALOG_MASK, TMC5130_I_SCALE_ANALOG_SHIFT +#define TMC5130_INTERNAL_RSENSE_MASK 0x02 // GCONF // +#define TMC5130_INTERNAL_RSENSE_SHIFT 1 // min.: 0, max.: 1, default: 0 +#define TMC5130_INTERNAL_RSENSE_FIELD TMC5130_INTERNAL_RSENSE_MASK, TMC5130_INTERNAL_RSENSE_SHIFT +#define TMC5130_EN_PWM_MODE_MASK 0x04 // GCONF // +#define TMC5130_EN_PWM_MODE_SHIFT 2 // min.: 0, max.: 1, default: 0 +#define TMC5130_EN_PWM_MODE_FIELD TMC5130_EN_PWM_MODE_MASK, TMC5130_EN_PWM_MODE_SHIFT +#define TMC5130_ENC_COMMUTATION_MASK 0x08 // GCONF // +#define TMC5130_ENC_COMMUTATION_SHIFT 3 // min.: 0, max.: 1, default: 0 +#define TMC5130_ENC_COMMUTATION_FIELD TMC5130_ENC_COMMUTATION_MASK, TMC5130_ENC_COMMUTATION_SHIFT +#define TMC5130_SHAFT_MASK 0x10 // GCONF // +#define TMC5130_SHAFT_SHIFT 4 // min.: 0, max.: 1, default: 0 +#define TMC5130_SHAFT_FIELD TMC5130_SHAFT_MASK, TMC5130_SHAFT_SHIFT +#define TMC5130_DIAG0_STEP_MASK 0x80 // GCONF // +#define TMC5130_DIAG0_STEP_SHIFT 7 // min.: 0, max.: 1, default: 0 +#define TMC5130_DIAG0_STEP_FIELD TMC5130_DIAG0_STEP_MASK, TMC5130_DIAG0_STEP_SHIFT +#define TMC5130_DIAG1_DIR_MASK 0x0100 // GCONF // +#define TMC5130_DIAG1_DIR_SHIFT 8 // min.: 0, max.: 1, default: 0 +#define TMC5130_DIAG1_DIR_FIELD TMC5130_DIAG1_DIR_MASK, TMC5130_DIAG1_DIR_SHIFT +#define TMC5130_DIAG0_INT_PUSHPULL_MASK 0x1000 // GCONF // +#define TMC5130_DIAG0_INT_PUSHPULL_SHIFT 12 // min.: 0, max.: 1, default: 0 +#define TMC5130_DIAG0_INT_PUSHPULL_FIELD TMC5130_DIAG0_INT_PUSHPULL_MASK, TMC5130_DIAG0_INT_PUSHPULL_SHIFT +#define TMC5130_DIAG1_POSCOMP_PUSHPULL_MASK 0x2000 // GCONF // +#define TMC5130_DIAG1_POSCOMP_PUSHPULL_SHIFT 13 // min.: 0, max.: 1, default: 0 +#define TMC5130_DIAG1_POSCOMP_PUSHPULL_FIELD TMC5130_DIAG1_POSCOMP_PUSHPULL_MASK, TMC5130_DIAG1_POSCOMP_PUSHPULL_SHIFT +#define TMC5130_SMALL_HYSTERESIS_MASK 0x4000 // GCONF // +#define TMC5130_SMALL_HYSTERESIS_SHIFT 14 // min.: 0, max.: 1, default: 0 +#define TMC5130_SMALL_HYSTERESIS_FIELD TMC5130_SMALL_HYSTERESIS_MASK, TMC5130_SMALL_HYSTERESIS_SHIFT +#define TMC5130_STOP_ENABLE_MASK 0x8000 // GCONF // +#define TMC5130_STOP_ENABLE_SHIFT 15 // min.: 0, max.: 1, default: 0 +#define TMC5130_STOP_ENABLE_FIELD TMC5130_STOP_ENABLE_MASK, TMC5130_STOP_ENABLE_SHIFT +#define TMC5130_DIRECT_MODE_MASK 0x010000 // GCONF // +#define TMC5130_DIRECT_MODE_SHIFT 16 // min.: 0, max.: 1, default: 0 +#define TMC5130_DIRECT_MODE_FIELD TMC5130_DIRECT_MODE_MASK, TMC5130_DIRECT_MODE_SHIFT +#define TMC5130_TEST_MODE_MASK 0x020000 // GCONF // +#define TMC5130_TEST_MODE_SHIFT 17 // min.: 0, max.: 1, default: 0 +#define TMC5130_TEST_MODE_FIELD TMC5130_TEST_MODE_MASK, TMC5130_TEST_MODE_SHIFT +#define TMC5130_RESET_MASK 0x01 // GSTAT // +#define TMC5130_RESET_SHIFT 0 // min.: 0, max.: 1, default: 0 +#define TMC5130_RESET_FIELD TMC5130_RESET_MASK, TMC5130_RESET_SHIFT +#define TMC5130_DRV_ERR_MASK 0x02 // GSTAT // +#define TMC5130_DRV_ERR_SHIFT 1 // min.: 0, max.: 1, default: 0 +#define TMC5130_DRV_ERR_FIELD TMC5130_DRV_ERR_MASK, TMC5130_DRV_ERR_SHIFT +#define TMC5130_UV_CP_MASK 0x04 // GSTAT // +#define TMC5130_UV_CP_SHIFT 2 // min.: 0, max.: 1, default: 0 +#define TMC5130_UV_CP_FIELD TMC5130_UV_CP_MASK, TMC5130_UV_CP_SHIFT +#define TMC5130_IFCNT_MASK 0xFF // IFCNT // Interface transmission counter. This register becomes incremented with each successful UART interface write access. Read out to check the serial transmission for lost data. Read accesses do not change the content. The counter wraps around from 255 to 0. +#define TMC5130_IFCNT_SHIFT 0 // min.: 0, max.: 255, default: 0 +#define TMC5130_IFCNT_FIELD TMC5130_IFCNT_MASK, TMC5130_IFCNT_SHIFT +#define TMC5130_SLAVEADDR_MASK 0xFF // SLAVECONF // These eight bits set the address of unit for the UART interface. The address becomes incremented by one when the external address pin NEXTADDR is active. Range: 0-253 (254 cannot be incremented) +#define TMC5130_SLAVEADDR_SHIFT 0 // min.: 0, max.: 255, default: 0 +#define TMC5130_SLAVEADDR_FIELD TMC5130_SLAVEADDR_MASK, TMC5130_SLAVEADDR_SHIFT +#define TMC5130_SENDDELAY_MASK 0x0F00 // SLAVECONF // SENDDELAY for read access (time until reply is sent): 0, 1: 8 bit times 2, 3: 3*8 bit times 4, 5: 5*8 bit times 6, 7: 7*8 bit times 8, 9: 9*8 bit times 10, 11: 11*8 bit times 12, 13: 13*8 bit times 14, 15: 15*8 bit times +#define TMC5130_SENDDELAY_SHIFT 8 // min.: 0, max.: 15, default: 0 +#define TMC5130_SENDDELAY_FIELD TMC5130_SENDDELAY_MASK, TMC5130_SENDDELAY_SHIFT +#define TMC5130_REFL_STEP_MASK 0x01 // IOIN / OUTPUT // REFL_STEP +#define TMC5130_REFL_STEP_SHIFT 0 // min.: 0, max.: 1, default: 0 +#define TMC5130_REFL_STEP_FIELD TMC5130_REFL_STEP_MASK, TMC5130_REFL_STEP_SHIFT +#define TMC5130_REFR_DIR_MASK 0x02 // IOIN / OUTPUT // REFR_DIR +#define TMC5130_REFR_DIR_SHIFT 1 // min.: 0, max.: 1, default: 0 +#define TMC5130_REFR_DIR_FIELD TMC5130_REFR_DIR_MASK, TMC5130_REFR_DIR_SHIFT +#define TMC5130_ENCB_DCEN_CFG4_MASK 0x04 // IOIN / OUTPUT // ENCB_DCEN_CFG4 +#define TMC5130_ENCB_DCEN_CFG4_SHIFT 2 // min.: 0, max.: 1, default: 0 +#define TMC5130_ENCB_DCEN_CFG4_FIELD TMC5130_ENCB_DCEN_CFG4_MASK, TMC5130_ENCB_DCEN_CFG4_SHIFT +#define TMC5130_ENCA_DCIN_CFG5_MASK 0x08 // IOIN / OUTPUT // ENCA_DCIN_CFG5 +#define TMC5130_ENCA_DCIN_CFG5_SHIFT 3 // min.: 0, max.: 1, default: 0 +#define TMC5130_ENCA_DCIN_CFG5_FIELD TMC5130_ENCA_DCIN_CFG5_MASK, TMC5130_ENCA_DCIN_CFG5_SHIFT +#define TMC5130_DRV_ENN_CFG6_MASK 0x10 // IOIN / OUTPUT // DRV_ENN_CFG6 +#define TMC5130_DRV_ENN_CFG6_SHIFT 4 // min.: 0, max.: 1, default: 0 +#define TMC5130_DRV_ENN_CFG6_FIELD TMC5130_DRV_ENN_CFG6_MASK, TMC5130_DRV_ENN_CFG6_SHIFT +#define TMC5130_ENC_N_DCO_MASK 0x20 // IOIN / OUTPUT // ENC_N_DCO +#define TMC5130_ENC_N_DCO_SHIFT 5 // min.: 0, max.: 1, default: 0 +#define TMC5130_ENC_N_DCO_FIELD TMC5130_ENC_N_DCO_MASK, TMC5130_ENC_N_DCO_SHIFT +#define TMC5130_SD_MODE_MASK 0x40 // IOIN / OUTPUT // SD_MODE +#define TMC5130_SD_MODE_SHIFT 6 // min.: 0, max.: 1, default: 0 +#define TMC5130_SD_MODE_FIELD TMC5130_SD_MODE_MASK, TMC5130_SD_MODE_SHIFT +#define TMC5130_SWCOMP_IN_MASK 0x80 // IOIN / OUTPUT // SWCOMP_IN +#define TMC5130_SWCOMP_IN_SHIFT 7 // min.: 0, max.: 1, default: 0 +#define TMC5130_SWCOMP_IN_FIELD TMC5130_SWCOMP_IN_MASK, TMC5130_SWCOMP_IN_SHIFT +#define TMC5130_VERSION_MASK 0xFF000000 // IOIN / OUTPUT // VERSION: 0x11=first version of the IC; Identical numbers mean full digital compatibility. +#define TMC5130_VERSION_SHIFT 24 // min.: 0, max.: 255, default: 0 +#define TMC5130_VERSION_FIELD TMC5130_VERSION_MASK, TMC5130_VERSION_SHIFT +#define TMC5130_OUTPUT_PIN_POLARITY_MASK 0x01 // IOIN / OUTPUT // Output polarity of SDO_CFG0 pin in UART mode. Its main purpose it to use SDO_CFG0 as NAO next address output signal for chain addressing of multiple ICs. Attention: Reset Value is 1 for use as NAO to next IC in single wire chain +#define TMC5130_OUTPUT_PIN_POLARITY_SHIFT 0 // min.: 0, max.: 1, default: 0 +#define TMC5130_OUTPUT_PIN_POLARITY_FIELD TMC5130_OUTPUT_PIN_POLARITY_MASK, TMC5130_OUTPUT_PIN_POLARITY_SHIFT +#define TMC5130_X_COMPARE_MASK 0xFFFFFFFF // X_COMPARE // Position comparison register for motion controller position strobe. The Position pulse is available on output SWP_DIAG1. +#define TMC5130_X_COMPARE_SHIFT 0 // min.: 0, max.: 4294967295, default: 0 +#define TMC5130_X_COMPARE_FIELD TMC5130_X_COMPARE_MASK, TMC5130_X_COMPARE_SHIFT +#define TMC5130_IHOLD_MASK 0x1F // IHOLD_IRUN // Standstill current (0=1/32...31=32/32) In combination with stealthChop mode, setting IHOLD=0 allows to choose freewheeling or coil short circuit (passive braking) for motor stand still. +#define TMC5130_IHOLD_SHIFT 0 // min.: 0, max.: 31, default: 0 +#define TMC5130_IHOLD_FIELD TMC5130_IHOLD_MASK, TMC5130_IHOLD_SHIFT +#define TMC5130_IRUN_MASK 0x1F00 // IHOLD_IRUN // Motor run current (0=1/32...31=32/32) Hint: Choose sense resistors in a way, that normal IRUN is 16 to 31 for best microstep performance. +#define TMC5130_IRUN_SHIFT 8 // min.: 0, max.: 31, default: 0 +#define TMC5130_IRUN_FIELD TMC5130_IRUN_MASK\, TMC5130_IRUN_SHIFT +#define TMC5130_IHOLDDELAY_MASK 0x0F0000 // IHOLD_IRUN // Controls the number of clock cycles for motor power down after standstill is detected (stst=1) and TPOWERDOWN has expired. The smooth transition avoids a motor jerk upon power down. 0: instant power down 1..15: Delay per current reduction step in multiple of 2^18 clocks +#define TMC5130_IHOLDDELAY_SHIFT 16 // min.: 0, max.: 15, default: 0 +#define TMC5130_IHOLDDELAY_FIELD TMC5130_IHOLDDELAY_MASK, TMC5130_IHOLDDELAY_SHIFT +#define TMC5130_TPOWERDOWN_MASK 0xFF // TPOWERDOWN // (Reset default=20) Sets the delay time from stand still (stst) detection to motor current power down. Time range is about 0 to 5.6 seconds. 0...((2^8)-1) * 2^18 tclk Attention: A minimum setting of 2 is required to allow automatic tuning of stealthChop PWM_OFFS_AUTO. +#define TMC5130_TPOWERDOWN_SHIFT 0 // min.: 0, max.: 255, default: 0 +#define TMC5130_TPOWERDOWN_FIELD TMC5130_TPOWERDOWN_MASK, TMC5130_TPOWERDOWN_SHIFT +#define TMC5130_TSTEP_MASK 0x0FFFFF // TSTEP // Actual measured time between two 1/256 microsteps derived from the step input frequency in units of 1/fCLK. Measured value is (2^20)-1 in case of overflow or stand still. The TSTEP related threshold uses a hysteresis of 1/16 of the compare value to compensate for jitter in the clock or the step frequency: (Txxx*15/16)-1 is the lower compare value for each TSTEP based comparison. This means, that the lower switching velocity equals the calculated setting, but the upper switching velocity is higher as defined by the hysteresis setting. +#define TMC5130_TSTEP_SHIFT 0 // min.: 0, max.: 1048575, default: 0 +#define TMC5130_TSTEP_FIELD TMC5130_TSTEP_MASK, TMC5130_TSTEP_SHIFT +#define TMC5130_TPWMTHRS_MASK 0x0FFFFF // TPWMTHRS // Sets the upper velocity for stealthChop voltage PWM mode. For TSTEP = TPWMTHRS, stealthChop PWM mode is enabled, if configured. When the velocity exceeds the limit set by TPWMTHRS, the driver switches to spreadCycle. 0 = Disabled +#define TMC5130_TPWMTHRS_SHIFT 0 // min.: 0, max.: 1048575, default: 0 +#define TMC5130_TPWMTHRS_FIELD TMC5130_TPWMTHRS_MASK, TMC5130_TPWMTHRS_SHIFT +#define TMC5130_TCOOLTHRS_MASK 0x0FFFFF // TCOOLTHRS // This is the lower threshold velocity for switching on smart energy coolStep and stallGuard feature. (unsigned) Set this parameter to disable coolStep at low speeds, where it cannot work reliably. The stop on stall function (enable with sg_stop when using internal motion controller) and the stall output signal become enabled when exceeding this velocity. In non-dcStep mode, it becomes disabled again once the velocity falls below this threshold. TCOOLTHRS = TSTEP = THIGH: - coolStep is enabled, if configured - stealthChop voltage PWM mode is disabled TCOOLTHRS = TSTEP - Stop on stall and stall output signal is enabled, if configured +#define TMC5130_TCOOLTHRS_SHIFT 0 // min.: 0, max.: 1048575, default: 0 +#define TMC5130_TCOOLTHRS_FIELD TMC5130_TCOOLTHRS_MASK, TMC5130_TCOOLTHRS_SHIFT +#define TMC5130_THIGH_MASK 0x0FFFFF // THIGH // This velocity setting allows velocity dependent switching into a different chopper mode and fullstepping to maximize torque. (unsigned) The stall detection feature becomes switched off for 2-3 electrical periods whenever passing THIGH threshold to compensate for the effect of switching modes. TSTEP = THIGH: - coolStep is disabled (motor runs with normal current scale) - stealthChop voltage PWM mode is disabled - If vhighchm is set, the chopper switches to chm=1 with TFD=0 (constant off time with slow decay, only). - chopSync2 is switched off (SYNC=0) - If vhighfs is set, the motor operates in fullstep mode and the stall detection becomes switched over to dcStep stall detection. +#define TMC5130_THIGH_SHIFT 0 // min.: 0, max.: 1048575, default: 0 +#define TMC5130_THIGH_FIELD TMC5130_THIGH_MASK, TMC5130_THIGH_SHIFT +#define TMC5130_RAMPMODE_MASK 0x03 // RAMPMODE // 0: Positioning mode (using all A, D and V parameters) 1: Velocity mode to positive VMAX (using AMAX acceleration) 2: Velocity mode to negative VMAX (using AMAX acceleration) 3: Hold mode (velocity remains unchanged, unless stop event occurs) +#define TMC5130_RAMPMODE_SHIFT 0 // min.: 0, max.: 3, default: 0 +#define TMC5130_RAMPMODE_FIELD TMC5130_RAMPMODE_MASK, TMC5130_RAMPMODE_SHIFT +#define TMC5130_XACTUAL_MASK 0xFFFFFFFF // XACTUAL // Actual motor position (signed) Hint: This value normally should only be modified, when homing the drive. In positioning mode, modifying the register content will start a motion. +#define TMC5130_XACTUAL_SHIFT 0 // min.: -2147483648, max.: 2147483647, default: 0 +#define TMC5130_XACTUAL_FIELD TMC5130_XACTUAL_MASK, TMC5130_XACTUAL_SHIFT +#define TMC5130_VACTUAL_MASK 0xFFFFFF // VACTUAL // Actual motor velocity from ramp generator (signed) The sign matches the motion direction. A negative sign means motion to lower XACTUAL. +#define TMC5130_VACTUAL_SHIFT 0 // min.: -8388607, max.: 8388607, default: 0 +#define TMC5130_VACTUAL_FIELD TMC5130_VACTUAL_MASK, TMC5130_VACTUAL_SHIFT +#define TMC5130_VSTART_MASK 0x03FFFF // VSTART // Motor start velocity (unsigned) Set VSTOP = VSTART! +#define TMC5130_VSTART_SHIFT 0 // min.: 0, max.: 262143, default: 0 +#define TMC5130_VSTART_FIELD TMC5130_VSTART_MASK, TMC5130_VSTART_SHIFT +#define TMC5130_A1_MASK 0xFFFF // A1 // First acceleration between VSTART and V1 (unsigned) +#define TMC5130_A1_SHIFT 0 // min.: 0, max.: 65535, default: 0 +#define TMC5130_A1_FIELD TMC5130_A1_MASK, TMC5130_A1_SHIFT +#define TMC5130_V1_MASK 0x0FFFFF // V1 // First acceleration / deceleration phase threshold velocity (unsigned) 0: Disables A1 and D1 phase, use AMAX, DMAX only +#define TMC5130_V1_SHIFT 0 // min.: 0, max.: 1048575, default: 0 +#define TMC5130_V1_FIELD TMC5130_V1_MASK, TMC5130_V1_SHIFT +#define TMC5130_AMAX_MASK 0xFFFF // AMAX // Second acceleration between V1 and VMAX (unsigned) This is the acceleration and deceleration value for velocity mode. +#define TMC5130_AMAX_SHIFT 0 // min.: 0, max.: 65535, default: 0 +#define TMC5130_AMAX_FIELD TMC5130_AMAX_MASK, TMC5130_AMAX_SHIFT +#define TMC5130_VMAX_MASK 0x7FFFFF // VMAX // Motion ramp target velocity (for positioning ensure VMAX = VSTART) (unsigned) This is the target velocity in velocity mode. It can be changed any time during a motion. +#define TMC5130_VMAX_SHIFT 0 // min.: 0, max.: 8388096, default: 0 +#define TMC5130_VMAX_FIELD TMC5130_VMAX_MASK, TMC5130_VMAX_SHIFT +#define TMC5130_DMAX_MASK 0xFFFF // DMAX // Deceleration between VMAX and V1 (unsigned) +#define TMC5130_DMAX_SHIFT 0 // min.: 0, max.: 65535, default: 0 +#define TMC5130_DMAX_FIELD TMC5130_DMAX_MASK, TMC5130_DMAX_SHIFT +#define TMC5130_D1_MASK 0xFFFF // D1 // Deceleration between V1 and VSTOP (unsigned) Attention: Do not set 0 in positioning mode, even if V1=0! +#define TMC5130_D1_SHIFT 0 // min.: 1, max.: 65535, default: 0 +#define TMC5130_D1_FIELD TMC5130_D1_MASK, TMC5130_D1_SHIFT +#define TMC5130_VSTOP_MASK 0x03FFFF // VSTOP // Motor stop velocity (unsigned) Attention: Set VSTOP = VSTART! Attention: Do not set 0 in positioning mode, minimum 10 recommend! +#define TMC5130_VSTOP_SHIFT 0 // min.: 1, max.: 262143, default: 0 +#define TMC5130_VSTOP_FIELD TMC5130_VSTOP_MASK, TMC5130_VSTOP_SHIFT +#define TMC5130_TZEROWAIT_MASK 0xFFFF // TZEROWAIT // Defines the waiting time after ramping down to zero velocity before next movement or direction inversion can start. Time range is about 0 to 2 seconds. This setting avoids excess acceleration e.g. from VSTOP to -VSTART. +#define TMC5130_TZEROWAIT_SHIFT 0 // min.: 0, max.: 65535, default: 0 +#define TMC5130_TZEROWAIT_FIELD TMC5130_TZEROWAIT_MASK, TMC5130_TZEROWAIT_SHIFT +#define TMC5130_XTARGET_MASK 0xFFFFFFFF // XTARGET // Target position for ramp mode (signed). Write a new target position to this register in order to activate the ramp generator positioning in RAMPMODE=0. Initialize all velocity, acceleration and deceleration parameters before. Hint: The position is allowed to wrap around, thus, XTARGET value optionally can be treated as an unsigned number. Hint: The maximum possible displacement is +/-((2^31)-1). Hint: When increasing V1, D1 or DMAX during a motion, rewrite XTARGET afterwards in order to trigger a second acceleration phase, if desired. +#define TMC5130_XTARGET_SHIFT 0 // min.: -2147483648, max.: 2147483647, default: 0 +#define TMC5130_XTARGET_FIELD TMC5130_XTARGET_MASK, TMC5130_XTARGET_SHIFT +#define TMC5130_VDCMIN_MASK 0x7FFFFF // VDCMIN // Automatic commutation dcStep becomes enabled above velocity VDCMIN (unsigned) (only when using internal ramp generator, not for STEP/DIR interface - in STEP/DIR mode, dcStep becomes enabled by the external signal DCEN) In this mode, the actual position is determined by the sensorless motor commutation and becomes fed back to XACTUAL. In case the motor becomes heavily loaded, VDCMIN also is used as the minimum step velocity. Activate stop on stall (sg_stop) to detect step loss. 0: Disable, dcStep off |VACT| = VDCMIN = 256: - Triggers the same actions as exceeding THIGH setting. - Switches on automatic commutation dcStep Hint: Also set DCCTRL parameters in order to operate dcStep. (Only bits 22 - 8 are used for value and for comparison) +#define TMC5130_VDCMIN_SHIFT 0 // min.: 0, max.: 8388607, default: 0 +#define TMC5130_VDCMIN_FIELD TMC5130_VDCMIN_MASK, TMC5130_VDCMIN_SHIFT +#define TMC5130_STOP_L_ENABLE_MASK 0x01 // SW_MODE // +#define TMC5130_STOP_L_ENABLE_SHIFT 0 // min.: 0, max.: 1, default: 0 +#define TMC5130_STOP_L_ENABLE_FIELD TMC5130_STOP_L_ENABLE_MASK, TMC5130_STOP_L_ENABLE_SHIFT +#define TMC5130_STOP_R_ENABLE_MASK 0x02 // SW_MODE // +#define TMC5130_STOP_R_ENABLE_SHIFT 1 // min.: 0, max.: 1, default: 0 +#define TMC5130_STOP_R_ENABLE_FIELD TMC5130_STOP_R_ENABLE_MASK, TMC5130_STOP_R_ENABLE_SHIFT +#define TMC5130_POL_STOP_L_MASK 0x04 // SW_MODE // Sets the active polarity of the left reference switch input +#define TMC5130_POL_STOP_L_SHIFT 2 // min.: 0, max.: 1, default: 0 +#define TMC5130_POL_STOP_L_FIELD TMC5130_POL_STOP_L_MASK, TMC5130_POL_STOP_L_SHIFT +#define TMC5130_POL_STOP_R_MASK 0x08 // SW_MODE // Sets the active polarity of the right reference switch input +#define TMC5130_POL_STOP_R_SHIFT 3 // min.: 0, max.: 1, default: 0 +#define TMC5130_POL_STOP_R_FIELD TMC5130_POL_STOP_R_MASK, TMC5130_POL_STOP_R_SHIFT +#define TMC5130_SWAP_LR_MASK 0x10 // SW_MODE // +#define TMC5130_SWAP_LR_SHIFT 4 // min.: 0, max.: 1, default: 0 +#define TMC5130_SWAP_LR_FIELD TMC5130_SWAP_LR_MASK, TMC5130_SWAP_LR_SHIFT +#define TMC5130_LATCH_L_ACTIVE_MASK 0x20 // SW_MODE // +#define TMC5130_LATCH_L_ACTIVE_SHIFT 5 // min.: 0, max.: 1, default: 0 +#define TMC5130_LATCH_L_ACTIVE_FIELD TMC5130_LATCH_L_ACTIVE_MASK, TMC5130_LATCH_L_ACTIVE_SHIFT +#define TMC5130_LATCH_L_INACTIVE_MASK 0x40 // SW_MODE // +#define TMC5130_LATCH_L_INACTIVE_SHIFT 6 // min.: 0, max.: 1, default: 0 +#define TMC5130_LATCH_L_INACTIVE_FIELD TMC5130_LATCH_L_INACTIVE_MASK, TMC5130_LATCH_L_INACTIVE_SHIFT +#define TMC5130_LATCH_R_ACTIVE_MASK 0x80 // SW_MODE // +#define TMC5130_LATCH_R_ACTIVE_SHIFT 7 // min.: 0, max.: 1, default: 0 +#define TMC5130_LATCH_R_ACTIVE_FIELD TMC5130_LATCH_R_ACTIVE_MASK, TMC5130_LATCH_R_ACTIVE_SHIFT +#define TMC5130_LATCH_R_INACTIVE_MASK 0x0100 // SW_MODE // +#define TMC5130_LATCH_R_INACTIVE_SHIFT 8 // min.: 0, max.: 1, default: 0 +#define TMC5130_LATCH_R_INACTIVE_FIELD TMC5130_LATCH_R_INACTIVE_MASK, TMC5130_LATCH_R_INACTIVE_SHIFT +#define TMC5130_EN_LATCH_ENCODER_MASK 0x0200 // SW_MODE // +#define TMC5130_EN_LATCH_ENCODER_SHIFT 9 // min.: 0, max.: 1, default: 0 +#define TMC5130_EN_LATCH_ENCODER_FIELD TMC5130_EN_LATCH_ENCODER_MASK, TMC5130_EN_LATCH_ENCODER_SHIFT +#define TMC5130_SG_STOP_MASK 0x0400 // SW_MODE // +#define TMC5130_SG_STOP_SHIFT 10 // min.: 0, max.: 1, default: 0 +#define TMC5130_SG_STOP_FIELD TMC5130_SG_STOP_MASK, TMC5130_SG_STOP_SHIFT +#define TMC5130_EN_SOFTSTOP_MASK 0x0800 // SW_MODE // The soft stop mode always uses the deceleration ramp settings DMAX, V1, D1, VSTOP and TZEROWAIT for stopping the motor. A stop occurs when the velocity sign matches the reference switch position (REFL for negative velocities, REFR for positive velocities) and the respective switch stop function is enabled. A hard stop also uses TZEROWAIT before the motor becomes released. Attention: Do not use soft stop in combination with stallGuard2. +#define TMC5130_EN_SOFTSTOP_SHIFT 11 // min.: 0, max.: 1, default: 0 +#define TMC5130_EN_SOFTSTOP_FIELD TMC5130_EN_SOFTSTOP_MASK, TMC5130_EN_SOFTSTOP_SHIFT +#define TMC5130_STATUS_STOP_L_MASK 0x01 // RAMP_STAT // +#define TMC5130_STATUS_STOP_L_SHIFT 0 // min.: 0, max.: 1, default: 0 +#define TMC5130_STATUS_STOP_L_FIELD TMC5130_STATUS_STOP_L_MASK, TMC5130_STATUS_STOP_L_SHIFT +#define TMC5130_STATUS_STOP_R_MASK 0x02 // RAMP_STAT // +#define TMC5130_STATUS_STOP_R_SHIFT 1 // min.: 0, max.: 1, default: 0 +#define TMC5130_STATUS_STOP_R_FIELD TMC5130_STATUS_STOP_R_MASK, TMC5130_STATUS_STOP_R_SHIFT +#define TMC5130_STATUS_LATCH_L_MASK 0x04 // RAMP_STAT // +#define TMC5130_STATUS_LATCH_L_SHIFT 2 // min.: 0, max.: 1, default: 0 +#define TMC5130_STATUS_LATCH_L_FIELD TMC5130_STATUS_LATCH_L_MASK, TMC5130_STATUS_LATCH_L_SHIFT +#define TMC5130_STATUS_LATCH_R_MASK 0x08 // RAMP_STAT // +#define TMC5130_STATUS_LATCH_R_SHIFT 3 // min.: 0, max.: 1, default: 0 +#define TMC5130_STATUS_LATCH_R_FIELD TMC5130_STATUS_LATCH_R_MASK, TMC5130_STATUS_LATCH_R_SHIFT +#define TMC5130_EVENT_STOP_L_MASK 0x10 // RAMP_STAT // +#define TMC5130_EVENT_STOP_L_SHIFT 4 // min.: 0, max.: 1, default: 0 +#define TMC5130_EVENT_STOP_L_FIELD TMC5130_EVENT_STOP_L_MASK, TMC5130_EVENT_STOP_L_SHIFT +#define TMC5130_EVENT_STOP_R_MASK 0x20 // RAMP_STAT // +#define TMC5130_EVENT_STOP_R_SHIFT 5 // min.: 0, max.: 1, default: 0 +#define TMC5130_EVENT_STOP_R_FIELD TMC5130_EVENT_STOP_R_MASK, TMC5130_EVENT_STOP_R_SHIFT +#define TMC5130_EVENT_STOP_SG_MASK 0x40 // RAMP_STAT // +#define TMC5130_EVENT_STOP_SG_SHIFT 6 // min.: 0, max.: 1, default: 0 +#define TMC5130_EVENT_STOP_SG_FIELD TMC5130_EVENT_STOP_SG_MASK, TMC5130_EVENT_STOP_SG_SHIFT +#define TMC5130_EVENT_POS_REACHED_MASK 0x80 // RAMP_STAT // +#define TMC5130_EVENT_POS_REACHED_SHIFT 7 // min.: 0, max.: 1, default: 0 +#define TMC5130_EVENT_POS_REACHED_FIELD TMC5130_EVENT_POS_REACHED_MASK, TMC5130_EVENT_POS_REACHED_SHIFT +#define TMC5130_VELOCITY_REACHED_MASK 0x0100 // RAMP_STAT // +#define TMC5130_VELOCITY_REACHED_SHIFT 8 // min.: 0, max.: 1, default: 0 +#define TMC5130_VELOCITY_REACHED_FIELD TMC5130_VELOCITY_REACHED_MASK, TMC5130_VELOCITY_REACHED_SHIFT +#define TMC5130_POSITION_REACHED_MASK 0x0200 // RAMP_STAT // +#define TMC5130_POSITION_REACHED_SHIFT 9 // min.: 0, max.: 1, default: 0 +#define TMC5130_POSITION_REACHED_FIELD TMC5130_POSITION_REACHED_MASK, TMC5130_POSITION_REACHED_SHIFT +#define TMC5130_VZERO_MASK 0x0400 // RAMP_STAT // +#define TMC5130_VZERO_SHIFT 10 // min.: 0, max.: 1, default: 0 +#define TMC5130_VZERO_FIELD TMC5130_VZERO_MASK, TMC5130_VZERO_SHIFT +#define TMC5130_T_ZEROWAIT_ACTIVE_MASK 0x0800 // RAMP_STAT // +#define TMC5130_T_ZEROWAIT_ACTIVE_SHIFT 11 // min.: 0, max.: 1, default: 0 +#define TMC5130_T_ZEROWAIT_ACTIVE_FIELD TMC5130_T_ZEROWAIT_ACTIVE_MASK, TMC5130_T_ZEROWAIT_ACTIVE_SHIFT +#define TMC5130_SECOND_MOVE_MASK 0x1000 // RAMP_STAT // +#define TMC5130_SECOND_MOVE_SHIFT 12 // min.: 0, max.: 1, default: 0 +#define TMC5130_SECOND_MOVE_FIELD TMC5130_SECOND_MOVE_MASK, TMC5130_SECOND_MOVE_SHIFT +#define TMC5130_STATUS_SG_MASK 0x2000 // RAMP_STAT // +#define TMC5130_STATUS_SG_SHIFT 13 // min.: 0, max.: 1, default: 0 +#define TMC5130_STATUS_SG_FIELD TMC5130_STATUS_SG_MASK, TMC5130_STATUS_SG_SHIFT +#define TMC5130_XLATCH_MASK 0xFFFFFFFF // XLATCH // Ramp generator latch position, latches XACTUAL upon a programmable switch event (see SW_MODE). Hint: The encoder position can be latched to ENC_LATCH together with XLATCH to allow consistency checks. +#define TMC5130_XLATCH_SHIFT 0 // min.: 0, max.: 4294967295, default: 0 +#define TMC5130_XLATCH_FIELD TMC5130_XLATCH_MASK, TMC5130_XLATCH_SHIFT +#define TMC5130_POL_A_MASK 0x01 // ENCMODE // Required A polarity for an N channel event +#define TMC5130_POL_A_SHIFT 0 // min.: 0, max.: 1, default: 0 +#define TMC5130_POL_A_FIELD TMC5130_POL_A_MASK, TMC5130_POL_A_SHIFT +#define TMC5130_POL_B_MASK 0x02 // ENCMODE // Required B polarity for an N channel event +#define TMC5130_POL_B_SHIFT 1 // min.: 0, max.: 1, default: 0 +#define TMC5130_POL_B_FIELD TMC5130_POL_B_MASK, TMC5130_POL_B_SHIFT +#define TMC5130_POL_N_MASK 0x04 // ENCMODE // Defines active polarity of N +#define TMC5130_POL_N_SHIFT 2 // min.: 0, max.: 1, default: 0 +#define TMC5130_POL_N_FIELD TMC5130_POL_N_MASK, TMC5130_POL_N_SHIFT +#define TMC5130_IGNORE_AB_MASK 0x08 // ENCMODE // +#define TMC5130_IGNORE_AB_SHIFT 3 // min.: 0, max.: 1, default: 0 +#define TMC5130_IGNORE_AB_FIELD TMC5130_IGNORE_AB_MASK, TMC5130_IGNORE_AB_SHIFT +#define TMC5130_CLR_CONT_MASK 0x10 // ENCMODE // +#define TMC5130_CLR_CONT_SHIFT 4 // min.: 0, max.: 1, default: 0 +#define TMC5130_CLR_CONT_FIELD TMC5130_CLR_CONT_MASK, TMC5130_CLR_CONT_SHIFT +#define TMC5130_CLR_ONCE_MASK 0x20 // ENCMODE // +#define TMC5130_CLR_ONCE_SHIFT 5 // min.: 0, max.: 1, default: 0 +#define TMC5130_CLR_ONCE_FIELD TMC5130_CLR_ONCE_MASK, TMC5130_CLR_ONCE_SHIFT +#define TMC5130_POS_EDGENEG_EDGE_MASK 0xC0 // ENCMODE // +#define TMC5130_POS_EDGENEG_EDGE_SHIFT 6 // min.: 0, max.: 3, default: 0 +#define TMC5130_POS_EDGENEG_EDGE_FIELD TMC5130_POS_EDGENEG_EDGE_MASK, TMC5130_POS_EDGENEG_EDGE_SHIFT +#define TMC5130_CLR_ENC_X_MASK 0x0100 // ENCMODE // +#define TMC5130_CLR_ENC_X_SHIFT 8 // min.: 0, max.: 1, default: 0 +#define TMC5130_CLR_ENC_X_FIELD TMC5130_CLR_ENC_X_MASK, TMC5130_CLR_ENC_X_SHIFT +#define TMC5130_LATCH_X_ACT_MASK 0x0200 // ENCMODE // +#define TMC5130_LATCH_X_ACT_SHIFT 9 // min.: 0, max.: 1, default: 0 +#define TMC5130_LATCH_X_ACT_FIELD TMC5130_LATCH_X_ACT_MASK, TMC5130_LATCH_X_ACT_SHIFT +#define TMC5130_ENC_SEL_DECIMAL_MASK 0x0400 // ENCMODE // +#define TMC5130_ENC_SEL_DECIMAL_SHIFT 10 // min.: 0, max.: 1, default: 0 +#define TMC5130_ENC_SEL_DECIMAL_FIELD TMC5130_ENC_SEL_DECIMAL_MASK, TMC5130_ENC_SEL_DECIMAL_SHIFT +#define TMC5130_X_ENC_MASK 0xFFFFFFFF // X_ENC // Actual encoder position +#define TMC5130_X_ENC_SHIFT 0 // min.: -2147483648, max.: 2147483647, default: 0 +#define TMC5130_X_ENC_FIELD TMC5130_X_ENC_MASK, TMC5130_X_ENC_SHIFT +#define TMC5130_INTEGER_MASK 0xFFFF0000 // ENC_CONST // Integer part of encoder constant +#define TMC5130_INTEGER_SHIFT 16 // min.: 0, max.: 65535, default: 0 +#define TMC5130_INTEGER_FIELD TMC5130_INTEGER_MASK, TMC5130_INTEGER_SHIFT +#define TMC5130_FRACTIONAL_MASK 0xFFFF // ENC_CONST // Fractional part of encoder constant +#define TMC5130_FRACTIONAL_SHIFT 0 // min.: 0, max.: 65535, default: 0 +#define TMC5130_FRACTIONAL_FIELD TMC5130_FRACTIONAL_MASK, TMC5130_FRACTIONAL_SHIFT +#define TMC5130_ENC_STATUS_MASK 0x01 // ENC_STATUS // Encoder status +#define TMC5130_ENC_STATUS_SHIFT 0 // min.: 0, max.: 1, default: 0 +#define TMC5130_ENC_STATUS_FIELD TMC5130_ENC_STATUS_MASK, TMC5130_ENC_STATUS_SHIFT +#define TMC5130_ENC_LATCH_MASK 0xFFFFFFFF // ENC_LATCH // Encoder position X_ENC latched on N event +#define TMC5130_ENC_LATCH_SHIFT 0 // min.: -2147483648, max.: 2147483647, default: 0 +#define TMC5130_ENC_LATCH_FIELD TMC5130_ENC_LATCH_MASK, TMC5130_ENC_LATCH_SHIFT +#define TMC5130_OFS0_MASK 0x01 // MSLUT[0] // microstep table entry 0 +#define TMC5130_OFS0_SHIFT 0 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS0_FIELD TMC5130_OFS0_MASK, TMC5130_OFS0_SHIFT +#define TMC5130_OFS1_MASK 0x02 // MSLUT[0] // microstep table entry 1 +#define TMC5130_OFS1_SHIFT 1 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS1_FIELD TMC5130_OFS1_MASK, TMC5130_OFS1_SHIFT +#define TMC5130_OFS2_MASK 0x04 // MSLUT[0] // microstep table entry 2 +#define TMC5130_OFS2_SHIFT 2 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS2_FIELD TMC5130_OFS2_MASK, TMC5130_OFS2_SHIFT +#define TMC5130_OFS3_MASK 0x08 // MSLUT[0] // microstep table entry 3 +#define TMC5130_OFS3_SHIFT 3 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS3_FIELD TMC5130_OFS3_MASK, TMC5130_OFS3_SHIFT +#define TMC5130_OFS4_MASK 0x10 // MSLUT[0] // microstep table entry 4 +#define TMC5130_OFS4_SHIFT 4 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS4_FIELD TMC5130_OFS4_MASK, TMC5130_OFS4_SHIFT +#define TMC5130_OFS5_MASK 0x20 // MSLUT[0] // microstep table entry 5 +#define TMC5130_OFS5_SHIFT 5 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS5_FIELD TMC5130_OFS5_MASK, TMC5130_OFS5_SHIFT +#define TMC5130_OFS6_MASK 0x40 // MSLUT[0] // microstep table entry 6 +#define TMC5130_OFS6_SHIFT 6 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS6_FIELD TMC5130_OFS6_MASK, TMC5130_OFS6_SHIFT +#define TMC5130_OFS7_MASK 0x80 // MSLUT[0] // microstep table entry 7 +#define TMC5130_OFS7_SHIFT 7 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS7_FIELD TMC5130_OFS7_MASK, TMC5130_OFS7_SHIFT +#define TMC5130_OFS8_MASK 0x0100 // MSLUT[0] // microstep table entry 8 +#define TMC5130_OFS8_SHIFT 8 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS8_FIELD TMC5130_OFS8_MASK, TMC5130_OFS8_SHIFT +#define TMC5130_OFS9_MASK 0x0200 // MSLUT[0] // microstep table entry 9 +#define TMC5130_OFS9_SHIFT 9 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS9_FIELD TMC5130_OFS9_MASK, TMC5130_OFS9_SHIFT +#define TMC5130_OFS10_MASK 0x0400 // MSLUT[0] // microstep table entry 10 +#define TMC5130_OFS10_SHIFT 10 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS10_FIELD TMC5130_OFS10_MASK, TMC5130_OFS10_SHIFT +#define TMC5130_OFS11_MASK 0x0800 // MSLUT[0] // microstep table entry 11 +#define TMC5130_OFS11_SHIFT 11 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS11_FIELD TMC5130_OFS11_MASK, TMC5130_OFS11_SHIFT +#define TMC5130_OFS12_MASK 0x1000 // MSLUT[0] // microstep table entry 12 +#define TMC5130_OFS12_SHIFT 12 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS12_FIELD TMC5130_OFS12_MASK, TMC5130_OFS12_SHIFT +#define TMC5130_OFS13_MASK 0x2000 // MSLUT[0] // microstep table entry 13 +#define TMC5130_OFS13_SHIFT 13 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS13_FIELD TMC5130_OFS13_MASK, TMC5130_OFS13_SHIFT +#define TMC5130_OFS14_MASK 0x4000 // MSLUT[0] // microstep table entry 14 +#define TMC5130_OFS14_SHIFT 14 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS14_FIELD TMC5130_OFS14_MASK, TMC5130_OFS14_SHIFT +#define TMC5130_OFS15_MASK 0x8000 // MSLUT[0] // microstep table entry 15 +#define TMC5130_OFS15_SHIFT 15 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS15_FIELD TMC5130_OFS15_MASK, TMC5130_OFS15_SHIFT +#define TMC5130_OFS16_MASK 0x010000 // MSLUT[0] // microstep table entry 16 +#define TMC5130_OFS16_SHIFT 16 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS16_FIELD TMC5130_OFS16_MASK, TMC5130_OFS16_SHIFT +#define TMC5130_OFS17_MASK 0x020000 // MSLUT[0] // microstep table entry 17 +#define TMC5130_OFS17_SHIFT 17 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS17_FIELD TMC5130_OFS17_MASK, TMC5130_OFS17_SHIFT +#define TMC5130_OFS18_MASK 0x040000 // MSLUT[0] // microstep table entry 18 +#define TMC5130_OFS18_SHIFT 18 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS18_FIELD TMC5130_OFS18_MASK, TMC5130_OFS18_SHIFT +#define TMC5130_OFS19_MASK 0x080000 // MSLUT[0] // microstep table entry 19 +#define TMC5130_OFS19_SHIFT 19 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS19_FIELD TMC5130_OFS19_MASK, TMC5130_OFS19_SHIFT +#define TMC5130_OFS20_MASK 0x100000 // MSLUT[0] // microstep table entry 20 +#define TMC5130_OFS20_SHIFT 20 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS20_FIELD TMC5130_OFS20_MASK, TMC5130_OFS20_SHIFT +#define TMC5130_OFS21_MASK 0x200000 // MSLUT[0] // microstep table entry 21 +#define TMC5130_OFS21_SHIFT 21 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS21_FIELD TMC5130_OFS21_MASK, TMC5130_OFS21_SHIFT +#define TMC5130_OFS22_MASK 0x400000 // MSLUT[0] // microstep table entry 22 +#define TMC5130_OFS22_SHIFT 22 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS22_FIELD TMC5130_OFS22_MASK, TMC5130_OFS22_SHIFT +#define TMC5130_OFS23_MASK 0x800000 // MSLUT[0] // microstep table entry 23 +#define TMC5130_OFS23_SHIFT 23 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS23_FIELD TMC5130_OFS23_MASK, TMC5130_OFS23_SHIFT +#define TMC5130_OFS24_MASK 0x01000000 // MSLUT[0] // microstep table entry 24 +#define TMC5130_OFS24_SHIFT 24 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS24_FIELD TMC5130_OFS24_MASK, TMC5130_OFS24_SHIFT +#define TMC5130_OFS25_MASK 0x02000000 // MSLUT[0] // microstep table entry 25 +#define TMC5130_OFS25_SHIFT 25 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS25_FIELD TMC5130_OFS25_MASK, TMC5130_OFS25_SHIFT +#define TMC5130_OFS26_MASK 0x04000000 // MSLUT[0] // microstep table entry 26 +#define TMC5130_OFS26_SHIFT 26 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS26_FIELD TMC5130_OFS26_MASK, TMC5130_OFS26_SHIFT +#define TMC5130_OFS27_MASK 0x08000000 // MSLUT[0] // microstep table entry 27 +#define TMC5130_OFS27_SHIFT 27 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS27_FIELD TMC5130_OFS27_MASK, TMC5130_OFS27_SHIFT +#define TMC5130_OFS28_MASK 0x10000000 // MSLUT[0] // microstep table entry 28 +#define TMC5130_OFS28_SHIFT 28 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS28_FIELD TMC5130_OFS28_MASK, TMC5130_OFS28_SHIFT +#define TMC5130_OFS29_MASK 0x20000000 // MSLUT[0] // microstep table entry 29 +#define TMC5130_OFS29_SHIFT 29 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS29_FIELD TMC5130_OFS29_MASK, TMC5130_OFS29_SHIFT +#define TMC5130_OFS30_MASK 0x40000000 // MSLUT[0] // microstep table entry 30 +#define TMC5130_OFS30_SHIFT 30 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS30_FIELD TMC5130_OFS30_MASK, TMC5130_OFS30_SHIFT +#define TMC5130_OFS31_MASK 0x80000000 // MSLUT[0] // microstep table entry 31 +#define TMC5130_OFS31_SHIFT 31 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS31_FIELD TMC5130_OFS31_MASK, TMC5130_OFS31_SHIFT +#define TMC5130_OFS32_MASK 0x01 // MSLUT[1] // microstep table entry 32 +#define TMC5130_OFS32_SHIFT 0 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS32_FIELD TMC5130_OFS32_MASK, TMC5130_OFS32_SHIFT +#define TMC5130_OFS33_MASK 0x02 // MSLUT[1] // microstep table entry 33 +#define TMC5130_OFS33_SHIFT 1 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS33_FIELD TMC5130_OFS33_MASK, TMC5130_OFS33_SHIFT +#define TMC5130_OFS34_MASK 0x04 // MSLUT[1] // microstep table entry 34 +#define TMC5130_OFS34_SHIFT 2 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS34_FIELD TMC5130_OFS34_MASK, TMC5130_OFS34_SHIFT +#define TMC5130_OFS35_MASK 0x08 // MSLUT[1] // microstep table entry 35 +#define TMC5130_OFS35_SHIFT 3 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS35_FIELD TMC5130_OFS35_MASK, TMC5130_OFS35_SHIFT +#define TMC5130_OFS36_MASK 0x10 // MSLUT[1] // microstep table entry 36 +#define TMC5130_OFS36_SHIFT 4 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS36_FIELD TMC5130_OFS36_MASK, TMC5130_OFS36_SHIFT +#define TMC5130_OFS37_MASK 0x20 // MSLUT[1] // microstep table entry 37 +#define TMC5130_OFS37_SHIFT 5 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS37_FIELD TMC5130_OFS37_MASK, TMC5130_OFS37_SHIFT +#define TMC5130_OFS38_MASK 0x40 // MSLUT[1] // microstep table entry 38 +#define TMC5130_OFS38_SHIFT 6 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS38_FIELD TMC5130_OFS38_MASK, TMC5130_OFS38_SHIFT +#define TMC5130_OFS39_MASK 0x80 // MSLUT[1] // microstep table entry 39 +#define TMC5130_OFS39_SHIFT 7 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS39_FIELD TMC5130_OFS39_MASK, TMC5130_OFS39_SHIFT +#define TMC5130_OFS40_MASK 0x0100 // MSLUT[1] // microstep table entry 40 +#define TMC5130_OFS40_SHIFT 8 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS40_FIELD TMC5130_OFS40_MASK, TMC5130_OFS40_SHIFT +#define TMC5130_OFS41_MASK 0x0200 // MSLUT[1] // microstep table entry 41 +#define TMC5130_OFS41_SHIFT 9 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS41_FIELD TMC5130_OFS41_MASK, TMC5130_OFS41_SHIFT +#define TMC5130_OFS42_MASK 0x0400 // MSLUT[1] // microstep table entry 42 +#define TMC5130_OFS42_SHIFT 10 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS42_FIELD TMC5130_OFS42_MASK, TMC5130_OFS42_SHIFT +#define TMC5130_OFS43_MASK 0x0800 // MSLUT[1] // microstep table entry 43 +#define TMC5130_OFS43_SHIFT 11 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS43_FIELD TMC5130_OFS43_MASK, TMC5130_OFS43_SHIFT +#define TMC5130_OFS44_MASK 0x1000 // MSLUT[1] // microstep table entry 44 +#define TMC5130_OFS44_SHIFT 12 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS44_FIELD TMC5130_OFS44_MASK, TMC5130_OFS44_SHIFT +#define TMC5130_OFS45_MASK 0x2000 // MSLUT[1] // microstep table entry 45 +#define TMC5130_OFS45_SHIFT 13 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS45_FIELD TMC5130_OFS45_MASK, TMC5130_OFS45_SHIFT +#define TMC5130_OFS46_MASK 0x4000 // MSLUT[1] // microstep table entry 46 +#define TMC5130_OFS46_SHIFT 14 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS46_FIELD TMC5130_OFS46_MASK, TMC5130_OFS46_SHIFT +#define TMC5130_OFS47_MASK 0x8000 // MSLUT[1] // microstep table entry 47 +#define TMC5130_OFS47_SHIFT 15 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS47_FIELD TMC5130_OFS47_MASK, TMC5130_OFS47_SHIFT +#define TMC5130_OFS48_MASK 0x010000 // MSLUT[1] // microstep table entry 48 +#define TMC5130_OFS48_SHIFT 16 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS48_FIELD TMC5130_OFS48_MASK, TMC5130_OFS48_SHIFT +#define TMC5130_OFS49_MASK 0x020000 // MSLUT[1] // microstep table entry 49 +#define TMC5130_OFS49_SHIFT 17 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS49_FIELD TMC5130_OFS49_MASK, TMC5130_OFS49_SHIFT +#define TMC5130_OFS50_MASK 0x040000 // MSLUT[1] // microstep table entry 50 +#define TMC5130_OFS50_SHIFT 18 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS50_FIELD TMC5130_OFS50_MASK, TMC5130_OFS50_SHIFT +#define TMC5130_OFS51_MASK 0x080000 // MSLUT[1] // microstep table entry 51 +#define TMC5130_OFS51_SHIFT 19 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS51_FIELD TMC5130_OFS51_MASK, TMC5130_OFS51_SHIFT +#define TMC5130_OFS52_MASK 0x100000 // MSLUT[1] // microstep table entry 52 +#define TMC5130_OFS52_SHIFT 20 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS52_FIELD TMC5130_OFS52_MASK, TMC5130_OFS52_SHIFT +#define TMC5130_OFS53_MASK 0x200000 // MSLUT[1] // microstep table entry 53 +#define TMC5130_OFS53_SHIFT 21 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS53_FIELD TMC5130_OFS53_MASK, TMC5130_OFS53_SHIFT +#define TMC5130_OFS54_MASK 0x400000 // MSLUT[1] // microstep table entry 54 +#define TMC5130_OFS54_SHIFT 22 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS54_FIELD TMC5130_OFS54_MASK, TMC5130_OFS54_SHIFT +#define TMC5130_OFS55_MASK 0x800000 // MSLUT[1] // microstep table entry 55 +#define TMC5130_OFS55_SHIFT 23 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS55_FIELD TMC5130_OFS55_MASK, TMC5130_OFS55_SHIFT +#define TMC5130_OFS56_MASK 0x01000000 // MSLUT[1] // microstep table entry 56 +#define TMC5130_OFS56_SHIFT 24 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS56_FIELD TMC5130_OFS56_MASK, TMC5130_OFS56_SHIFT +#define TMC5130_OFS57_MASK 0x02000000 // MSLUT[1] // microstep table entry 57 +#define TMC5130_OFS57_SHIFT 25 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS57_FIELD TMC5130_OFS57_MASK, TMC5130_OFS57_SHIFT +#define TMC5130_OFS58_MASK 0x04000000 // MSLUT[1] // microstep table entry 58 +#define TMC5130_OFS58_SHIFT 26 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS58_FIELD TMC5130_OFS58_MASK, TMC5130_OFS58_SHIFT +#define TMC5130_OFS59_MASK 0x08000000 // MSLUT[1] // microstep table entry 59 +#define TMC5130_OFS59_SHIFT 27 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS59_FIELD TMC5130_OFS59_MASK, TMC5130_OFS59_SHIFT +#define TMC5130_OFS60_MASK 0x10000000 // MSLUT[1] // microstep table entry 60 +#define TMC5130_OFS60_SHIFT 28 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS60_FIELD TMC5130_OFS60_MASK, TMC5130_OFS60_SHIFT +#define TMC5130_OFS61_MASK 0x20000000 // MSLUT[1] // microstep table entry 61 +#define TMC5130_OFS61_SHIFT 29 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS61_FIELD TMC5130_OFS61_MASK, TMC5130_OFS61_SHIFT +#define TMC5130_OFS62_MASK 0x40000000 // MSLUT[1] // microstep table entry 62 +#define TMC5130_OFS62_SHIFT 30 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS62_FIELD TMC5130_OFS62_MASK, TMC5130_OFS62_SHIFT +#define TMC5130_OFS63_MASK 0x80000000 // MSLUT[1] // microstep table entry 63 +#define TMC5130_OFS63_SHIFT 31 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS63_FIELD TMC5130_OFS63_MASK, TMC5130_OFS63_SHIFT +#define TMC5130_OFS64_MASK 0x01 // MSLUT[2] // microstep table entry 64 +#define TMC5130_OFS64_SHIFT 0 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS64_FIELD TMC5130_OFS64_MASK, TMC5130_OFS64_SHIFT +#define TMC5130_OFS65_MASK 0x02 // MSLUT[2] // microstep table entry 65 +#define TMC5130_OFS65_SHIFT 1 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS65_FIELD TMC5130_OFS65_MASK, TMC5130_OFS65_SHIFT +#define TMC5130_OFS66_MASK 0x04 // MSLUT[2] // microstep table entry 66 +#define TMC5130_OFS66_SHIFT 2 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS66_FIELD TMC5130_OFS66_MASK, TMC5130_OFS66_SHIFT +#define TMC5130_OFS67_MASK 0x08 // MSLUT[2] // microstep table entry 67 +#define TMC5130_OFS67_SHIFT 3 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS67_FIELD TMC5130_OFS67_MASK, TMC5130_OFS67_SHIFT +#define TMC5130_OFS68_MASK 0x10 // MSLUT[2] // microstep table entry 68 +#define TMC5130_OFS68_SHIFT 4 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS68_FIELD TMC5130_OFS68_MASK, TMC5130_OFS68_SHIFT +#define TMC5130_OFS69_MASK 0x20 // MSLUT[2] // microstep table entry 69 +#define TMC5130_OFS69_SHIFT 5 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS69_FIELD TMC5130_OFS69_MASK, TMC5130_OFS69_SHIFT +#define TMC5130_OFS70_MASK 0x40 // MSLUT[2] // microstep table entry 70 +#define TMC5130_OFS70_SHIFT 6 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS70_FIELD TMC5130_OFS70_MASK, TMC5130_OFS70_SHIFT +#define TMC5130_OFS71_MASK 0x80 // MSLUT[2] // microstep table entry 71 +#define TMC5130_OFS71_SHIFT 7 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS71_FIELD TMC5130_OFS71_MASK, TMC5130_OFS71_SHIFT +#define TMC5130_OFS72_MASK 0x0100 // MSLUT[2] // microstep table entry 72 +#define TMC5130_OFS72_SHIFT 8 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS72_FIELD TMC5130_OFS72_MASK, TMC5130_OFS72_SHIFT +#define TMC5130_OFS73_MASK 0x0200 // MSLUT[2] // microstep table entry 73 +#define TMC5130_OFS73_SHIFT 9 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS73_FIELD TMC5130_OFS73_MASK, TMC5130_OFS73_SHIFT +#define TMC5130_OFS74_MASK 0x0400 // MSLUT[2] // microstep table entry 74 +#define TMC5130_OFS74_SHIFT 10 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS74_FIELD TMC5130_OFS74_MASK, TMC5130_OFS74_SHIFT +#define TMC5130_OFS75_MASK 0x0800 // MSLUT[2] // microstep table entry 75 +#define TMC5130_OFS75_SHIFT 11 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS75_FIELD TMC5130_OFS75_MASK, TMC5130_OFS75_SHIFT +#define TMC5130_OFS76_MASK 0x1000 // MSLUT[2] // microstep table entry 76 +#define TMC5130_OFS76_SHIFT 12 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS76_FIELD TMC5130_OFS76_MASK, TMC5130_OFS76_SHIFT +#define TMC5130_OFS77_MASK 0x2000 // MSLUT[2] // microstep table entry 77 +#define TMC5130_OFS77_SHIFT 13 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS77_FIELD TMC5130_OFS77_MASK, TMC5130_OFS77_SHIFT +#define TMC5130_OFS78_MASK 0x4000 // MSLUT[2] // microstep table entry 78 +#define TMC5130_OFS78_SHIFT 14 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS78_FIELD TMC5130_OFS78_MASK, TMC5130_OFS78_SHIFT +#define TMC5130_OFS79_MASK 0x8000 // MSLUT[2] // microstep table entry 79 +#define TMC5130_OFS79_SHIFT 15 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS79_FIELD TMC5130_OFS79_MASK, TMC5130_OFS79_SHIFT +#define TMC5130_OFS80_MASK 0x010000 // MSLUT[2] // microstep table entry 80 +#define TMC5130_OFS80_SHIFT 16 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS80_FIELD TMC5130_OFS80_MASK, TMC5130_OFS80_SHIFT +#define TMC5130_OFS81_MASK 0x020000 // MSLUT[2] // microstep table entry 81 +#define TMC5130_OFS81_SHIFT 17 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS81_FIELD TMC5130_OFS81_MASK, TMC5130_OFS81_SHIFT +#define TMC5130_OFS82_MASK 0x040000 // MSLUT[2] // microstep table entry 82 +#define TMC5130_OFS82_SHIFT 18 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS82_FIELD TMC5130_OFS82_MASK, TMC5130_OFS82_SHIFT +#define TMC5130_OFS83_MASK 0x080000 // MSLUT[2] // microstep table entry 83 +#define TMC5130_OFS83_SHIFT 19 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS83_FIELD TMC5130_OFS83_MASK, TMC5130_OFS83_SHIFT +#define TMC5130_OFS84_MASK 0x100000 // MSLUT[2] // microstep table entry 84 +#define TMC5130_OFS84_SHIFT 20 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS84_FIELD TMC5130_OFS84_MASK, TMC5130_OFS84_SHIFT +#define TMC5130_OFS85_MASK 0x200000 // MSLUT[2] // microstep table entry 85 +#define TMC5130_OFS85_SHIFT 21 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS85_FIELD TMC5130_OFS85_MASK, TMC5130_OFS85_SHIFT +#define TMC5130_OFS86_MASK 0x400000 // MSLUT[2] // microstep table entry 86 +#define TMC5130_OFS86_SHIFT 22 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS86_FIELD TMC5130_OFS86_MASK, TMC5130_OFS86_SHIFT +#define TMC5130_OFS87_MASK 0x800000 // MSLUT[2] // microstep table entry 87 +#define TMC5130_OFS87_SHIFT 23 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS87_FIELD TMC5130_OFS87_MASK, TMC5130_OFS87_SHIFT +#define TMC5130_OFS88_MASK 0x01000000 // MSLUT[2] // microstep table entry 88 +#define TMC5130_OFS88_SHIFT 24 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS88_FIELD TMC5130_OFS88_MASK, TMC5130_OFS88_SHIFT +#define TMC5130_OFS89_MASK 0x02000000 // MSLUT[2] // microstep table entry 89 +#define TMC5130_OFS89_SHIFT 25 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS89_FIELD TMC5130_OFS89_MASK, TMC5130_OFS89_SHIFT +#define TMC5130_OFS90_MASK 0x04000000 // MSLUT[2] // microstep table entry 90 +#define TMC5130_OFS90_SHIFT 26 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS90_FIELD TMC5130_OFS90_MASK, TMC5130_OFS90_SHIFT +#define TMC5130_OFS91_MASK 0x08000000 // MSLUT[2] // microstep table entry 91 +#define TMC5130_OFS91_SHIFT 27 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS91_FIELD TMC5130_OFS91_MASK, TMC5130_OFS91_SHIFT +#define TMC5130_OFS92_MASK 0x10000000 // MSLUT[2] // microstep table entry 92 +#define TMC5130_OFS92_SHIFT 28 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS92_FIELD TMC5130_OFS92_MASK, TMC5130_OFS92_SHIFT +#define TMC5130_OFS93_MASK 0x20000000 // MSLUT[2] // microstep table entry 93 +#define TMC5130_OFS93_SHIFT 29 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS93_FIELD TMC5130_OFS93_MASK, TMC5130_OFS93_SHIFT +#define TMC5130_OFS94_MASK 0x40000000 // MSLUT[2] // microstep table entry 94 +#define TMC5130_OFS94_SHIFT 30 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS94_FIELD TMC5130_OFS94_MASK, TMC5130_OFS94_SHIFT +#define TMC5130_OFS95_MASK 0x80000000 // MSLUT[2] // microstep table entry 95 +#define TMC5130_OFS95_SHIFT 31 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS95_FIELD TMC5130_OFS95_MASK, TMC5130_OFS95_SHIFT +#define TMC5130_OFS96_MASK 0x01 // MSLUT[3] // microstep table entry 96 +#define TMC5130_OFS96_SHIFT 0 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS96_FIELD TMC5130_OFS96_MASK, TMC5130_OFS96_SHIFT +#define TMC5130_OFS97_MASK 0x02 // MSLUT[3] // microstep table entry 97 +#define TMC5130_OFS97_SHIFT 1 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS97_FIELD TMC5130_OFS97_MASK, TMC5130_OFS97_SHIFT +#define TMC5130_OFS98_MASK 0x04 // MSLUT[3] // microstep table entry 98 +#define TMC5130_OFS98_SHIFT 2 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS98_FIELD TMC5130_OFS98_MASK, TMC5130_OFS98_SHIFT +#define TMC5130_OFS99_MASK 0x08 // MSLUT[3] // microstep table entry 99 +#define TMC5130_OFS99_SHIFT 3 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS99_FIELD TMC5130_OFS99_MASK, TMC5130_OFS99_SHIFT +#define TMC5130_OFS100_MASK 0x10 // MSLUT[3] // microstep table entry 100 +#define TMC5130_OFS100_SHIFT 4 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS100_FIELD TMC5130_OFS100_MASK, TMC5130_OFS100_SHIFT +#define TMC5130_OFS101_MASK 0x20 // MSLUT[3] // microstep table entry 101 +#define TMC5130_OFS101_SHIFT 5 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS101_FIELD TMC5130_OFS101_MASK, TMC5130_OFS101_SHIFT +#define TMC5130_OFS102_MASK 0x40 // MSLUT[3] // microstep table entry 102 +#define TMC5130_OFS102_SHIFT 6 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS102_FIELD TMC5130_OFS102_MASK, TMC5130_OFS102_SHIFT +#define TMC5130_OFS103_MASK 0x80 // MSLUT[3] // microstep table entry 103 +#define TMC5130_OFS103_SHIFT 7 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS103_FIELD TMC5130_OFS103_MASK, TMC5130_OFS103_SHIFT +#define TMC5130_OFS104_MASK 0x0100 // MSLUT[3] // microstep table entry 104 +#define TMC5130_OFS104_SHIFT 8 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS104_FIELD TMC5130_OFS104_MASK, TMC5130_OFS104_SHIFT +#define TMC5130_OFS105_MASK 0x0200 // MSLUT[3] // microstep table entry 105 +#define TMC5130_OFS105_SHIFT 9 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS105_FIELD TMC5130_OFS105_MASK, TMC5130_OFS105_SHIFT +#define TMC5130_OFS106_MASK 0x0400 // MSLUT[3] // microstep table entry 106 +#define TMC5130_OFS106_SHIFT 10 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS106_FIELD TMC5130_OFS106_MASK, TMC5130_OFS106_SHIFT +#define TMC5130_OFS107_MASK 0x0800 // MSLUT[3] // microstep table entry 107 +#define TMC5130_OFS107_SHIFT 11 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS107_FIELD TMC5130_OFS107_MASK, TMC5130_OFS107_SHIFT +#define TMC5130_OFS108_MASK 0x1000 // MSLUT[3] // microstep table entry 108 +#define TMC5130_OFS108_SHIFT 12 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS108_FIELD TMC5130_OFS108_MASK, TMC5130_OFS108_SHIFT +#define TMC5130_OFS109_MASK 0x2000 // MSLUT[3] // microstep table entry 109 +#define TMC5130_OFS109_SHIFT 13 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS109_FIELD TMC5130_OFS109_MASK, TMC5130_OFS109_SHIFT +#define TMC5130_OFS110_MASK 0x4000 // MSLUT[3] // microstep table entry 110 +#define TMC5130_OFS110_SHIFT 14 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS110_FIELD TMC5130_OFS110_MASK, TMC5130_OFS110_SHIFT +#define TMC5130_OFS111_MASK 0x8000 // MSLUT[3] // microstep table entry 111 +#define TMC5130_OFS111_SHIFT 15 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS111_FIELD TMC5130_OFS111_MASK, TMC5130_OFS111_SHIFT +#define TMC5130_OFS112_MASK 0x010000 // MSLUT[3] // microstep table entry 112 +#define TMC5130_OFS112_SHIFT 16 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS112_FIELD TMC5130_OFS112_MASK, TMC5130_OFS112_SHIFT +#define TMC5130_OFS113_MASK 0x020000 // MSLUT[3] // microstep table entry 113 +#define TMC5130_OFS113_SHIFT 17 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS113_FIELD TMC5130_OFS113_MASK, TMC5130_OFS113_SHIFT +#define TMC5130_OFS114_MASK 0x040000 // MSLUT[3] // microstep table entry 114 +#define TMC5130_OFS114_SHIFT 18 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS114_FIELD TMC5130_OFS114_MASK, TMC5130_OFS114_SHIFT +#define TMC5130_OFS115_MASK 0x080000 // MSLUT[3] // microstep table entry 115 +#define TMC5130_OFS115_SHIFT 19 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS115_FIELD TMC5130_OFS115_MASK, TMC5130_OFS115_SHIFT +#define TMC5130_OFS116_MASK 0x100000 // MSLUT[3] // microstep table entry 116 +#define TMC5130_OFS116_SHIFT 20 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS116_FIELD TMC5130_OFS116_MASK, TMC5130_OFS116_SHIFT +#define TMC5130_OFS117_MASK 0x200000 // MSLUT[3] // microstep table entry 117 +#define TMC5130_OFS117_SHIFT 21 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS117_FIELD TMC5130_OFS117_MASK, TMC5130_OFS117_SHIFT +#define TMC5130_OFS118_MASK 0x400000 // MSLUT[3] // microstep table entry 118 +#define TMC5130_OFS118_SHIFT 22 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS118_FIELD TMC5130_OFS118_MASK, TMC5130_OFS118_SHIFT +#define TMC5130_OFS119_MASK 0x800000 // MSLUT[3] // microstep table entry 119 +#define TMC5130_OFS119_SHIFT 23 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS119_FIELD TMC5130_OFS119_MASK, TMC5130_OFS119_SHIFT +#define TMC5130_OFS120_MASK 0x01000000 // MSLUT[3] // microstep table entry 120 +#define TMC5130_OFS120_SHIFT 24 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS120_FIELD TMC5130_OFS120_MASK, TMC5130_OFS120_SHIFT +#define TMC5130_OFS121_MASK 0x02000000 // MSLUT[3] // microstep table entry 121 +#define TMC5130_OFS121_SHIFT 25 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS121_FIELD TMC5130_OFS121_MASK, TMC5130_OFS121_SHIFT +#define TMC5130_OFS122_MASK 0x04000000 // MSLUT[3] // microstep table entry 122 +#define TMC5130_OFS122_SHIFT 26 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS122_FIELD TMC5130_OFS122_MASK, TMC5130_OFS122_SHIFT +#define TMC5130_OFS123_MASK 0x08000000 // MSLUT[3] // microstep table entry 123 +#define TMC5130_OFS123_SHIFT 27 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS123_FIELD TMC5130_OFS123_MASK, TMC5130_OFS123_SHIFT +#define TMC5130_OFS124_MASK 0x10000000 // MSLUT[3] // microstep table entry 124 +#define TMC5130_OFS124_SHIFT 28 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS124_FIELD TMC5130_OFS124_MASK, TMC5130_OFS124_SHIFT +#define TMC5130_OFS125_MASK 0x20000000 // MSLUT[3] // microstep table entry 125 +#define TMC5130_OFS125_SHIFT 29 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS125_FIELD TMC5130_OFS125_MASK, TMC5130_OFS125_SHIFT +#define TMC5130_OFS126_MASK 0x40000000 // MSLUT[3] // microstep table entry 126 +#define TMC5130_OFS126_SHIFT 30 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS126_FIELD TMC5130_OFS126_MASK, TMC5130_OFS126_SHIFT +#define TMC5130_OFS127_MASK 0x80000000 // MSLUT[3] // microstep table entry 127 +#define TMC5130_OFS127_SHIFT 31 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS127_FIELD TMC5130_OFS127_MASK, TMC5130_OFS127_SHIFT +#define TMC5130_OFS128_MASK 0x01 // MSLUT[4] // microstep table entry 128 +#define TMC5130_OFS128_SHIFT 0 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS128_FIELD TMC5130_OFS128_MASK, TMC5130_OFS128_SHIFT +#define TMC5130_OFS129_MASK 0x02 // MSLUT[4] // microstep table entry 129 +#define TMC5130_OFS129_SHIFT 1 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS129_FIELD TMC5130_OFS129_MASK, TMC5130_OFS129_SHIFT +#define TMC5130_OFS130_MASK 0x04 // MSLUT[4] // microstep table entry 130 +#define TMC5130_OFS130_SHIFT 2 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS130_FIELD TMC5130_OFS130_MASK, TMC5130_OFS130_SHIFT +#define TMC5130_OFS131_MASK 0x08 // MSLUT[4] // microstep table entry 131 +#define TMC5130_OFS131_SHIFT 3 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS131_FIELD TMC5130_OFS131_MASK, TMC5130_OFS131_SHIFT +#define TMC5130_OFS132_MASK 0x10 // MSLUT[4] // microstep table entry 132 +#define TMC5130_OFS132_SHIFT 4 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS132_FIELD TMC5130_OFS132_MASK, TMC5130_OFS132_SHIFT +#define TMC5130_OFS133_MASK 0x20 // MSLUT[4] // microstep table entry 133 +#define TMC5130_OFS133_SHIFT 5 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS133_FIELD TMC5130_OFS133_MASK, TMC5130_OFS133_SHIFT +#define TMC5130_OFS134_MASK 0x40 // MSLUT[4] // microstep table entry 134 +#define TMC5130_OFS134_SHIFT 6 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS134_FIELD TMC5130_OFS134_MASK, TMC5130_OFS134_SHIFT +#define TMC5130_OFS135_MASK 0x80 // MSLUT[4] // microstep table entry 135 +#define TMC5130_OFS135_SHIFT 7 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS135_FIELD TMC5130_OFS135_MASK, TMC5130_OFS135_SHIFT +#define TMC5130_OFS136_MASK 0x0100 // MSLUT[4] // microstep table entry 136 +#define TMC5130_OFS136_SHIFT 8 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS136_FIELD TMC5130_OFS136_MASK, TMC5130_OFS136_SHIFT +#define TMC5130_OFS137_MASK 0x0200 // MSLUT[4] // microstep table entry 137 +#define TMC5130_OFS137_SHIFT 9 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS137_FIELD TMC5130_OFS137_MASK, TMC5130_OFS137_SHIFT +#define TMC5130_OFS138_MASK 0x0400 // MSLUT[4] // microstep table entry 138 +#define TMC5130_OFS138_SHIFT 10 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS138_FIELD TMC5130_OFS138_MASK, TMC5130_OFS138_SHIFT +#define TMC5130_OFS139_MASK 0x0800 // MSLUT[4] // microstep table entry 139 +#define TMC5130_OFS139_SHIFT 11 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS139_FIELD TMC5130_OFS139_MASK, TMC5130_OFS139_SHIFT +#define TMC5130_OFS140_MASK 0x1000 // MSLUT[4] // microstep table entry 140 +#define TMC5130_OFS140_SHIFT 12 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS140_FIELD TMC5130_OFS140_MASK, TMC5130_OFS140_SHIFT +#define TMC5130_OFS141_MASK 0x2000 // MSLUT[4] // microstep table entry 141 +#define TMC5130_OFS141_SHIFT 13 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS141_FIELD TMC5130_OFS141_MASK, TMC5130_OFS141_SHIFT +#define TMC5130_OFS142_MASK 0x4000 // MSLUT[4] // microstep table entry 142 +#define TMC5130_OFS142_SHIFT 14 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS142_FIELD TMC5130_OFS142_MASK, TMC5130_OFS142_SHIFT +#define TMC5130_OFS143_MASK 0x8000 // MSLUT[4] // microstep table entry 143 +#define TMC5130_OFS143_SHIFT 15 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS143_FIELD TMC5130_OFS143_MASK, TMC5130_OFS143_SHIFT +#define TMC5130_OFS144_MASK 0x010000 // MSLUT[4] // microstep table entry 144 +#define TMC5130_OFS144_SHIFT 16 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS144_FIELD TMC5130_OFS144_MASK, TMC5130_OFS144_SHIFT +#define TMC5130_OFS145_MASK 0x020000 // MSLUT[4] // microstep table entry 145 +#define TMC5130_OFS145_SHIFT 17 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS145_FIELD TMC5130_OFS145_MASK, TMC5130_OFS145_SHIFT +#define TMC5130_OFS146_MASK 0x040000 // MSLUT[4] // microstep table entry 146 +#define TMC5130_OFS146_SHIFT 18 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS146_FIELD TMC5130_OFS146_MASK, TMC5130_OFS146_SHIFT +#define TMC5130_OFS147_MASK 0x080000 // MSLUT[4] // microstep table entry 147 +#define TMC5130_OFS147_SHIFT 19 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS147_FIELD TMC5130_OFS147_MASK, TMC5130_OFS147_SHIFT +#define TMC5130_OFS148_MASK 0x100000 // MSLUT[4] // microstep table entry 148 +#define TMC5130_OFS148_SHIFT 20 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS148_FIELD TMC5130_OFS148_MASK, TMC5130_OFS148_SHIFT +#define TMC5130_OFS149_MASK 0x200000 // MSLUT[4] // microstep table entry 149 +#define TMC5130_OFS149_SHIFT 21 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS149_FIELD TMC5130_OFS149_MASK, TMC5130_OFS149_SHIFT +#define TMC5130_OFS150_MASK 0x400000 // MSLUT[4] // microstep table entry 150 +#define TMC5130_OFS150_SHIFT 22 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS150_FIELD TMC5130_OFS150_MASK, TMC5130_OFS150_SHIFT +#define TMC5130_OFS151_MASK 0x800000 // MSLUT[4] // microstep table entry 151 +#define TMC5130_OFS151_SHIFT 23 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS151_FIELD TMC5130_OFS151_MASK, TMC5130_OFS151_SHIFT +#define TMC5130_OFS152_MASK 0x01000000 // MSLUT[4] // microstep table entry 152 +#define TMC5130_OFS152_SHIFT 24 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS152_FIELD TMC5130_OFS152_MASK, TMC5130_OFS152_SHIFT +#define TMC5130_OFS153_MASK 0x02000000 // MSLUT[4] // microstep table entry 153 +#define TMC5130_OFS153_SHIFT 25 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS153_FIELD TMC5130_OFS153_MASK, TMC5130_OFS153_SHIFT +#define TMC5130_OFS154_MASK 0x04000000 // MSLUT[4] // microstep table entry 154 +#define TMC5130_OFS154_SHIFT 26 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS154_FIELD TMC5130_OFS154_MASK, TMC5130_OFS154_SHIFT +#define TMC5130_OFS155_MASK 0x08000000 // MSLUT[4] // microstep table entry 155 +#define TMC5130_OFS155_SHIFT 27 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS155_FIELD TMC5130_OFS155_MASK, TMC5130_OFS155_SHIFT +#define TMC5130_OFS156_MASK 0x10000000 // MSLUT[4] // microstep table entry 156 +#define TMC5130_OFS156_SHIFT 28 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS156_FIELD TMC5130_OFS156_MASK, TMC5130_OFS156_SHIFT +#define TMC5130_OFS157_MASK 0x20000000 // MSLUT[4] // microstep table entry 157 +#define TMC5130_OFS157_SHIFT 29 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS157_FIELD TMC5130_OFS157_MASK, TMC5130_OFS157_SHIFT +#define TMC5130_OFS158_MASK 0x40000000 // MSLUT[4] // microstep table entry 158 +#define TMC5130_OFS158_SHIFT 30 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS158_FIELD TMC5130_OFS158_MASK, TMC5130_OFS158_SHIFT +#define TMC5130_OFS159_MASK 0x80000000 // MSLUT[4] // microstep table entry 159 +#define TMC5130_OFS159_SHIFT 31 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS159_FIELD TMC5130_OFS159_MASK, TMC5130_OFS159_SHIFT +#define TMC5130_OFS160_MASK 0x01 // MSLUT[5] // microstep table entry 160 +#define TMC5130_OFS160_SHIFT 0 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS160_FIELD TMC5130_OFS160_MASK, TMC5130_OFS160_SHIFT +#define TMC5130_OFS161_MASK 0x02 // MSLUT[5] // microstep table entry 161 +#define TMC5130_OFS161_SHIFT 1 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS161_FIELD TMC5130_OFS161_MASK, TMC5130_OFS161_SHIFT +#define TMC5130_OFS162_MASK 0x04 // MSLUT[5] // microstep table entry 162 +#define TMC5130_OFS162_SHIFT 2 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS162_FIELD TMC5130_OFS162_MASK, TMC5130_OFS162_SHIFT +#define TMC5130_OFS163_MASK 0x08 // MSLUT[5] // microstep table entry 163 +#define TMC5130_OFS163_SHIFT 3 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS163_FIELD TMC5130_OFS163_MASK, TMC5130_OFS163_SHIFT +#define TMC5130_OFS164_MASK 0x10 // MSLUT[5] // microstep table entry 164 +#define TMC5130_OFS164_SHIFT 4 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS164_FIELD TMC5130_OFS164_MASK, TMC5130_OFS164_SHIFT +#define TMC5130_OFS165_MASK 0x20 // MSLUT[5] // microstep table entry 165 +#define TMC5130_OFS165_SHIFT 5 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS165_FIELD TMC5130_OFS165_MASK, TMC5130_OFS165_SHIFT +#define TMC5130_OFS166_MASK 0x40 // MSLUT[5] // microstep table entry 166 +#define TMC5130_OFS166_SHIFT 6 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS166_FIELD TMC5130_OFS166_MASK, TMC5130_OFS166_SHIFT +#define TMC5130_OFS167_MASK 0x80 // MSLUT[5] // microstep table entry 167 +#define TMC5130_OFS167_SHIFT 7 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS167_FIELD TMC5130_OFS167_MASK, TMC5130_OFS167_SHIFT +#define TMC5130_OFS168_MASK 0x0100 // MSLUT[5] // microstep table entry 168 +#define TMC5130_OFS168_SHIFT 8 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS168_FIELD TMC5130_OFS168_MASK, TMC5130_OFS168_SHIFT +#define TMC5130_OFS169_MASK 0x0200 // MSLUT[5] // microstep table entry 169 +#define TMC5130_OFS169_SHIFT 9 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS169_FIELD TMC5130_OFS169_MASK, TMC5130_OFS169_SHIFT +#define TMC5130_OFS170_MASK 0x0400 // MSLUT[5] // microstep table entry 170 +#define TMC5130_OFS170_SHIFT 10 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS170_FIELD TMC5130_OFS170_MASK, TMC5130_OFS170_SHIFT +#define TMC5130_OFS171_MASK 0x0800 // MSLUT[5] // microstep table entry 171 +#define TMC5130_OFS171_SHIFT 11 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS171_FIELD TMC5130_OFS171_MASK, TMC5130_OFS171_SHIFT +#define TMC5130_OFS172_MASK 0x1000 // MSLUT[5] // microstep table entry 172 +#define TMC5130_OFS172_SHIFT 12 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS172_FIELD TMC5130_OFS172_MASK, TMC5130_OFS172_SHIFT +#define TMC5130_OFS173_MASK 0x2000 // MSLUT[5] // microstep table entry 173 +#define TMC5130_OFS173_SHIFT 13 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS173_FIELD TMC5130_OFS173_MASK, TMC5130_OFS173_SHIFT +#define TMC5130_OFS174_MASK 0x4000 // MSLUT[5] // microstep table entry 174 +#define TMC5130_OFS174_SHIFT 14 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS174_FIELD TMC5130_OFS174_MASK, TMC5130_OFS174_SHIFT +#define TMC5130_OFS175_MASK 0x8000 // MSLUT[5] // microstep table entry 175 +#define TMC5130_OFS175_SHIFT 15 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS175_FIELD TMC5130_OFS175_MASK, TMC5130_OFS175_SHIFT +#define TMC5130_OFS176_MASK 0x010000 // MSLUT[5] // microstep table entry 176 +#define TMC5130_OFS176_SHIFT 16 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS176_FIELD TMC5130_OFS176_MASK, TMC5130_OFS176_SHIFT +#define TMC5130_OFS177_MASK 0x020000 // MSLUT[5] // microstep table entry 177 +#define TMC5130_OFS177_SHIFT 17 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS177_FIELD TMC5130_OFS177_MASK, TMC5130_OFS177_SHIFT +#define TMC5130_OFS178_MASK 0x040000 // MSLUT[5] // microstep table entry 178 +#define TMC5130_OFS178_SHIFT 18 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS178_FIELD TMC5130_OFS178_MASK, TMC5130_OFS178_SHIFT +#define TMC5130_OFS179_MASK 0x080000 // MSLUT[5] // microstep table entry 179 +#define TMC5130_OFS179_SHIFT 19 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS179_FIELD TMC5130_OFS179_MASK, TMC5130_OFS179_SHIFT +#define TMC5130_OFS180_MASK 0x100000 // MSLUT[5] // microstep table entry 180 +#define TMC5130_OFS180_SHIFT 20 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS180_FIELD TMC5130_OFS180_MASK, TMC5130_OFS180_SHIFT +#define TMC5130_OFS181_MASK 0x200000 // MSLUT[5] // microstep table entry 181 +#define TMC5130_OFS181_SHIFT 21 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS181_FIELD TMC5130_OFS181_MASK, TMC5130_OFS181_SHIFT +#define TMC5130_OFS182_MASK 0x400000 // MSLUT[5] // microstep table entry 182 +#define TMC5130_OFS182_SHIFT 22 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS182_FIELD TMC5130_OFS182_MASK, TMC5130_OFS182_SHIFT +#define TMC5130_OFS183_MASK 0x800000 // MSLUT[5] // microstep table entry 183 +#define TMC5130_OFS183_SHIFT 23 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS183_FIELD TMC5130_OFS183_MASK, TMC5130_OFS183_SHIFT +#define TMC5130_OFS184_MASK 0x01000000 // MSLUT[5] // microstep table entry 184 +#define TMC5130_OFS184_SHIFT 24 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS184_FIELD TMC5130_OFS184_MASK, TMC5130_OFS184_SHIFT +#define TMC5130_OFS185_MASK 0x02000000 // MSLUT[5] // microstep table entry 185 +#define TMC5130_OFS185_SHIFT 25 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS185_FIELD TMC5130_OFS185_MASK, TMC5130_OFS185_SHIFT +#define TMC5130_OFS186_MASK 0x04000000 // MSLUT[5] // microstep table entry 186 +#define TMC5130_OFS186_SHIFT 26 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS186_FIELD TMC5130_OFS186_MASK, TMC5130_OFS186_SHIFT +#define TMC5130_OFS187_MASK 0x08000000 // MSLUT[5] // microstep table entry 187 +#define TMC5130_OFS187_SHIFT 27 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS187_FIELD TMC5130_OFS187_MASK, TMC5130_OFS187_SHIFT +#define TMC5130_OFS188_MASK 0x10000000 // MSLUT[5] // microstep table entry 188 +#define TMC5130_OFS188_SHIFT 28 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS188_FIELD TMC5130_OFS188_MASK, TMC5130_OFS188_SHIFT +#define TMC5130_OFS189_MASK 0x20000000 // MSLUT[5] // microstep table entry 189 +#define TMC5130_OFS189_SHIFT 29 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS189_FIELD TMC5130_OFS189_MASK, TMC5130_OFS189_SHIFT +#define TMC5130_OFS190_MASK 0x40000000 // MSLUT[5] // microstep table entry 190 +#define TMC5130_OFS190_SHIFT 30 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS190_FIELD TMC5130_OFS190_MASK, TMC5130_OFS190_SHIFT +#define TMC5130_OFS191_MASK 0x80000000 // MSLUT[5] // microstep table entry 191 +#define TMC5130_OFS191_SHIFT 31 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS191_FIELD TMC5130_OFS191_MASK, TMC5130_OFS191_SHIFT +#define TMC5130_OFS192_MASK 0x01 // MSLUT[6] // microstep table entry 192 +#define TMC5130_OFS192_SHIFT 0 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS192_FIELD TMC5130_OFS192_MASK, TMC5130_OFS192_SHIFT +#define TMC5130_OFS193_MASK 0x02 // MSLUT[6] // microstep table entry 193 +#define TMC5130_OFS193_SHIFT 1 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS193_FIELD TMC5130_OFS193_MASK, TMC5130_OFS193_SHIFT +#define TMC5130_OFS194_MASK 0x04 // MSLUT[6] // microstep table entry 194 +#define TMC5130_OFS194_SHIFT 2 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS194_FIELD TMC5130_OFS194_MASK, TMC5130_OFS194_SHIFT +#define TMC5130_OFS195_MASK 0x08 // MSLUT[6] // microstep table entry 195 +#define TMC5130_OFS195_SHIFT 3 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS195_FIELD TMC5130_OFS195_MASK, TMC5130_OFS195_SHIFT +#define TMC5130_OFS196_MASK 0x10 // MSLUT[6] // microstep table entry 196 +#define TMC5130_OFS196_SHIFT 4 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS196_FIELD TMC5130_OFS196_MASK, TMC5130_OFS196_SHIFT +#define TMC5130_OFS197_MASK 0x20 // MSLUT[6] // microstep table entry 197 +#define TMC5130_OFS197_SHIFT 5 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS197_FIELD TMC5130_OFS197_MASK, TMC5130_OFS197_SHIFT +#define TMC5130_OFS198_MASK 0x40 // MSLUT[6] // microstep table entry 198 +#define TMC5130_OFS198_SHIFT 6 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS198_FIELD TMC5130_OFS198_MASK, TMC5130_OFS198_SHIFT +#define TMC5130_OFS199_MASK 0x80 // MSLUT[6] // microstep table entry 199 +#define TMC5130_OFS199_SHIFT 7 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS199_FIELD TMC5130_OFS199_MASK, TMC5130_OFS199_SHIFT +#define TMC5130_OFS200_MASK 0x0100 // MSLUT[6] // microstep table entry 200 +#define TMC5130_OFS200_SHIFT 8 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS200_FIELD TMC5130_OFS200_MASK, TMC5130_OFS200_SHIFT +#define TMC5130_OFS201_MASK 0x0200 // MSLUT[6] // microstep table entry 201 +#define TMC5130_OFS201_SHIFT 9 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS201_FIELD TMC5130_OFS201_MASK, TMC5130_OFS201_SHIFT +#define TMC5130_OFS202_MASK 0x0400 // MSLUT[6] // microstep table entry 202 +#define TMC5130_OFS202_SHIFT 10 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS202_FIELD TMC5130_OFS202_MASK, TMC5130_OFS202_SHIFT +#define TMC5130_OFS203_MASK 0x0800 // MSLUT[6] // microstep table entry 203 +#define TMC5130_OFS203_SHIFT 11 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS203_FIELD TMC5130_OFS203_MASK, TMC5130_OFS203_SHIFT +#define TMC5130_OFS204_MASK 0x1000 // MSLUT[6] // microstep table entry 204 +#define TMC5130_OFS204_SHIFT 12 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS204_FIELD TMC5130_OFS204_MASK, TMC5130_OFS204_SHIFT +#define TMC5130_OFS205_MASK 0x2000 // MSLUT[6] // microstep table entry 205 +#define TMC5130_OFS205_SHIFT 13 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS205_FIELD TMC5130_OFS205_MASK, TMC5130_OFS205_SHIFT +#define TMC5130_OFS206_MASK 0x4000 // MSLUT[6] // microstep table entry 206 +#define TMC5130_OFS206_SHIFT 14 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS206_FIELD TMC5130_OFS206_MASK, TMC5130_OFS206_SHIFT +#define TMC5130_OFS207_MASK 0x8000 // MSLUT[6] // microstep table entry 207 +#define TMC5130_OFS207_SHIFT 15 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS207_FIELD TMC5130_OFS207_MASK, TMC5130_OFS207_SHIFT +#define TMC5130_OFS208_MASK 0x010000 // MSLUT[6] // microstep table entry 208 +#define TMC5130_OFS208_SHIFT 16 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS208_FIELD TMC5130_OFS208_MASK, TMC5130_OFS208_SHIFT +#define TMC5130_OFS209_MASK 0x020000 // MSLUT[6] // microstep table entry 209 +#define TMC5130_OFS209_SHIFT 17 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS209_FIELD TMC5130_OFS209_MASK, TMC5130_OFS209_SHIFT +#define TMC5130_OFS210_MASK 0x040000 // MSLUT[6] // microstep table entry 210 +#define TMC5130_OFS210_SHIFT 18 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS210_FIELD TMC5130_OFS210_MASK, TMC5130_OFS210_SHIFT +#define TMC5130_OFS211_MASK 0x080000 // MSLUT[6] // microstep table entry 211 +#define TMC5130_OFS211_SHIFT 19 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS211_FIELD TMC5130_OFS211_MASK, TMC5130_OFS211_SHIFT +#define TMC5130_OFS212_MASK 0x100000 // MSLUT[6] // microstep table entry 212 +#define TMC5130_OFS212_SHIFT 20 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS212_FIELD TMC5130_OFS212_MASK, TMC5130_OFS212_SHIFT +#define TMC5130_OFS213_MASK 0x200000 // MSLUT[6] // microstep table entry 213 +#define TMC5130_OFS213_SHIFT 21 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS213_FIELD TMC5130_OFS213_MASK, TMC5130_OFS213_SHIFT +#define TMC5130_OFS214_MASK 0x400000 // MSLUT[6] // microstep table entry 214 +#define TMC5130_OFS214_SHIFT 22 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS214_FIELD TMC5130_OFS214_MASK, TMC5130_OFS214_SHIFT +#define TMC5130_OFS215_MASK 0x800000 // MSLUT[6] // microstep table entry 215 +#define TMC5130_OFS215_SHIFT 23 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS215_FIELD TMC5130_OFS215_MASK, TMC5130_OFS215_SHIFT +#define TMC5130_OFS216_MASK 0x01000000 // MSLUT[6] // microstep table entry 216 +#define TMC5130_OFS216_SHIFT 24 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS216_FIELD TMC5130_OFS216_MASK, TMC5130_OFS216_SHIFT +#define TMC5130_OFS217_MASK 0x02000000 // MSLUT[6] // microstep table entry 217 +#define TMC5130_OFS217_SHIFT 25 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS217_FIELD TMC5130_OFS217_MASK, TMC5130_OFS217_SHIFT +#define TMC5130_OFS218_MASK 0x04000000 // MSLUT[6] // microstep table entry 218 +#define TMC5130_OFS218_SHIFT 26 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS218_FIELD TMC5130_OFS218_MASK, TMC5130_OFS218_SHIFT +#define TMC5130_OFS219_MASK 0x08000000 // MSLUT[6] // microstep table entry 219 +#define TMC5130_OFS219_SHIFT 27 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS219_FIELD TMC5130_OFS219_MASK, TMC5130_OFS219_SHIFT +#define TMC5130_OFS220_MASK 0x10000000 // MSLUT[6] // microstep table entry 220 +#define TMC5130_OFS220_SHIFT 28 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS220_FIELD TMC5130_OFS220_MASK, TMC5130_OFS220_SHIFT +#define TMC5130_OFS221_MASK 0x20000000 // MSLUT[6] // microstep table entry 221 +#define TMC5130_OFS221_SHIFT 29 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS221_FIELD TMC5130_OFS221_MASK, TMC5130_OFS221_SHIFT +#define TMC5130_OFS222_MASK 0x40000000 // MSLUT[6] // microstep table entry 222 +#define TMC5130_OFS222_SHIFT 30 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS222_FIELD TMC5130_OFS222_MASK, TMC5130_OFS222_SHIFT +#define TMC5130_OFS223_MASK 0x80000000 // MSLUT[6] // microstep table entry 223 +#define TMC5130_OFS223_SHIFT 31 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS223_FIELD TMC5130_OFS223_MASK, TMC5130_OFS223_SHIFT +#define TMC5130_OFS224_MASK 0x01 // MSLUT[7] // microstep table entry 224 +#define TMC5130_OFS224_SHIFT 0 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS224_FIELD TMC5130_OFS224_MASK, TMC5130_OFS224_SHIFT +#define TMC5130_OFS225_MASK 0x02 // MSLUT[7] // microstep table entry 225 +#define TMC5130_OFS225_SHIFT 1 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS225_FIELD TMC5130_OFS225_MASK, TMC5130_OFS225_SHIFT +#define TMC5130_OFS226_MASK 0x04 // MSLUT[7] // microstep table entry 226 +#define TMC5130_OFS226_SHIFT 2 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS226_FIELD TMC5130_OFS226_MASK, TMC5130_OFS226_SHIFT +#define TMC5130_OFS227_MASK 0x08 // MSLUT[7] // microstep table entry 227 +#define TMC5130_OFS227_SHIFT 3 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS227_FIELD TMC5130_OFS227_MASK, TMC5130_OFS227_SHIFT +#define TMC5130_OFS228_MASK 0x10 // MSLUT[7] // microstep table entry 228 +#define TMC5130_OFS228_SHIFT 4 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS228_FIELD TMC5130_OFS228_MASK, TMC5130_OFS228_SHIFT +#define TMC5130_OFS229_MASK 0x20 // MSLUT[7] // microstep table entry 229 +#define TMC5130_OFS229_SHIFT 5 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS229_FIELD TMC5130_OFS229_MASK, TMC5130_OFS229_SHIFT +#define TMC5130_OFS230_MASK 0x40 // MSLUT[7] // microstep table entry 230 +#define TMC5130_OFS230_SHIFT 6 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS230_FIELD TMC5130_OFS230_MASK, TMC5130_OFS230_SHIFT +#define TMC5130_OFS231_MASK 0x80 // MSLUT[7] // microstep table entry 231 +#define TMC5130_OFS231_SHIFT 7 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS231_FIELD TMC5130_OFS231_MASK, TMC5130_OFS231_SHIFT +#define TMC5130_OFS232_MASK 0x0100 // MSLUT[7] // microstep table entry 232 +#define TMC5130_OFS232_SHIFT 8 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS232_FIELD TMC5130_OFS232_MASK, TMC5130_OFS232_SHIFT +#define TMC5130_OFS233_MASK 0x0200 // MSLUT[7] // microstep table entry 233 +#define TMC5130_OFS233_SHIFT 9 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS233_FIELD TMC5130_OFS233_MASK, TMC5130_OFS233_SHIFT +#define TMC5130_OFS234_MASK 0x0400 // MSLUT[7] // microstep table entry 234 +#define TMC5130_OFS234_SHIFT 10 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS234_FIELD TMC5130_OFS234_MASK, TMC5130_OFS234_SHIFT +#define TMC5130_OFS235_MASK 0x0800 // MSLUT[7] // microstep table entry 235 +#define TMC5130_OFS235_SHIFT 11 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS235_FIELD TMC5130_OFS235_MASK, TMC5130_OFS235_SHIFT +#define TMC5130_OFS236_MASK 0x1000 // MSLUT[7] // microstep table entry 236 +#define TMC5130_OFS236_SHIFT 12 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS236_FIELD TMC5130_OFS236_MASK, TMC5130_OFS236_SHIFT +#define TMC5130_OFS237_MASK 0x2000 // MSLUT[7] // microstep table entry 237 +#define TMC5130_OFS237_SHIFT 13 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS237_FIELD TMC5130_OFS237_MASK, TMC5130_OFS237_SHIFT +#define TMC5130_OFS238_MASK 0x4000 // MSLUT[7] // microstep table entry 238 +#define TMC5130_OFS238_SHIFT 14 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS238_FIELD TMC5130_OFS238_MASK, TMC5130_OFS238_SHIFT +#define TMC5130_OFS239_MASK 0x8000 // MSLUT[7] // microstep table entry 239 +#define TMC5130_OFS239_SHIFT 15 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS239_FIELD TMC5130_OFS239_MASK, TMC5130_OFS239_SHIFT +#define TMC5130_OFS240_MASK 0x010000 // MSLUT[7] // microstep table entry 240 +#define TMC5130_OFS240_SHIFT 16 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS240_FIELD TMC5130_OFS240_MASK, TMC5130_OFS240_SHIFT +#define TMC5130_OFS241_MASK 0x020000 // MSLUT[7] // microstep table entry 241 +#define TMC5130_OFS241_SHIFT 17 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS241_FIELD TMC5130_OFS241_MASK, TMC5130_OFS241_SHIFT +#define TMC5130_OFS242_MASK 0x040000 // MSLUT[7] // microstep table entry 242 +#define TMC5130_OFS242_SHIFT 18 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS242_FIELD TMC5130_OFS242_MASK, TMC5130_OFS242_SHIFT +#define TMC5130_OFS243_MASK 0x080000 // MSLUT[7] // microstep table entry 243 +#define TMC5130_OFS243_SHIFT 19 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS243_FIELD TMC5130_OFS243_MASK, TMC5130_OFS243_SHIFT +#define TMC5130_OFS244_MASK 0x100000 // MSLUT[7] // microstep table entry 244 +#define TMC5130_OFS244_SHIFT 20 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS244_FIELD TMC5130_OFS244_MASK, TMC5130_OFS244_SHIFT +#define TMC5130_OFS245_MASK 0x200000 // MSLUT[7] // microstep table entry 245 +#define TMC5130_OFS245_SHIFT 21 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS245_FIELD TMC5130_OFS245_MASK, TMC5130_OFS245_SHIFT +#define TMC5130_OFS246_MASK 0x400000 // MSLUT[7] // microstep table entry 246 +#define TMC5130_OFS246_SHIFT 22 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS246_FIELD TMC5130_OFS246_MASK, TMC5130_OFS246_SHIFT +#define TMC5130_OFS247_MASK 0x800000 // MSLUT[7] // microstep table entry 247 +#define TMC5130_OFS247_SHIFT 23 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS247_FIELD TMC5130_OFS247_MASK, TMC5130_OFS247_SHIFT +#define TMC5130_OFS248_MASK 0x01000000 // MSLUT[7] // microstep table entry 248 +#define TMC5130_OFS248_SHIFT 24 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS248_FIELD TMC5130_OFS248_MASK, TMC5130_OFS248_SHIFT +#define TMC5130_OFS249_MASK 0x02000000 // MSLUT[7] // microstep table entry 249 +#define TMC5130_OFS249_SHIFT 25 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS249_FIELD TMC5130_OFS249_MASK, TMC5130_OFS249_SHIFT +#define TMC5130_OFS250_MASK 0x04000000 // MSLUT[7] // microstep table entry 250 +#define TMC5130_OFS250_SHIFT 26 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS250_FIELD TMC5130_OFS250_MASK, TMC5130_OFS250_SHIFT +#define TMC5130_OFS251_MASK 0x08000000 // MSLUT[7] // microstep table entry 251 +#define TMC5130_OFS251_SHIFT 27 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS251_FIELD TMC5130_OFS251_MASK, TMC5130_OFS251_SHIFT +#define TMC5130_OFS252_MASK 0x10000000 // MSLUT[7] // microstep table entry 252 +#define TMC5130_OFS252_SHIFT 28 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS252_FIELD TMC5130_OFS252_MASK, TMC5130_OFS252_SHIFT +#define TMC5130_OFS253_MASK 0x20000000 // MSLUT[7] // microstep table entry 253 +#define TMC5130_OFS253_SHIFT 29 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS253_FIELD TMC5130_OFS253_MASK, TMC5130_OFS253_SHIFT +#define TMC5130_OFS254_MASK 0x40000000 // MSLUT[7] // microstep table entry 254 +#define TMC5130_OFS254_SHIFT 30 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS254_FIELD TMC5130_OFS254_MASK, TMC5130_OFS254_SHIFT +#define TMC5130_OFS255_MASK 0x80000000 // MSLUT[7] // microstep table entry 255 +#define TMC5130_OFS255_SHIFT 31 // min.: 0, max.: 1, default: 0 +#define TMC5130_OFS255_FIELD TMC5130_OFS255_MASK, TMC5130_OFS255_SHIFT +#define TMC5130_W0_MASK 0x03 // MSLUTSEL // LUT width select from ofs0 to ofs(X1-1) +#define TMC5130_W0_SHIFT 0 // min.: 0, max.: 3, default: 0 +#define TMC5130_W0_FIELD TMC5130_W0_MASK, TMC5130_W0_SHIFT +#define TMC5130_W1_MASK 0x0C // MSLUTSEL // LUT width select from ofs(X1) to ofs(X2-1) +#define TMC5130_W1_SHIFT 2 // min.: 0, max.: 3, default: 0 +#define TMC5130_W1_FIELD TMC5130_W1_MASK, TMC5130_W1_SHIFT +#define TMC5130_W2_MASK 0x30 // MSLUTSEL // LUT width select from ofs(X2) to ofs(X3-1) +#define TMC5130_W2_SHIFT 4 // min.: 0, max.: 3, default: 0 +#define TMC5130_W2_FIELD TMC5130_W2_MASK, TMC5130_W2_SHIFT +#define TMC5130_W3_MASK 0xC0 // MSLUTSEL // LUT width select from ofs(X3) to ofs255 +#define TMC5130_W3_SHIFT 6 // min.: 0, max.: 3, default: 0 +#define TMC5130_W3_FIELD TMC5130_W3_MASK, TMC5130_W3_SHIFT +#define TMC5130_X1_MASK 0xFF00 // MSLUTSEL // LUT segment 1 start +#define TMC5130_X1_SHIFT 8 // min.: 0, max.: 255, default: 0 +#define TMC5130_X1_FIELD TMC5130_X1_MASK, TMC5130_X1_SHIFT +#define TMC5130_X2_MASK 0xFF0000 // MSLUTSEL // LUT segment 2 start +#define TMC5130_X2_SHIFT 16 // min.: 0, max.: 255, default: 0 +#define TMC5130_X2_FIELD TMC5130_X2_MASK, TMC5130_X2_SHIFT +#define TMC5130_X3_MASK 0xFF000000 // MSLUTSEL // LUT segment 3 start +#define TMC5130_X3_SHIFT 24 // min.: 0, max.: 255, default: 0 +#define TMC5130_X3_FIELD TMC5130_X3_MASK, TMC5130_X3_SHIFT +#define TMC5130_START_SIN_MASK 0xFF // MSLUTSTART // Absolute current at microstep table entry 0. +#define TMC5130_START_SIN_SHIFT 0 // min.: 0, max.: 255, default: 0 +#define TMC5130_START_SIN_FIELD TMC5130_START_SIN_MASK, TMC5130_START_SIN_SHIFT +#define TMC5130_START_SIN90_MASK 0xFF0000 // MSLUTSTART // Absolute current for microstep table entry at positions 256. +#define TMC5130_START_SIN90_SHIFT 16 // min.: 0, max.: 255, default: 0 +#define TMC5130_START_SIN90_FIELD TMC5130_START_SIN90_MASK, TMC5130_START_SIN90_SHIFT +#define TMC5130_MSCNT_MASK 0x03FF // MSCNT // Microstep counter. Indicates actual position in the microstep table for CUR_A. CUR_B uses an offset of 256 (2 phase motor). Hint: Move to a position where MSCNT is zero before re-initializing MSLUTSTART or MSLUT and MSLUTSEL. +#define TMC5130_MSCNT_SHIFT 0 // min.: 0, max.: 1023, default: 0 +#define TMC5130_MSCNT_FIELD TMC5130_MSCNT_MASK, TMC5130_MSCNT_SHIFT +#define TMC5130_CUR_A_MASK 0x01FF // MSCURACT // Actual microstep current for motor phase A as read from MSLUT (not scaled by current) +#define TMC5130_CUR_A_SHIFT 0 // min.: -256, max.: 255, default: 0 +#define TMC5130_CUR_A_FIELD TMC5130_CUR_A_MASK, TMC5130_CUR_A_SHIFT +#define TMC5130_CUR_B_MASK 0x01FF0000 // MSCURACT // Actual microstep current for motor phase B as read from MSLUT (not scaled by current) +#define TMC5130_CUR_B_SHIFT 16 // min.: -256, max.: 255, default: 0 +#define TMC5130_CUR_B_FIELD TMC5130_CUR_B_MASK, TMC5130_CUR_B_SHIFT +#define TMC5130_TOFF_MASK 0x0F // CHOPCONF // off time and driver enable +#define TMC5130_TOFF_SHIFT 0 // min.: 0, max.: 15, default: 0 +#define TMC5130_TOFF_FIELD TMC5130_TOFF_MASK, TMC5130_TOFF_SHIFT +#define TMC5130_TFD_ALL_MASK 0x70 // CHOPCONF // fast decay time setting +#define TMC5130_TFD_ALL_SHIFT 4 // min.: 0, max.: 7, default: 0 +#define TMC5130_TFD_ALL_FIELD TMC5130_TFD_ALL_MASK, TMC5130_TFD_ALL_SHIFT +#define TMC5130_OFFSET_MASK 0x0780 // CHOPCONF // sine wave offset +#define TMC5130_OFFSET_SHIFT 7 // min.: 0, max.: 15, default: 0 +#define TMC5130_OFFSET_FIELD TMC5130_OFFSET_MASK, TMC5130_OFFSET_SHIFT +#define TMC5130_TFD_3_MASK 0x0800 // CHOPCONF // MSB of fast decay time setting +#define TMC5130_TFD_3_SHIFT 11 // min.: 0, max.: 1, default: 0 +#define TMC5130_TFD_3_FIELD TMC5130_TFD_3_MASK, TMC5130_TFD_3_SHIFT +#define TMC5130_DISFDCC_MASK 0x1000 // CHOPCONF // fast decay mode +#define TMC5130_DISFDCC_SHIFT 12 // min.: 0, max.: 1, default: 0 +#define TMC5130_DISFDCC_FIELD TMC5130_DISFDCC_MASK, TMC5130_DISFDCC_SHIFT +#define TMC5130_RNDTF_MASK 0x2000 // CHOPCONF // random TOFF time +#define TMC5130_RNDTF_SHIFT 13 // min.: 0, max.: 1, default: 0 +#define TMC5130_RNDTF_FIELD TMC5130_RNDTF_MASK, TMC5130_RNDTF_SHIFT +#define TMC5130_CHM_MASK 0x4000 // CHOPCONF // chopper mode +#define TMC5130_CHM_SHIFT 14 // min.: 0, max.: 1, default: 0 +#define TMC5130_CHM_FIELD TMC5130_CHM_MASK, TMC5130_CHM_SHIFT +#define TMC5130_TBL_MASK 0x018000 // CHOPCONF // blank time select +#define TMC5130_TBL_SHIFT 15 // min.: 0, max.: 3, default: 0 +#define TMC5130_TBL_FIELD TMC5130_TBL_MASK, TMC5130_TBL_SHIFT +#define TMC5130_VSENSE_MASK 0x020000 // CHOPCONF // sense resistor voltage based current scaling +#define TMC5130_VSENSE_SHIFT 17 // min.: 0, max.: 1, default: 0 +#define TMC5130_VSENSE_FIELD TMC5130_VSENSE_MASK, TMC5130_VSENSE_SHIFT +#define TMC5130_VHIGHFS_MASK 0x040000 // CHOPCONF // high velocity fullstep selection +#define TMC5130_VHIGHFS_SHIFT 18 // min.: 0, max.: 1, default: 0 +#define TMC5130_VHIGHFS_FIELD TMC5130_VHIGHFS_MASK, TMC5130_VHIGHFS_SHIFT +#define TMC5130_VHIGHCHM_MASK 0x080000 // CHOPCONF // high velocity chopper mode +#define TMC5130_VHIGHCHM_SHIFT 19 // min.: 0, max.: 1, default: 0 +#define TMC5130_VHIGHCHM_FIELD TMC5130_VHIGHCHM_MASK, TMC5130_VHIGHCHM_SHIFT +#define TMC5130_SYNC_MASK 0xF00000 // CHOPCONF // PWM synchronization clock +#define TMC5130_SYNC_SHIFT 20 // min.: 0, max.: 15, default: 0 +#define TMC5130_SYNC_FIELD TMC5130_SYNC_MASK, TMC5130_SYNC_SHIFT +#define TMC5130_MRES_MASK 0x0F000000 // CHOPCONF // Micro step resolution; The resolution gives the number of microstep entries per sine quarter wave. The driver automatically uses microstep positions which result in a symmetrical wave, when choosing a lower microstep resolution. +#define TMC5130_MRES_SHIFT 24 // min.: 0, max.: 8, default: 0 +#define TMC5130_MRES_FIELD TMC5130_MRES_MASK, TMC5130_MRES_SHIFT +#define TMC5130_INTPOL_MASK 0x10000000 // CHOPCONF // interpolation to 256 microsteps +#define TMC5130_INTPOL_SHIFT 28 // min.: 0, max.: 1, default: 0 +#define TMC5130_INTPOL_FIELD TMC5130_INTPOL_MASK, TMC5130_INTPOL_SHIFT +#define TMC5130_DEDGE_MASK 0x20000000 // CHOPCONF // enable double edge step pulses +#define TMC5130_DEDGE_SHIFT 29 // min.: 0, max.: 1, default: 0 +#define TMC5130_DEDGE_FIELD TMC5130_DEDGE_MASK, TMC5130_DEDGE_SHIFT +#define TMC5130_DISS2G_MASK 0x40000000 // CHOPCONF // short to GND protection disable +#define TMC5130_DISS2G_SHIFT 30 // min.: 0, max.: 1, default: 0 +#define TMC5130_DISS2G_FIELD TMC5130_DISS2G_MASK, TMC5130_DISS2G_SHIFT +#define TMC5130_TOFF_MASK 0x0F // CHOPCONF // off time and driver enable +#define TMC5130_TOFF_SHIFT 0 // min.: 0, max.: 15, default: 0 +#define TMC5130_TOFF_FIELD TMC5130_TOFF_MASK, TMC5130_TOFF_SHIFT +#define TMC5130_TFD_ALL_MASK 0x70 // CHOPCONF // fast decay time setting +#define TMC5130_TFD_ALL_SHIFT 4 // min.: 0, max.: 7, default: 0 +#define TMC5130_TFD_ALL_FIELD TMC5130_TFD_ALL_MASK, TMC5130_TFD_ALL_SHIFT +#define TMC5130_OFFSET_MASK 0x0780 // CHOPCONF // sine wave offset +#define TMC5130_OFFSET_SHIFT 7 // min.: 0, max.: 15, default: 0 +#define TMC5130_OFFSET_FIELD TMC5130_OFFSET_MASK, TMC5130_OFFSET_SHIFT +#define TMC5130_TFD_3_MASK 0x0800 // CHOPCONF // MSB of fast decay time setting +#define TMC5130_TFD_3_SHIFT 11 // min.: 0, max.: 1, default: 0 +#define TMC5130_TFD_3_FIELD TMC5130_TFD_3_MASK, TMC5130_TFD_3_SHIFT +#define TMC5130_DISFDCC_MASK 0x1000 // CHOPCONF // fast decay mode +#define TMC5130_DISFDCC_SHIFT 12 // min.: 0, max.: 1, default: 0 +#define TMC5130_DISFDCC_FIELD TMC5130_DISFDCC_MASK, TMC5130_DISFDCC_SHIFT +#define TMC5130_RNDTF_MASK 0x2000 // CHOPCONF // random TOFF time +#define TMC5130_RNDTF_SHIFT 13 // min.: 0, max.: 1, default: 0 +#define TMC5130_RNDTF_FIELD TMC5130_RNDTF_MASK, TMC5130_RNDTF_SHIFT +#define TMC5130_CHM_MASK 0x4000 // CHOPCONF // chopper mode +#define TMC5130_CHM_SHIFT 14 // min.: 0, max.: 1, default: 0 +#define TMC5130_CHM_FIELD TMC5130_CHM_MASK, TMC5130_CHM_SHIFT +#define TMC5130_TBL_MASK 0x018000 // CHOPCONF // blank time select +#define TMC5130_TBL_SHIFT 15 // min.: 0, max.: 3, default: 0 +#define TMC5130_TBL_FIELD TMC5130_TBL_MASK, TMC5130_TBL_SHIFT +#define TMC5130_VSENSE_MASK 0x020000 // CHOPCONF // sense resistor voltage based current scaling +#define TMC5130_VSENSE_SHIFT 17 // min.: 0, max.: 1, default: 0 +#define TMC5130_VSENSE_FIELD TMC5130_VSENSE_MASK, TMC5130_VSENSE_SHIFT +#define TMC5130_VHIGHFS_MASK 0x040000 // CHOPCONF // high velocity fullstep selection +#define TMC5130_VHIGHFS_SHIFT 18 // min.: 0, max.: 1, default: 0 +#define TMC5130_VHIGHFS_FIELD TMC5130_VHIGHFS_MASK, TMC5130_VHIGHFS_SHIFT +#define TMC5130_VHIGHCHM_MASK 0x080000 // CHOPCONF // high velocity chopper mode +#define TMC5130_VHIGHCHM_SHIFT 19 // min.: 0, max.: 1, default: 0 +#define TMC5130_VHIGHCHM_FIELD TMC5130_VHIGHCHM_MASK, TMC5130_VHIGHCHM_SHIFT +#define TMC5130_SYNC_MASK 0xF00000 // CHOPCONF // PWM synchronization clock +#define TMC5130_SYNC_SHIFT 20 // min.: 0, max.: 15, default: 0 +#define TMC5130_SYNC_FIELD TMC5130_SYNC_MASK, TMC5130_SYNC_SHIFT +#define TMC5130_MRES_MASK 0x0F000000 // CHOPCONF // Micro step resolution; The resolution gives the number of microstep entries per sine quarter wave. The driver automatically uses microstep positions which result in a symmetrical wave, when choosing a lower microstep resolution. +#define TMC5130_MRES_SHIFT 24 // min.: 0, max.: 8, default: 0 +#define TMC5130_MRES_FIELD TMC5130_MRES_MASK, TMC5130_MRES_SHIFT +#define TMC5130_INTPOL_MASK 0x10000000 // CHOPCONF // interpolation to 256 microsteps +#define TMC5130_INTPOL_SHIFT 28 // min.: 0, max.: 1, default: 0 +#define TMC5130_INTPOL_FIELD TMC5130_INTPOL_MASK, TMC5130_INTPOL_SHIFT +#define TMC5130_DEDGE_MASK 0x20000000 // CHOPCONF // enable double edge step pulses +#define TMC5130_DEDGE_SHIFT 29 // min.: 0, max.: 1, default: 0 +#define TMC5130_DEDGE_FIELD TMC5130_DEDGE_MASK, TMC5130_DEDGE_SHIFT +#define TMC5130_DISS2G_MASK 0x40000000 // CHOPCONF // short to GND protection disable +#define TMC5130_DISS2G_SHIFT 30 // min.: 0, max.: 1, default: 0 +#define TMC5130_DISS2G_FIELD TMC5130_DISS2G_MASK, TMC5130_DISS2G_SHIFT +#define TMC5130_TOFF_MASK 0x0F // CHOPCONF // off time and driver enable +#define TMC5130_TOFF_SHIFT 0 // min.: 0, max.: 15, default: 0 +#define TMC5130_TOFF_FIELD TMC5130_TOFF_MASK, TMC5130_TOFF_SHIFT +#define TMC5130_HSTRT_MASK 0x70 // CHOPCONF // hysteresis start value added to HEND; Attention: Effective HEND+HSTRT less than or equal to 16. Hint: Hysteresis decrement is done each 16 clocks +#define TMC5130_HSTRT_SHIFT 4 // min.: 0, max.: 7, default: 0 +#define TMC5130_HSTRT_FIELD TMC5130_HSTRT_MASK, TMC5130_HSTRT_SHIFT +#define TMC5130_HEND_MASK 0x0780 // CHOPCONF // hysteresis low value +#define TMC5130_HEND_SHIFT 7 // min.: 0, max.: 15, default: 0 +#define TMC5130_HEND_FIELD TMC5130_HEND_MASK, TMC5130_HEND_SHIFT +#define TMC5130_RNDTF_MASK 0x2000 // CHOPCONF // random TOFF time +#define TMC5130_RNDTF_SHIFT 13 // min.: 0, max.: 1, default: 0 +#define TMC5130_RNDTF_FIELD TMC5130_RNDTF_MASK, TMC5130_RNDTF_SHIFT +#define TMC5130_CHM_MASK 0x4000 // CHOPCONF // chopper mode +#define TMC5130_CHM_SHIFT 14 // min.: 0, max.: 1, default: 0 +#define TMC5130_CHM_FIELD TMC5130_CHM_MASK, TMC5130_CHM_SHIFT +#define TMC5130_TBL_MASK 0x018000 // CHOPCONF // blank time select +#define TMC5130_TBL_SHIFT 15 // min.: 0, max.: 3, default: 0 +#define TMC5130_TBL_FIELD TMC5130_TBL_MASK, TMC5130_TBL_SHIFT +#define TMC5130_VSENSE_MASK 0x020000 // CHOPCONF // sense resistor voltage based current scaling +#define TMC5130_VSENSE_SHIFT 17 // min.: 0, max.: 1, default: 0 +#define TMC5130_VSENSE_FIELD TMC5130_VSENSE_MASK, TMC5130_VSENSE_SHIFT +#define TMC5130_VHIGHFS_MASK 0x040000 // CHOPCONF // high velocity fullstep selection +#define TMC5130_VHIGHFS_SHIFT 18 // min.: 0, max.: 1, default: 0 +#define TMC5130_VHIGHFS_FIELD TMC5130_VHIGHFS_MASK, TMC5130_VHIGHFS_SHIFT +#define TMC5130_VHIGHCHM_MASK 0x080000 // CHOPCONF // high velocity chopper mode +#define TMC5130_VHIGHCHM_SHIFT 19 // min.: 0, max.: 1, default: 0 +#define TMC5130_VHIGHCHM_FIELD TMC5130_VHIGHCHM_MASK, TMC5130_VHIGHCHM_SHIFT +#define TMC5130_SYNC_MASK 0xF00000 // CHOPCONF // PWM synchronization clock +#define TMC5130_SYNC_SHIFT 20 // min.: 0, max.: 15, default: 0 +#define TMC5130_SYNC_FIELD TMC5130_SYNC_MASK, TMC5130_SYNC_SHIFT +#define TMC5130_MRES_MASK 0x0F000000 // CHOPCONF // Micro step resolution; The resolution gives the number of microstep entries per sine quarter wave. The driver automatically uses microstep positions which result in a symmetrical wave, when choosing a lower microstep resolution. +#define TMC5130_MRES_SHIFT 24 // min.: 0, max.: 8, default: 0 +#define TMC5130_MRES_FIELD TMC5130_MRES_MASK, TMC5130_MRES_SHIFT +#define TMC5130_INTPOL_MASK 0x10000000 // CHOPCONF // interpolation to 256 microsteps +#define TMC5130_INTPOL_SHIFT 28 // min.: 0, max.: 1, default: 0 +#define TMC5130_INTPOL_FIELD TMC5130_INTPOL_MASK, TMC5130_INTPOL_SHIFT +#define TMC5130_DEDGE_MASK 0x20000000 // CHOPCONF // enable double edge step pulses +#define TMC5130_DEDGE_SHIFT 29 // min.: 0, max.: 1, default: 0 +#define TMC5130_DEDGE_FIELD TMC5130_DEDGE_MASK, TMC5130_DEDGE_SHIFT +#define TMC5130_DISS2G_MASK 0x40000000 // CHOPCONF // short to GND protection disable +#define TMC5130_DISS2G_SHIFT 30 // min.: 0, max.: 1, default: 0 +#define TMC5130_DISS2G_FIELD TMC5130_DISS2G_MASK, TMC5130_DISS2G_SHIFT +#define TMC5130_SEMIN_MASK 0x0F // COOLCONF // minimum stallGuard2 value - If the stallGuard2 result falls below SEMIN*32, the motor current becomes increased to reduce motor load angle. 0: smart current control coolStep off +#define TMC5130_SEMIN_SHIFT 0 // min.: 0, max.: 15, default: 0 +#define TMC5130_SEMIN_FIELD TMC5130_SEMIN_MASK, TMC5130_SEMIN_SHIFT +#define TMC5130_SEUP_MASK 0x60 // COOLCONF // Current increment steps per measured stallGuard2 value +#define TMC5130_SEUP_SHIFT 5 // min.: 0, max.: 3, default: 0 +#define TMC5130_SEUP_FIELD TMC5130_SEUP_MASK, TMC5130_SEUP_SHIFT +#define TMC5130_SEMAX_MASK 0x0F00 // COOLCONF // stallGuard2 hysteresis value - If the stallGuard2 result is equal to or above (SEMIN+SEMAX+1)*32, the motor current becomes decreased to save energy. +#define TMC5130_SEMAX_SHIFT 8 // min.: 0, max.: 15, default: 0 +#define TMC5130_SEMAX_FIELD TMC5130_SEMAX_MASK, TMC5130_SEMAX_SHIFT +#define TMC5130_SEDN_MASK 0x6000 // COOLCONF // Current down step speed; For each n stallGuard2 values decrease by one +#define TMC5130_SEDN_SHIFT 13 // min.: 0, max.: 3, default: 0 +#define TMC5130_SEDN_FIELD TMC5130_SEDN_MASK, TMC5130_SEDN_SHIFT +#define TMC5130_SEIMIN_MASK 0x8000 // COOLCONF // minimum current for smart current control +#define TMC5130_SEIMIN_SHIFT 15 // min.: 0, max.: 1, default: 0 +#define TMC5130_SEIMIN_FIELD TMC5130_SEIMIN_MASK, TMC5130_SEIMIN_SHIFT +#define TMC5130_SGT_MASK 0x7F0000 // COOLCONF // stallGuard2 threshold value This signed value controls stallGuard2 level for stall output and sets the optimum measurement range for readout. A lower value gives a higher sensitivity. Zero is the starting value working with most motors. A higher value makes stallGuard2 less sensitive and requires more torque to indicate a stall. +#define TMC5130_SGT_SHIFT 16 // min.: -64, max.: 63, default: 0 +#define TMC5130_SGT_FIELD TMC5130_SGT_MASK, TMC5130_SGT_SHIFT +#define TMC5130_SFILT_MASK 0x01000000 // COOLCONF // stallGuard2 filter enable +#define TMC5130_SFILT_SHIFT 24 // min.: 0, max.: 1, default: 0 +#define TMC5130_SFILT_FIELD TMC5130_SFILT_MASK, TMC5130_SFILT_SHIFT +#define TMC5130_DC_TIME_MASK 0x03FF // DCCTRL // Upper PWM on time limit for commutation (DC_TIME * 1/f CLK ). Set slightly above effective blank time TBL. +#define TMC5130_DC_TIME_SHIFT 0 // min.: 0, max.: 1023, default: 0 +#define TMC5130_DC_TIME_FIELD TMC5130_DC_TIME_MASK, TMC5130_DC_TIME_SHIFT +#define TMC5130_DC_SG_MASK 0xFF0000 // DCCTRL // Max. PWM on time for step loss detection using dcStep stallGuard2 in dcStep mode. (DC_SG * 16/f CLK); Set slightly higher than DC_TIME/16; 0=disable +#define TMC5130_DC_SG_SHIFT 16 // min.: 0, max.: 255, default: 0 +#define TMC5130_DC_SG_FIELD TMC5130_DC_SG_MASK, TMC5130_DC_SG_SHIFT +#define TMC5130_SG_RESULT_MASK 0x03FF // DRV_STATUS // Mechanical load measurement: The stallGuard2 result gives a means to measure mechanical motor load. A higher value means lower mechanical load. A value of 0 signals highest load. With optimum SGT setting, this is an indicator for a motor stall. The stall detection compares SG_RESULT to 0 in order to detect a stall. SG_RESULT is used as a base for coolStep operation, by comparing it to a programmable upper and a lower limit. It is not applicable in stealthChop mode. SG_RESULT is ALSO applicable when dcStep is active. stallGuard2 works best with microstep operation. Temperature measurement: In standstill, no stallGuard2 result can be obtained. SG_RESULT shows the chopper on-time for motor coil A instead. If the motor is moved to a determined microstep position at a certain current setting, a comparison of the chopper on-time can help to get a rough estimation of motor temperature. As the motor heats up, its coil resistance rises and the chopper on-time increases. +#define TMC5130_SG_RESULT_SHIFT 0 // min.: 0, max.: 1023, default: 0 +#define TMC5130_SG_RESULT_FIELD TMC5130_SG_RESULT_MASK, TMC5130_SG_RESULT_SHIFT +#define TMC5130_FSACTIVE_MASK 0x8000 // DRV_STATUS // Full step active indicator +#define TMC5130_FSACTIVE_SHIFT 15 // min.: 0, max.: 1, default: 0 +#define TMC5130_FSACTIVE_FIELD TMC5130_FSACTIVE_MASK, TMC5130_FSACTIVE_SHIFT +#define TMC5130_CS_ACTUAL_MASK 0x1F0000 // DRV_STATUS // Actual current control scaling, for monitoring smart energy current scaling controlled via settings in register COOLCONF, or for monitoring the function of the automatic current scaling. +#define TMC5130_CS_ACTUAL_SHIFT 16 // min.: 0, max.: 31, default: 0 +#define TMC5130_CS_ACTUAL_FIELD TMC5130_CS_ACTUAL_MASK, TMC5130_CS_ACTUAL_SHIFT +#define TMC5130_STALLGUARD_MASK 0x01000000 // DRV_STATUS // +#define TMC5130_STALLGUARD_SHIFT 24 // min.: 0, max.: 1, default: 0 +#define TMC5130_STALLGUARD_FIELD TMC5130_STALLGUARD_MASK, TMC5130_STALLGUARD_SHIFT +#define TMC5130_OT_MASK 0x02000000 // DRV_STATUS // +#define TMC5130_OT_SHIFT 25 // min.: 0, max.: 1, default: 0 +#define TMC5130_OT_FIELD TMC5130_OT_MASK, TMC5130_OT_SHIFT +#define TMC5130_OTPW_MASK 0x04000000 // DRV_STATUS // +#define TMC5130_OTPW_SHIFT 26 // min.: 0, max.: 1, default: 0 +#define TMC5130_OTPW_FIELD TMC5130_OTPW_MASK, TMC5130_OTPW_SHIFT +#define TMC5130_S2GA_MASK 0x08000000 // DRV_STATUS // +#define TMC5130_S2GA_SHIFT 27 // min.: 0, max.: 1, default: 0 +#define TMC5130_S2GA_FIELD TMC5130_S2GA_MASK, TMC5130_S2GA_SHIFT +#define TMC5130_S2GB_MASK 0x10000000 // DRV_STATUS // +#define TMC5130_S2GB_SHIFT 28 // min.: 0, max.: 1, default: 0 +#define TMC5130_S2GB_FIELD TMC5130_S2GB_MASK, TMC5130_S2GB_SHIFT +#define TMC5130_OLA_MASK 0x20000000 // DRV_STATUS // +#define TMC5130_OLA_SHIFT 29 // min.: 0, max.: 1, default: 0 +#define TMC5130_OLA_FIELD TMC5130_OLA_MASK, TMC5130_OLA_SHIFT +#define TMC5130_OLB_MASK 0x40000000 // DRV_STATUS // +#define TMC5130_OLB_SHIFT 30 // min.: 0, max.: 1, default: 0 +#define TMC5130_OLB_FIELD TMC5130_OLB_MASK, TMC5130_OLB_SHIFT +#define TMC5130_STST_MASK 0x80000000 // DRV_STATUS // +#define TMC5130_STST_SHIFT 31 // min.: 0, max.: 1, default: 0 +#define TMC5130_STST_FIELD TMC5130_STST_MASK, TMC5130_STST_SHIFT +#define TMC5130_PWM_AMPL_MASK 0xFF // PWMCONF // User defined PWM amplitude offset (0-255) The resulting amplitude (limited to 0-255) is: PWM_AMPL + PWM_GRAD * 256 / TSTEP +#define TMC5130_PWM_AMPL_SHIFT 0 // min.: 0, max.: 255, default: 0 +#define TMC5130_PWM_AMPL_FIELD TMC5130_PWM_AMPL_MASK, TMC5130_PWM_AMPL_SHIFT +#define TMC5130_PWM_GRAD_MASK 0xFF00 // PWMCONF // Velocity dependent gradient for PWM amplitude: PWM_GRAD * 256 / TSTEP is added to PWM_AMPL +#define TMC5130_PWM_GRAD_SHIFT 8 // min.: 0, max.: 255, default: 0 +#define TMC5130_PWM_GRAD_FIELD TMC5130_PWM_GRAD_MASK, TMC5130_PWM_GRAD_SHIFT +#define TMC5130_PWM_FREQ_MASK 0x030000 // PWMCONF // PWM frequency selection +#define TMC5130_PWM_FREQ_SHIFT 16 // min.: 0, max.: 3, default: 0 +#define TMC5130_PWM_FREQ_FIELD TMC5130_PWM_FREQ_MASK, TMC5130_PWM_FREQ_SHIFT +#define TMC5130_PWM_AUTOSCALE_MASK 0x040000 // PWMCONF // PWM automatic amplitude scaling +#define TMC5130_PWM_AUTOSCALE_SHIFT 18 // min.: 0, max.: 1, default: 0 +#define TMC5130_PWM_AUTOSCALE_FIELD TMC5130_PWM_AUTOSCALE_MASK, TMC5130_PWM_AUTOSCALE_SHIFT +#define TMC5130_PWM_SYMMETRIC_MASK 0x080000 // PWMCONF // Force symmetric PWM +#define TMC5130_PWM_SYMMETRIC_SHIFT 19 // min.: 0, max.: 1, default: 0 +#define TMC5130_PWM_SYMMETRIC_FIELD TMC5130_PWM_SYMMETRIC_MASK, TMC5130_PWM_SYMMETRIC_SHIFT +#define TMC5130_FREEWHEEL_MASK 0x300000 // PWMCONF // Allows different standstill modes +#define TMC5130_FREEWHEEL_SHIFT 20 // min.: 0, max.: 3, default: 0 +#define TMC5130_FREEWHEEL_FIELD TMC5130_FREEWHEEL_MASK, TMC5130_FREEWHEEL_SHIFT +#define TMC5130_PWM_AMPL_MASK 0xFF // PWMCONF // User defined maximum PWM amplitude when switching back from current chopper mode to voltage PWM mode (switch over velocity defined by TPWMTHRS). Do not set too low values, as the regulation cannot measure the current when the actual PWM value goes below a setting specific value. Settings above 0x40 recommended +#define TMC5130_PWM_AMPL_SHIFT 0 // min.: 0, max.: 255, default: 0 +#define TMC5130_PWM_AMPL_FIELD TMC5130_PWM_AMPL_MASK, TMC5130_PWM_AMPL_SHIFT +#define TMC5130_PWM_GRAD_MASK 0xFF00 // PWMCONF // User defined maximum PWM amplitude change per half wave (1 to 15) +#define TMC5130_PWM_GRAD_SHIFT 8 // min.: 0, max.: 15, default: 0 +#define TMC5130_PWM_GRAD_FIELD TMC5130_PWM_GRAD_MASK, TMC5130_PWM_GRAD_SHIFT +#define TMC5130_PWM_FREQ_MASK 0x030000 // PWMCONF // PWM frequency selection +#define TMC5130_PWM_FREQ_SHIFT 16 // min.: 0, max.: 3, default: 0 +#define TMC5130_PWM_FREQ_FIELD TMC5130_PWM_FREQ_MASK, TMC5130_PWM_FREQ_SHIFT +#define TMC5130_PWM_AUTOSCALE_MASK 0x040000 // PWMCONF // PWM automatic amplitude scaling +#define TMC5130_PWM_AUTOSCALE_SHIFT 18 // min.: 0, max.: 1, default: 0 +#define TMC5130_PWM_AUTOSCALE_FIELD TMC5130_PWM_AUTOSCALE_MASK, TMC5130_PWM_AUTOSCALE_SHIFT +#define TMC5130_PWM_SYMMETRIC_MASK 0x080000 // PWMCONF // Force symmetric PWM +#define TMC5130_PWM_SYMMETRIC_SHIFT 19 // min.: 0, max.: 1, default: 0 +#define TMC5130_PWM_SYMMETRIC_FIELD TMC5130_PWM_SYMMETRIC_MASK, TMC5130_PWM_SYMMETRIC_SHIFT +#define TMC5130_FREEWHEEL_MASK 0x300000 // PWMCONF // Allows different standstill modes +#define TMC5130_FREEWHEEL_SHIFT 20 // min.: 0, max.: 3, default: 0 +#define TMC5130_FREEWHEEL_FIELD TMC5130_FREEWHEEL_MASK, TMC5130_FREEWHEEL_SHIFT +#define TMC5130_PWM_SCALE_MASK 0xFF // PWM_SCALE // Actual PWM amplitude scaler (255=max. Voltage) In voltage mode PWM, this value allows to detect a motor stall. +#define TMC5130_PWM_SCALE_SHIFT 0 // min.: 0, max.: 255, default: 0 +#define TMC5130_PWM_SCALE_FIELD TMC5130_PWM_SCALE_MASK, TMC5130_PWM_SCALE_SHIFT +#define TMC5130_INV_MASK 0x01 // ENCM_CTRL // +#define TMC5130_INV_SHIFT 0 // min.: 0, max.: 1, default: 0 +#define TMC5130_INV_FIELD TMC5130_INV_MASK, TMC5130_INV_SHIFT +#define TMC5130_MAXSPEED_MASK 0x02 // ENCM_CTRL // +#define TMC5130_MAXSPEED_SHIFT 1 // min.: 0, max.: 1, default: 0 +#define TMC5130_MAXSPEED_FIELD TMC5130_MAXSPEED_MASK, TMC5130_MAXSPEED_SHIFT +#define TMC5130_LOST_STEPS_MASK 0x0FFFFF // LOST_STEPS // Number of input steps skipped due to higher load in dcStep operation, if step input does not stop when DC_OUT is low. This counter wraps around after 2^20 steps. Counts up or down depending on direction. +#define TMC5130_LOST_STEPS_SHIFT 0 // min.: 0, max.: 1048575, default: 0 +#define TMC5130_LOST_STEPS_FIELD TMC5130_LOST_STEPS_MASK, TMC5130_LOST_STEPS_SHIFT + +#endif /* TMC5130_FIELDS_H */ diff --git a/tmcdriver/tmc51x0/reg/TMC5130_Register.h b/tmcdriver/tmc51x0/reg/TMC5130_Register.h new file mode 100644 index 0000000..d82cf89 --- /dev/null +++ b/tmcdriver/tmc51x0/reg/TMC5130_Register.h @@ -0,0 +1,74 @@ +/* + * TMC5130_Register.h + * + * Created on: 30.09.2016 + * Author: ed based on te + */ + +#ifndef TMC5130_REGISTER_H +#define TMC5130_REGISTER_H + +// ===== TMC5130 register set ===== + +#define TMC5130_GCONF 0x00 +#define TMC5130_GSTAT 0x01 +#define TMC5130_IFCNT 0x02 +#define TMC5130_SLAVECONF 0x03 +#define TMC5130_IOIN 0x04 +#define TMC5130_X_COMPARE 0x05 + +#define TMC5130_IHOLD_IRUN 0x10 +#define TMC5130_TPOWERDOWN 0x11 +#define TMC5130_TSTEP 0x12 +#define TMC5130_TPWMTHRS 0x13 +#define TMC5130_TCOOLTHRS 0x14 +#define TMC5130_THIGH 0x15 + +#define TMC5130_RAMPMODE 0x20 +#define TMC5130_XACTUAL 0x21 +#define TMC5130_VACTUAL 0x22 +#define TMC5130_VSTART 0x23 +#define TMC5130_A1 0x24 +#define TMC5130_V1 0x25 +#define TMC5130_AMAX 0x26 +#define TMC5130_VMAX 0x27 +#define TMC5130_DMAX 0x28 +#define TMC5130_D1 0x2A +#define TMC5130_VSTOP 0x2B +#define TMC5130_TZEROWAIT 0x2C +#define TMC5130_XTARGET 0x2D + +#define TMC5130_VDCMIN 0x33 +#define TMC5130_SWMODE 0x34 +#define TMC5130_RAMPSTAT 0x35 +#define TMC5130_XLATCH 0x36 + +#define TMC5130_ENCMODE 0x38 +#define TMC5130_XENC 0x39 +#define TMC5130_ENC_CONST 0x3A +#define TMC5130_ENC_STATUS 0x3B +#define TMC5130_ENC_LATCH 0x3C + +#define TMC5130_MSLUT0 0x60 +#define TMC5130_MSLUT1 0x61 +#define TMC5130_MSLUT2 0x62 +#define TMC5130_MSLUT3 0x63 +#define TMC5130_MSLUT4 0x64 +#define TMC5130_MSLUT5 0x65 +#define TMC5130_MSLUT6 0x66 +#define TMC5130_MSLUT7 0x67 +#define TMC5130_MSLUTSEL 0x68 +#define TMC5130_MSLUTSTART 0x69 +#define TMC5130_MSCNT 0x6A +#define TMC5130_MSCURACT 0x6B + +#define TMC5130_CHOPCONF 0x6C +#define TMC5130_COOLCONF 0x6D +#define TMC5130_DCCTRL 0x6E +#define TMC5130_DRVSTATUS 0x6F +#define TMC5130_PWMCONF 0x70 +#define TMC5130_PWMSTATUS 0x71 +#define TMC5130_ENCM_CTRL 0x72 +#define TMC5130_LOST_STEPS 0x73 + +#endif /* TMC5130_REGISTER_H */ diff --git a/tmcdriver/tmc51x0/reg/TMC5130_Type.h b/tmcdriver/tmc51x0/reg/TMC5130_Type.h new file mode 100644 index 0000000..3d97eb0 --- /dev/null +++ b/tmcdriver/tmc51x0/reg/TMC5130_Type.h @@ -0,0 +1,59 @@ +#pragma once +#include + +#include "TMC5130_Constants.h" +#include "TMC5130_Fields.h" +#include "TMC5130_Register.h" +namespace iflytop { +class TMC5130RampStat { + public: + uint32_t m_state; + typedef enum { + /** + * @brief + * R ：只读 + * R+C：只读，但读后会自动清零 + */ + ktmc5130_rs_stopl = TMC5130_RS_STOPL, // (R ) + ktmc5130_rs_stopr = TMC5130_RS_STOPR, // (R ) + ktmc5130_rs_latchl = TMC5130_RS_LATCHL, // (R+C) + ktmc5130_rs_latchr = TMC5130_RS_LATCHR, // (R+C) + ktmc5130_rs_ev_stopl = TMC5130_RS_EV_STOPL, // (R ) + ktmc5130_rs_ev_stopr = TMC5130_RS_EV_STOPR, // (R ) + ktmc5130_rs_ev_stop_sg = TMC5130_RS_EV_STOP_SG, // (R+C) + ktmc5130_rs_ev_posreached = TMC5130_RS_EV_POSREACHED, // (R+C) + ktmc5130_rs_velreached = TMC5130_RS_VELREACHED, // (R ) + ktmc5130_rs_posreached = TMC5130_RS_POSREACHED, // (R ) 是否到达目标位置 + ktmc5130_rs_vzero = TMC5130_RS_VZERO, // (R ) + ktmc5130_rs_zerowait = TMC5130_RS_ZEROWAIT, // (R ) + ktmc5130_rs_secondmove = TMC5130_RS_SECONDMOVE, // (R+C) + ktmc5130_rs_sg = TMC5130_RS_SG, // (R ) + } ramp_stat_bit_t; + + TMC5130RampStat(uint32_t state) : m_state(state) {} + bool isSetted(ramp_stat_bit_t bit) { return (m_state & bit) != 0; } +}; + +typedef struct { + uint32_t sg_result : 10; + uint32_t reserved0 : 5; + uint32_t fsactive : 1; + uint32_t cs_actual : 5; + uint32_t reserved1 : 3; + uint32_t stallguard : 1; + uint32_t ot : 1; // overtemperature flag + uint32_t otpw : 1; // overtemperature pre warning flag + uint32_t s2ga : 1; // short to ground indicator phase A + uint32_t s2gb : 1; // short to ground indicator phase B + uint32_t ola : 1; // open load indicator phase A + uint32_t olb : 1; // open load indicator phase B + uint32_t stst : 1; // standstill indicator +} TMC5130DevStatusReg_t; + +typedef struct { + uint32_t reset : 1; // 复位标识 + uint32_t drv_err : 1; // + uint32_t uv_cp : 1; +} TMC5130GState_t; + +} // namespace iflytop \ No newline at end of file diff --git a/tmcdriver/tmc51x0/tmc51x0.cpp b/tmcdriver/tmc51x0/tmc51x0.cpp new file mode 100644 index 0000000..fecd50d --- /dev/null +++ b/tmcdriver/tmc51x0/tmc51x0.cpp @@ -0,0 +1,437 @@ +#include "tmc51x0.hpp" + +#include "reg/TMC5130_Constants.h" +#include "reg/TMC5130_Fields.h" +#include "reg/TMC5130_Register.h" +// + +using namespace iflytop; + +#if 0 +// Register access permissions: +// 0x00: none (reserved) +// 0x01: read +// 0x02: write +// 0x03: read/write +// 0x13: read/write, separate functions/values for reading or writing +// 0x21: read, flag register (read to clear) +// 0x42: write, has hardware presets on reset +static const uint8_t tmc5130_defaultRegisterAccess[TMC5130_REGISTER_COUNT] = { + // 0 1 2 3 4 5 6 7 8 9 A B C D E F + 0x03, 0x21, 0x01, 0x02, 0x13, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, // 0x00 - 0x0F + 0x02, 0x02, 0x01, 0x02, 0x02, 0x02, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, // 0x10 - 0x1F + 0x03, 0x03, 0x01, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, ____, 0x02, 0x02, 0x02, 0x03, ____, ____, // 0x20 - 0x2F + ____, ____, ____, 0x02, 0x03, 0x21, 0x01, ____, 0x03, 0x03, 0x02, 0x21, 0x01, ____, ____, ____, // 0x30 - 0x3F + ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, // 0x40 - 0x4F + ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, // 0x50 - 0x5F + 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x01, 0x01, 0x03, 0x02, 0x02, 0x01, // 0x60 - 0x6F + 0x42, 0x01, 0x02, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____ // 0x70 - 0x7F +}; +#endif + +/*********************************************************************************************************************** + * 工具宏 * + ***********************************************************************************************************************/ + +#define FIELD_SET(data, mask, shift, value) (data = (((data) & (~(mask))) | (((value) << (shift)) & (mask)))) +#define FIELD_GET(data, mask, shift) (((data) & (mask)) >> (shift)) +#define BYTE(value, n) (((value) >> ((n) << 3)) & 0xFF) +#define NIBBLE(value, n) (((value) >> ((n) << 2)) & 0x0F) +#define SHORT(value, n) (((value) >> ((n) << 4)) & 0xFFFF) +#define WORD(value, n) (((value) >> ((n) << 5)) & 0xFFFFFFFF) + +#define TMC51x0_ADDRESS(x) ((x) & (TMC5130_ADDRESS_MASK)) +#define TAG "TMC51X0" +void TMC51X0::initialize(TMC51X0Cfg cfg) { + m_cfg = cfg; + m_hspi = cfg.hspi; + + ZLOGI(TAG, "SPI:%p CSPin:%s,enPIn:%s", cfg.hspi, pinname(cfg.csnpin), pinname(cfg.ennpin)); + m_mutex.init(); + + m_csnpin.initAsOutput(m_cfg.csnpin, kxs_gpio_nopull, false, true); + m_ennpin.initAsOutput(m_cfg.ennpin, kxs_gpio_nopull, false, true); + + enable(false); + + stop(); + + writeInt(TMC5130_PWMCONF, 0x000500C8); + writeInt(TMC5130_CHOPCONF, 0x000100c3); + writeInt(TMC5130_IHOLD_IRUN, 0x00051A00); + writeInt(TMC5130_PWMCONF, 0x000401c8); + writeInt(TMC5130_XTARGET, 0); + writeInt(TMC5130_XACTUAL, 0x00000000); + writeInt(TMC5130_VACTUAL, 0x00000000); + writeInt(TMC5130_TZEROWAIT, 0); + + setVstart(100); + setA1(30); + setAmax(50); + setV1(500); + setDmax(50); + setD1(30); + setVstop(100); + setTzerowait(100); + + setIHOLD_IRUN(0, 30, 100); + enable(false); +} + +/******************************************************************************* + * 驱动器寄存器读写方法 * + *******************************************************************************/ + +void TMC51X0::readWriteArray(uint8_t *data, size_t length) { + portENTER_CRITICAL(); + m_csnpin.write(false); + HAL_SPI_TransmitReceive(m_hspi, data, data, length, 100); + m_csnpin.write(true); + portEXIT_CRITICAL(); +} +void TMC51X0::writeDatagram(uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4) { + uint8_t data[5] = {static_cast(address | static_cast(TMC5130_WRITE_BIT)), x1, x2, x3, x4}; + readWriteArray(&data[0], 5); +} +void TMC51X0::writeInt(uint8_t address, int32_t value) { // + writeDatagram(address, BYTE(value, 3), BYTE(value, 2), BYTE(value, 1), BYTE(value, 0)); +} + +void TMC51X0::writeField(uint8_t add, uint32_t mask, uint32_t shift, uint32_t value) { + uint32_t regval = readUInt(add); + regval = (regval & ~mask) | ((value << shift) & mask); + writeInt(add, regval); +} + +int32_t TMC51X0::readInt(uint8_t address) { + /** + * @WARNING: + * 这里没有判断寄存器是否可读，有些寄存器是不可读所以，所以可能读回来的数值和写入数值是不相等的 + */ + address = TMC51x0_ADDRESS(address); + + uint8_t data[5] = {0, 0, 0, 0, 0}; + + data[0] = address; + readWriteArray(&data[0], 5); + + data[0] = address; + readWriteArray(&data[0], 5); + + return ((uint32_t)data[1] << 24) | ((uint32_t)data[2] << 16) | (data[3] << 8) | data[4]; +} + +uint32_t TMC51X0::readUInt(uint8_t address) { + int32_t val = readInt(address); + uint32_t ret; + memcpy(&ret, &val, sizeof(uint32_t)); + return ret; +} + +/*********************************************************************************************************************** + * BASIC * + ***********************************************************************************************************************/ + +bool TMC51X0::ping() { + zlock_guard lkg(m_mutex); + uint32_t regval = readUInt(TMC5130_IOIN); + uint32_t chipId = FIELD_GET(regval, TMC5130_VERSION_MASK, TMC5130_VERSION_SHIFT); + return chipId != 0; +} +void TMC51X0::enable(bool enable) { + zlock_guard lkg(m_mutex); + + m_ennpin.write(!enable); +} + +int32_t TMC51X0::to_motor_acc(int32_t acc) { // + int32_t val = acc / 60.0 * m_onecirclepulse; // 65535 + if (val > 65535) val = 65535; + return val; +} +int32_t TMC51X0::to_motor_vel(int32_t vel) { // + int32_t val = vel / 60.0 * m_onecirclepulse; + if (val > 8388095 /*2^23-512*/) { + val = 8388095; + } + return val; +} // rpm +int32_t TMC51X0::to_motor_pos(int32_t pos) { // + int32_t val = pos * 1.0 / m_scale * m_scale_deceleration * m_onecirclepulse + 0.5; + return val; +} // + +int32_t TMC51X0::to_user_pos(int32_t pos) { // + int32_t val = pos / m_onecirclepulse * m_scale / m_scale_deceleration + 0.5; + // ZLOGI("TMC5130", "to_user_pos %d,%d", pos, val); + return val; +} // +int32_t TMC51X0::to_user_vel(int32_t vel) { // + int32_t val = vel * 60.0 / m_onecirclepulse; + return val; +} +/*********************************************************************************************************************** + * CTRL * + ***********************************************************************************************************************/ +void TMC51X0::stop() { + zlock_guard lkg(m_mutex); + + rotate(0); +} +void TMC51X0::rotate(int32_t velocity) { + zlock_guard lkg(m_mutex); + + velocity = to_motor_vel(velocity); + writeInt(TMC5130_VMAX, abs(velocity)); + writeInt(TMC5130_RAMPMODE, (velocity >= 0) ? TMC5130_MODE_VELPOS : TMC5130_MODE_VELNEG); +} +void TMC51X0::moveTo(int32_t position, uint32_t velocityMax) { + zlock_guard lkg(m_mutex); + + position = to_motor_pos(position); + velocityMax = to_motor_vel(velocityMax); + writeInt(TMC5130_RAMPMODE, TMC5130_MODE_POSITION); + writeInt(TMC5130_VMAX, velocityMax); + writeInt(TMC5130_XTARGET, position); +} +void TMC51X0::moveToEnd(int32_t direction, uint32_t velocityMax) { + zlock_guard lkg(m_mutex); + + if (direction >= 0) { + writeInt(TMC5130_RAMPMODE, TMC5130_MODE_POSITION); + writeInt(TMC5130_VMAX, to_motor_vel(velocityMax)); + writeInt(TMC5130_XTARGET, INT32_MAX / 1.5 - 1000); + } else { + writeInt(TMC5130_RAMPMODE, TMC5130_MODE_POSITION); + writeInt(TMC5130_VMAX, to_motor_vel(velocityMax)); + writeInt(TMC5130_XTARGET, INT32_MIN / 1.5 + 1000); + } +} + +void TMC51X0::moveBy(int32_t relativePosition, uint32_t velocityMax) { // determine actual position and add numbers of ticks to move + zlock_guard lkg(m_mutex); + + int32_t pos = getXACTUAL(); + int32_t target = pos + relativePosition; + moveTo(target, velocityMax); +} + +/*********************************************************************************************************************** + * GET STATE * + ***********************************************************************************************************************/ + +int32_t TMC51X0::getXACTUAL() { + zlock_guard lkg(m_mutex); + + return to_user_pos(readInt(TMC5130_XACTUAL)); +} +int32_t TMC51X0::getVACTUAL() { + zlock_guard lkg(m_mutex); + return to_user_pos(readInt(TMC5130_VACTUAL)); +} +int32_t TMC51X0::getEncVal() { + zlock_guard lkg(m_mutex); + int32_t enc_val = to_user_pos(readInt(TMC5130_XENC)); + if (m_enc_resolution < 0) { + enc_val = -enc_val; + } + return enc_val; +} +TMC5130RampStat TMC51X0::getRampStat() { + zlock_guard lkg(m_mutex); + int32_t val = readInt(TMC5130_RAMPSTAT); + return TMC5130RampStat(val); +} + +bool TMC51X0::isReachTarget(TMC5130RampStat *state) { + zlock_guard lkg(m_mutex); + int mode = readInt(TMC5130_RAMPMODE); + if (mode == TMC5130_MODE_POSITION) { + return state->isSetted(TMC5130RampStat::ktmc5130_rs_posreached); + } else { + return state->isSetted(TMC5130RampStat::ktmc5130_rs_vzero) && state->isSetted(TMC5130RampStat::ktmc5130_rs_velreached); + } +} +bool TMC51X0::isTMC5130() { + zlock_guard lkg(m_mutex); + uint32_t regval = readUInt(TMC5130_IOIN); + uint32_t chipId = FIELD_GET(regval, TMC5130_VERSION_MASK, TMC5130_VERSION_SHIFT); + return chipId == kTMC5130; +} + +TMC5130DevStatusReg_t TMC51X0::getDevStatus() { // R 读后不清 + zlock_guard lkg(m_mutex); + static_assert(sizeof(TMC5130DevStatusReg_t) == 4); + uint32_t value = readInt(TMC5130_DRVSTATUS); + TMC5130DevStatusReg_t val; + memcpy(&val, &value, sizeof(TMC5130DevStatusReg_t)); + return val; +} +TMC5130GState_t TMC51X0::getGState() { // R+C 读后自动清除 + zlock_guard lkg(m_mutex); + static_assert(sizeof(TMC5130GState_t) == 4); + uint32_t value = readInt(TMC5130_GSTAT); + TMC5130GState_t val; + memcpy(&val, &value, sizeof(TMC5130GState_t)); + return val; +} +int32_t TMC51X0::readICVersion() { + zlock_guard lkg(m_mutex); + uint32_t regval = readUInt(TMC5130_IOIN); + uint32_t chipId = FIELD_GET(regval, TMC5130_VERSION_MASK, TMC5130_VERSION_SHIFT); + return chipId; +} + +/*********************************************************************************************************************** + * set state * + ***********************************************************************************************************************/ + +void TMC51X0::setXACTUAL(int32_t value) { + zlock_guard lkg(m_mutex); + writeInt(TMC5130_XACTUAL, to_motor_pos(value)); +} +void TMC51X0::setMotorShaft(bool reverse) { + zlock_guard lkg(m_mutex); + uint32_t regval = readUInt(TMC5130_GCONF); + FIELD_SET(regval, TMC5130_SHAFT_MASK, TMC5130_SHAFT_SHIFT, reverse ? 1 : 0); + writeInt(TMC5130_GCONF, regval); + // uint32_t readbak = readUInt(TMC5130_GCONF); + // ZLOGI(TAG, "%x,%x", regval, readbak); +} +void TMC51X0::setIHOLD_IRUN(uint8_t ihold, uint8_t irun, uint16_t iholddelay) { + zlock_guard lkg(m_mutex); + writeInt(TMC5130_IHOLD_IRUN, (iholddelay << TMC5130_IHOLDDELAY_SHIFT) | (irun << TMC5130_IRUN_SHIFT) | (ihold << TMC5130_IHOLD_SHIFT)); +} +void TMC51X0::setGlobalScale(uint8_t globalscale) { +#define TMC5160_GLOBAL_SCALER 0x0B +#define TMC5160_GLOBAL_SCALER_MASK 0xFF +#define TMC5160_GLOBAL_SCALER_SHIFT 0 + zlock_guard lkg(m_mutex); + if (isTMC5130()) { + return; + } + + if (globalscale == 0) { + globalscale = 0; + } else if (globalscale <= 31 && globalscale >= 1) { + globalscale = 32; + } else { + globalscale = globalscale; + } + writeInt(TMC5160_GLOBAL_SCALER, (readInt(TMC5160_GLOBAL_SCALER) & ~TMC5160_GLOBAL_SCALER_MASK) | (globalscale << TMC5160_GLOBAL_SCALER_SHIFT)); +} +void TMC51X0::setScale(int32_t scale) { + zlock_guard lkg(m_mutex); + m_scale = scale; +} +void TMC51X0::setScaleDenominator(int32_t scale) { + zlock_guard lkg(m_mutex); + m_scale_deceleration = scale; +} +void TMC51X0::setVstart(int32_t val) { + zlock_guard lkg(m_mutex); + writeInt(TMC5130_VSTART, to_motor_vel(val)); +} +void TMC51X0::setA1(int32_t val) { + zlock_guard lkg(m_mutex); + writeInt(TMC5130_A1, to_motor_acc(val)); +} +void TMC51X0::setAmax(int32_t val) { + zlock_guard lkg(m_mutex); + writeInt(TMC5130_AMAX, to_motor_acc(val)); +} +void TMC51X0::setV1(int32_t val) { + zlock_guard lkg(m_mutex); + writeInt(TMC5130_V1, to_motor_vel(val)); +} +void TMC51X0::setDmax(int32_t val) { + zlock_guard lkg(m_mutex); + writeInt(TMC5130_DMAX, to_motor_acc(val)); +} +void TMC51X0::setD1(int32_t val) { + zlock_guard lkg(m_mutex); + writeInt(TMC5130_D1, to_motor_acc(val)); +} +void TMC51X0::setVstop(int32_t val) { + zlock_guard lkg(m_mutex); + writeInt(TMC5130_VSTOP, to_motor_vel(val)); +} +void TMC51X0::setTzerowait(int32_t val) { + zlock_guard lkg(m_mutex); + writeInt(TMC5130_TZEROWAIT, val); +} +bool TMC51X0::setEncResolution(int32_t enc_resolution) { + zlock_guard lkg(m_mutex); + /** + * @brief + * + * 1.假设电机是256细分 + * 2.假设TMC5130_ENC_CONST是十进制模式 + * 3.只支持指定分辨率的编码器 + */ + + int32_t enc_resolution_tmp = enc_resolution * 4; + int16_t enc_const_integral = 0; + int16_t enc_const_fractional = 0; + + switch (abs(enc_resolution_tmp)) { + case 1000: + enc_const_integral = 51; + enc_const_fractional = 0.2 * 10000; + break; + case 1024: + enc_const_integral = 50; + enc_const_fractional = 0 * 10000; + break; + case 4000: + enc_const_integral = 12; + enc_const_fractional = 0.8 * 10000; + break; + case 4096: + enc_const_integral = 12; + enc_const_fractional = 0.5 * 10000; + break; + case 16384: + enc_const_integral = 3; + enc_const_fractional = 0.125 * 10000; + break; + case 0: + m_enc_resolution = 0; + return true; + + default: + return false; + break; + } + + m_enc_resolution = enc_resolution; + uint32_t setval = 0; + uint8_t *psetval = (uint8_t *)&setval; + + memcpy(psetval + 2, &enc_const_integral, 2); + memcpy(psetval, &enc_const_fractional, 2); + + writeInt(TMC5130_ENCMODE, 0x1 << 10); + writeInt(TMC5130_ENC_CONST, setval); + return true; +} +void TMC51X0::setEncVal(int32_t enc_val) { + zlock_guard lkg(m_mutex); + int32_t enc_set_val = to_motor_pos(enc_val); + if (m_enc_resolution < 0) { + enc_set_val = -enc_set_val; + } + writeInt(TMC5130_XENC, enc_set_val); +} + +/*********************************************************************************************************************** + * reg operation * + ***********************************************************************************************************************/ +void TMC51X0::writeIntExt(uint8_t address, int32_t value) { + zlock_guard lkg(m_mutex); + writeInt(address, value); +} +int32_t TMC51X0::readIntExt(uint8_t address) { + zlock_guard lkg(m_mutex); + return readInt(address); +} \ No newline at end of file diff --git a/tmcdriver/tmc51x0/tmc51x0.hpp b/tmcdriver/tmc51x0/tmc51x0.hpp new file mode 100644 index 0000000..1ceabdd --- /dev/null +++ b/tmcdriver/tmc51x0/tmc51x0.hpp @@ -0,0 +1,123 @@ +#pragma once +#include +#include +#include +#include +#include + +// +#include "../tmc/tmc_type.h" +#include "reg/TMC5130_Type.h" +#include "stm32basic/stm32basic.hpp" +namespace iflytop { +/** + * @brief + * 注意事项 + * + * 1. 6点加速控制只在位置模式下有效，在速度模式下无效 + * 2. 速度模式下只有AMAX有效 + * + */ +class TMC51X0Cfg { + public: + SPI_HandleTypeDef *hspi = NULL; + Pin_t csnpin; + Pin_t ennpin; + + TMC51X0Cfg(SPI_HandleTypeDef *hspi, Pin_t csnpin, Pin_t ennpin) : hspi(hspi), csnpin(csnpin), ennpin(ennpin) {} + TMC51X0Cfg() {} +}; + +class TMC51X0 { + protected: + TMC51X0Cfg m_cfg; + + SPI_HandleTypeDef *m_hspi = NULL; + ZGPIO m_csnpin; + ZGPIO m_ennpin; + + int32_t m_scale = 10000; + int32_t m_scale_deceleration = 1; + mres_type_t m_MRES = kmres_256; + double m_onecirclepulse = 51200; + int32_t m_enc_resolution = 0; // 编码器分辨率，默认只有在256细分的情况下有效 + + zmutex m_mutex; + bool m_driErr = false; + + public: + void initialize(TMC51X0Cfg cfg); + + private: + /******************************************************************************* + * 驱动器寄存器读写方法 * + *******************************************************************************/ + void readWriteArray(uint8_t *data, size_t length); + void writeDatagram(uint8_t address, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4); + void writeInt(uint8_t address, int32_t value); + void writeField(uint8_t add, uint32_t mask, uint32_t shift, uint32_t value); + int32_t readInt(uint8_t address); + uint32_t readUInt(uint8_t address); + + public: + bool ping(); + void enable(bool enable); + + void setdriErr(bool val) { m_driErr = val; } + bool getdriErr() { return m_driErr; } + /*********************************************************************************************************************** + * ctrl * + ***********************************************************************************************************************/ + void rotate(int32_t velocity); + void moveTo(int32_t position, uint32_t velocityMax); + void moveToEnd(int32_t direction, uint32_t velocityMax); + void moveBy(int32_t relativePosition, uint32_t velocityMax); + void stop(); + /*********************************************************************************************************************** + * get state * + ***********************************************************************************************************************/ + int32_t getXACTUAL(); // 当前位置 + int32_t getVACTUAL(); // 当前速度 + int32_t getEncVal(); // ENCVAL + TMC5130RampStat getRampStat(); + TMC5130DevStatusReg_t getDevStatus(); // R 读后不清 + TMC5130GState_t getGState(); // R+C 读后自动清除 + int32_t readICVersion(); + + bool isReachTarget(TMC5130RampStat *state); // 是否到达目标位置 + bool isTMC5130(); + + /*********************************************************************************************************************** + * set state * + ***********************************************************************************************************************/ + void setXACTUAL(int32_t value); // 设置当前位置 + void setMotorShaft(bool reverse); + void setIHOLD_IRUN(uint8_t ihold, uint8_t irun, uint16_t iholddelay); + void setGlobalScale(uint8_t globalscale); // ONLY for 5160 + void setScale(int32_t scale); + void setScaleDenominator(int32_t scale); + void setVstart(int32_t val); + void setA1(int32_t val); + void setAmax(int32_t val); + void setV1(int32_t val); + void setDmax(int32_t val); + void setD1(int32_t val); + void setVstop(int32_t val); + void setTzerowait(int32_t val); + bool setEncResolution(int32_t enc_resolution); + void setEncVal(int32_t enc_val); + + /*********************************************************************************************************************** + * reg operation * + ***********************************************************************************************************************/ + void writeIntExt(uint8_t address, int32_t value); + int32_t readIntExt(uint8_t address); + + private: + int32_t to_motor_acc(int32_t acc); // rpm/s^2 + int32_t to_motor_vel(int32_t vel); // rpm + int32_t to_motor_pos(int32_t pos); // + int32_t to_user_pos(int32_t pos); // + int32_t to_user_vel(int32_t vel); +}; +} // namespace iflytop diff --git a/zcanreceiver/zcanreceiver.cpp b/zcanreceiver/zcanreceiver.cpp new file mode 100644 index 0000000..1075833 --- /dev/null +++ b/zcanreceiver/zcanreceiver.cpp @@ -0,0 +1,427 @@ +#include "zcanreceiver.hpp" + +#include "stm32basic/mutex.hpp" +#include "stm32halport/stm32halport.hpp" +#define TAG "zcan" +#define CANHANDLER &hcan1 +#define CAN_FILTER_INDEX 0 +#define CAN_MAX_FILTER_NUM 7 +#define CAN_FIFO_NUM CAN_RX_FIFO0 +#define OVER_TIME_MS 30 +#define HEART_OVERTIME (30 * 1000) + +using namespace iflytop; +using namespace zscanprotocol; + +static uint8_t m_deviceId; +static zcanbus_on_rx_t m_rxlistener[30]; +static uint32_t m_numListener = 0; +static zcanbus_on_connected_t m_connectedlistener; + +static canrxbuffer_t m_rxbufcache; + +static uint16_t reportIndex; + +static uint8_t rxdata[200]; +static uint8_t txbuff[200]; + +static uint32_t lastpacket_ticket; +static bool m_is_connected; + +static uint8_t m_priority; + +zmutex m_lock; + +static void _oncanpacket(CAN_HandleTypeDef *hcan); +static void _processOneCanPacket(CAN_RxHeaderTypeDef *pHeader, uint8_t *aData); +static bool _getRxMessage(CAN_RxHeaderTypeDef *pHeader, uint8_t aData[] /*8byte table*/); + +extern "C" { +void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan) { ZLOGI(TAG, "HAL_CAN_TxMailbox0CompleteCallback"); } +void HAL_CAN_TxMailbox1CompleteCallback(CAN_HandleTypeDef *hcan) { ZLOGI(TAG, "HAL_CAN_TxMailbox1CompleteCallback"); } +void HAL_CAN_TxMailbox2CompleteCallback(CAN_HandleTypeDef *hcan) { ZLOGI(TAG, "HAL_CAN_TxMailbox2CompleteCallback"); } +void HAL_CAN_TxMailbox0AbortCallback(CAN_HandleTypeDef *hcan) { ZLOGI(TAG, "HAL_CAN_TxMailbox0AbortCallback"); } +void HAL_CAN_TxMailbox1AbortCallback(CAN_HandleTypeDef *hcan) { ZLOGI(TAG, "HAL_CAN_TxMailbox1AbortCallback"); } +void HAL_CAN_TxMailbox2AbortCallback(CAN_HandleTypeDef *hcan) { ZLOGI(TAG, "HAL_CAN_TxMailbox2AbortCallback"); } +void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan) { _oncanpacket(hcan); } +void HAL_CAN_RxFifo0FullCallback(CAN_HandleTypeDef *hcan) { ZLOGI(TAG, "HAL_CAN_RxFifo0FullCallback"); } +void HAL_CAN_RxFifo1MsgPendingCallback(CAN_HandleTypeDef *hcan) { ZLOGI(TAG, "HAL_CAN_RxFifo1MsgPendingCallback"); } +void HAL_CAN_RxFifo1FullCallback(CAN_HandleTypeDef *hcan) { ZLOGI(TAG, "HAL_CAN_RxFifo1FullCallback"); } +void HAL_CAN_SleepCallback(CAN_HandleTypeDef *hcan) { ZLOGI(TAG, "HAL_CAN_SleepCallback"); } +void HAL_CAN_WakeUpFromRxMsgCallback(CAN_HandleTypeDef *hcan) { ZLOGI(TAG, "HAL_CAN_WakeUpFromRxMsgCallback"); } +void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) { ZLOGI(TAG, "HAL_CAN_ErrorCallback"); } +} + +/*********************************************************************************************************************** + * 中断消息处理 * + ***********************************************************************************************************************/ + +static void _oncanpacket(CAN_HandleTypeDef *hcan) { + if (CANHANDLER != hcan) return; + CAN_RxHeaderTypeDef pHeader; + uint8_t aData[8] /*8byte table*/; + while (_getRxMessage(&pHeader, aData)) { + _processOneCanPacket(&pHeader, aData); + } +} + +static bool _getRxMessage(CAN_RxHeaderTypeDef *pHeader, uint8_t aData[] /*8byte table*/) { + /** + * @brief 读取当前FIFO中缓存了多少帧的数据 + */ + uint32_t level = HAL_CAN_GetRxFifoFillLevel(CANHANDLER, CAN_FIFO_NUM); + if (level == 0) { + return false; + } + HAL_StatusTypeDef HAL_RetVal; + HAL_RetVal = HAL_CAN_GetRxMessage(CANHANDLER, CAN_FIFO_NUM, pHeader, aData); + if (HAL_OK == HAL_RetVal) { + // 处理接收到的can总线数据 + return true; + } + return false; +} + +static void _processOneCanPacket(CAN_RxHeaderTypeDef *pHeader, uint8_t *aData) { + /** + * @brief 消息格式 12bit from,1bit emergency + * + * [1] [4bit] [8bit] [8bit] [4bit/4bit] + * , from to frameNum/frameId + */ + uint8_t from = (pHeader->ExtId & 0x00FF0000) >> 16; + uint8_t to = (pHeader->ExtId & 0x0000FF00) >> 8; + uint8_t nframe = (pHeader->ExtId & 0x000000F0) >> 4; + uint8_t frameId = (pHeader->ExtId & 0x0000000F); + + // ZLOGI(TAG, "from:%d to:%d nframe:%d frameId:%d", from, to, nframe, frameId); + + if (pHeader->IDE == CAN_ID_STD) { + return; + } + + // 只接收主机消息 + if (from != 1) { + return; + } + + if (to != m_deviceId && to != 0xff) { + return; + } + + // 上次接收到的消息还没有来的急处理 + if (m_rxbufcache.dataIsReady) { + ZLOGI(TAG, "discard rx packet ,last packet not processed"); + return; + } + + if (frameId == 0) { + m_rxbufcache.canPacketNum = 0; + } + + if (frameId != m_rxbufcache.canPacketNum) { + m_rxbufcache.canPacketNum = 0; + ZLOGI(TAG, "discard rx packet ,due to lost packet"); + return; + } + + if (m_rxbufcache.canPacketNum < ZARRAY_SIZE(m_rxbufcache.canPacket)) { + if (m_rxbufcache.canPacketNum == 0) { + m_rxbufcache.header = *pHeader; + m_rxbufcache.from = from; + m_rxbufcache.to = to; + } + m_rxbufcache.canPacket[m_rxbufcache.canPacketNum].datalen = pHeader->DLC; + memcpy(m_rxbufcache.canPacket[m_rxbufcache.canPacketNum].aData, aData, 8); + m_rxbufcache.canPacketNum++; + } else { + ZLOGI(TAG, "discard rx packet ,due to buffer full"); + m_rxbufcache.canPacketNum = 0; + return; + } + + if (nframe == frameId + 1) { + if (m_rxbufcache.canPacketNum != nframe) { + m_rxbufcache.canPacketNum = 0; + ZLOGI(TAG, "discard rx packet ,due to lost packet"); + return; + } else { + m_rxbufcache.dataIsReady = true; + } + } +} + +/*********************************************************************************************************************** + * FUNC * + ***********************************************************************************************************************/ + +static HAL_StatusTypeDef activateRxIT() { + HAL_StatusTypeDef hal_status = HAL_ERROR; + if (CAN_FIFO_NUM == CAN_RX_FIFO0) { + hal_status = HAL_CAN_ActivateNotification(CANHANDLER, CAN_IT_RX_FIFO0_MSG_PENDING); + } else if (CAN_FIFO_NUM == CAN_RX_FIFO1) { + hal_status = HAL_CAN_ActivateNotification(CANHANDLER, CAN_IT_RX_FIFO1_MSG_PENDING); + } else { + ZLOGE(TAG, "start can HAL_CAN_ActivateNotification CAN_IT_RX_FIFO0_MSG_PENDING fail\r\n"); + return hal_status; + } + return hal_status; +} +// static HAL_StatusTypeDef deactivateRxIT() { +// HAL_StatusTypeDef hal_status = HAL_ERROR; +// if (CAN_FIFO_NUM == CAN_RX_FIFO0) { +// hal_status = HAL_CAN_DeactivateNotification(CANHANDLER, CAN_IT_RX_FIFO0_MSG_PENDING); +// } else if (CAN_FIFO_NUM == CAN_RX_FIFO1) { +// hal_status = HAL_CAN_DeactivateNotification(CANHANDLER, CAN_IT_RX_FIFO1_MSG_PENDING); +// } else { +// ZLOGE(TAG, "start can HAL_CAN_ActivateNotification CAN_IT_RX_FIFO0_MSG_PENDING fail\r\n"); +// return hal_status; +// } +// return hal_status; +// } + +HAL_StatusTypeDef initializeFilter() { + HAL_StatusTypeDef HAL_Status; + CAN_FilterTypeDef sFilterConfig; + + uint32_t filterId; + uint32_t mask; + + memset(&sFilterConfig, 0, sizeof(sFilterConfig)); + sFilterConfig.FilterMode = CAN_FILTERMODE_IDMASK; // 设为MASK模式 + sFilterConfig.FilterScale = CAN_FILTERSCALE_32BIT; // CAN_FILTERSCALE_16BIT + sFilterConfig.FilterFIFOAssignment = CAN_FIFO_NUM; // 关联过滤器到rxfifoNum + sFilterConfig.FilterActivation = ENABLE; // 激活过滤器 + sFilterConfig.SlaveStartFilterBank = CAN_MAX_FILTER_NUM; // slave filter start index + + /******************************************************************************* + * 接收所有消息 * + *******************************************************************************/ + filterId = (0); // + mask = (0); // + sFilterConfig.FilterBank = CAN_FILTER_INDEX; // + sFilterConfig.FilterMaskIdLow = mask & 0xffff; // + sFilterConfig.FilterMaskIdHigh = (mask & 0xffff0000) >> 16; // + sFilterConfig.FilterIdLow = filterId & 0xffff; // + sFilterConfig.FilterIdHigh = (filterId & 0xffff0000) >> 16; // + HAL_Status = HAL_CAN_ConfigFilter(CANHANDLER, &sFilterConfig); + if (HAL_Status != HAL_OK) { + ZLOGE(TAG, "HAL_CAN_ConfigFilter filter0 fail"); + return HAL_Status; + } + // ZLOGI(TAG, "HAL_CAN_ConfigFilter filterID1 %08x", filterId >> 3); + return HAL_Status; +} + +void zcanbus_init(uint8_t deviceId) { + m_deviceId = deviceId; + + HAL_StatusTypeDef hal_status; + + m_rxbufcache.dataIsReady = false; + m_rxbufcache.id = 0; // 只接收来自主机的消息 + m_rxbufcache.canPacketNum = 0; + + hal_status = initializeFilter(); + if (hal_status != HAL_OK) { + ZLOGE(TAG, "start can initializeFilter fail\r\n"); + return; + } + + hal_status = HAL_CAN_Start(CANHANDLER); // 开启CAN + if (hal_status != HAL_OK) { + ZLOGE(TAG, "start can fail\r\n"); + return; + } + m_lock.init(); + + HAL_StatusTypeDef status = activateRxIT(); + if (status != HAL_OK) { + ZLOGE(TAG, "activateRxIT fail\r\n"); + ZASSERT(0); + return; + } + ZLOGI(TAG, "zcanbus init done"); +} +void zcanbus_reglistener(zcanbus_on_rx_t rxlistener) { + ZASSERT(m_numListener < ZARRAY_SIZE(m_rxlistener)); + m_rxlistener[m_numListener++] = rxlistener; +} + +void zcanbus_reg_on_connected_listener(zcanbus_on_connected_t connectedlistener) { m_connectedlistener = connectedlistener; } + +bool zcanbus_send_packet(uint8_t to, uint8_t *packet, size_t len) { return zcanbus_send_packet(to, packet, len, OVER_TIME_MS); } + +static char *hex2str(uint8_t *data, size_t len) { + static char buf[200]; + memset(buf, 0, sizeof(buf)); + for (size_t i = 0; i < len; i++) { + sprintf(buf + i * 2, "%02x", data[i]); + } + return buf; +} + +bool zcanbus_send_packet(uint8_t to, uint8_t *packet, size_t len, int overtimems) { + ZLOGI(TAG, "sendPacket to:%d, %s(%d)", to, hex2str(packet, len), len); + int npacket = len / 8 + (len % 8 == 0 ? 0 : 1); + if (npacket > 255) { + ZLOGE(TAG, "sendPacket fail, len:%d", len); + return false; + } + int finalpacketlen = len % 8 == 0 ? 8 : len % 8; + + for (uint8_t i = 0; i < npacket; i++) { + bool suc = false; + if (i == npacket - 1) { + suc = zcanbus_send_sub_packet(to, npacket, i, packet + i * 8, finalpacketlen, overtimems); + } else { + suc = zcanbus_send_sub_packet(to, npacket, i, packet + i * 8, 8, overtimems); + } + if (!suc) { + // ZLOGE(TAG, "sendPacket fail, packet(%d:%d)", npacket, i); + return false; + } + } + return true; +} + +// static const char *canpacket_dump(uint8_t *data, int size) { +// static char buf[20]; +// memset(buf, 0, sizeof(buf)); +// for (int i = 0; i < size; i++) { +// sprintf(buf + i * 2, "%02x", data[i]); +// } +// return buf; +// } + +bool zcanbus_send_sub_packet(uint8_t to, int npacket, int packetIndex, uint8_t *packet, size_t len, int overtimems) { + CAN_TxHeaderTypeDef pHeader; + uint8_t aData[8] /*8byte table*/; + uint32_t txMailBox = 0; + + uint32_t enterticket = zget_ticket(); + + memset(&pHeader, 0, sizeof(pHeader)); + memset(aData, 0, sizeof(aData)); + pHeader.StdId = 0x00; + pHeader.ExtId = (m_deviceId << 16) | (to << 8) | (npacket << 4) | (packetIndex); + pHeader.ExtId |= (m_priority & 0x0f) << 24; + pHeader.ExtId |= (0x01 << 28); + pHeader.IDE = CAN_ID_EXT; + pHeader.RTR = CAN_RTR_DATA; + pHeader.DLC = len; + pHeader.TransmitGlobalTime = DISABLE; + + memcpy(aData, packet, len); + // ZLOGI(TAG, "tx %s", canpacket_dump(aData, len)); + + HAL_StatusTypeDef lastTransmitStatus = HAL_CAN_AddTxMessage(CANHANDLER, &pHeader, aData, &txMailBox); + if (lastTransmitStatus != HAL_OK) { + ZLOGE(TAG, "HAL_CAN_AddTxMessage fail"); + return false; + } + + while (HAL_CAN_IsTxMessagePending(CANHANDLER, txMailBox)) { + if (zhas_passedms(enterticket) > (uint32_t)overtimems) { + lastTransmitStatus = HAL_TIMEOUT; + HAL_CAN_AbortTxRequest(CANHANDLER, txMailBox); + return false; + } + zos_delay_ms(1); + } + return true; +} + +bool zcanbus_send_ack(zcanbus_packet_t *rxpacket, uint8_t *param, size_t len) { + zlock_guard l(m_lock); + zcanbus_packet_t *txpacket = (zcanbus_packet_t *)txbuff; + txpacket->index = rxpacket->index; + txpacket->function_id = rxpacket->function_id; + txpacket->ptype = kreceipt; + if (param) memcpy(txpacket->params, param, len); + return zcanbus_send_packet(1 /*mainboard*/, (uint8_t *)&txpacket[0], sizeof(zcanbus_packet_t) + len); +} + +bool zcanbus_send_ack(iflytop::zscanprotocol::zcanbus_packet_t *rxpacket, int32_t val) { return zcanbus_send_ack(rxpacket, (uint8_t *)&val, sizeof(val)); } +bool zcanbus_send_ack(iflytop::zscanprotocol::zcanbus_packet_t *rxpacket, bool _val) { + int32_t val = _val ? 1 : 0; + return zcanbus_send_ack(rxpacket, (uint8_t *)&val, sizeof(val)); +} + +bool zcanbus_send_errorack(zcanbus_packet_t *rxpacket, int32_t errcode) { + zlock_guard l(m_lock); + m_priority = kpriority_receipt; + + zcanbus_packet_t *txpacket = (zcanbus_packet_t *)txbuff; + txpacket->index = rxpacket->index; + txpacket->function_id = rxpacket->function_id; + txpacket->ptype = kerror_receipt; + memcpy(txpacket->params, &errcode, sizeof(errcode)); + return zcanbus_send_packet(1 /*mainboard*/, (uint8_t *)&txpacket[0], sizeof(zcanbus_packet_t) + 4); +} +bool zcanbus_send_report(uint16_t function_id, uint8_t *param, size_t len, int32_t overtime) { + zlock_guard l(m_lock); + m_priority = kpriority_report; + + zcanbus_packet_t *txpacket = (zcanbus_packet_t *)txbuff; + txpacket->index = reportIndex++; + txpacket->function_id = function_id; + txpacket->ptype = kreport; + memcpy(txpacket->params, param, len); + return zcanbus_send_packet(1 /*mainboard*/, (uint8_t *)&txpacket[0], sizeof(zcanbus_packet_t) + len, overtime); +} + +bool zcanbus_send_emergency_report(uint16_t function_id, uint8_t *param, size_t len, int32_t overtime) { + zlock_guard l(m_lock); + m_priority = kpriority_emergency_report; + + zcanbus_packet_t *txpacket = (zcanbus_packet_t *)txbuff; + txpacket->index = reportIndex++; + txpacket->function_id = function_id; + txpacket->ptype = kreport; + memcpy(txpacket->params, param, len); + return zcanbus_send_packet(1 /*mainboard*/, (uint8_t *)&txpacket[0], sizeof(zcanbus_packet_t) + len, overtime); +} + +static void process_rx_packet(canrxbuffer_t *canrxbuf, uint8_t *rx, size_t len) { + zcanbus_packet_t *packet = (zcanbus_packet_t *)rx; + + lastpacket_ticket = zget_ticket(); + if (!m_is_connected) { + m_is_connected = true; + if (m_connectedlistener) m_connectedlistener(true); + } + + if (packet->ptype == kcmd) { + for (size_t i = 0; i < m_numListener; i++) { + m_rxlistener[i](canrxbuf->from, canrxbuf->to, rxdata, len); + } + } +} + +void zcanbus_schedule() { + canrxbuffer_t *rxbuf = &m_rxbufcache; + + uint16_t fromId = 0; + uint16_t toId = 0; + + if (rxbuf->dataIsReady) { + int dataoff = 0; + // rxdata[0] = rxbuf->from; + // rxdata[1] = rxbuf->to; + for (size_t i = 0; i < rxbuf->canPacketNum; i++) { + memcpy(rxdata + dataoff, rxbuf->canPacket[i].aData, rxbuf->canPacket[i].datalen); + dataoff += rxbuf->canPacket[i].datalen; + ZASSERT(dataoff < ZARRAY_SIZE(rxdata)); + } + process_rx_packet(rxbuf, rxdata, dataoff); + rxbuf->dataIsReady = false; + } + + if (m_is_connected && zhas_passedms(lastpacket_ticket) > HEART_OVERTIME) { + m_is_connected = false; + if (m_connectedlistener) m_connectedlistener(false); + } +} + +bool zcanbus_is_connected() { return m_is_connected; } \ No newline at end of file diff --git a/zcanreceiver/zcanreceiver.hpp b/zcanreceiver/zcanreceiver.hpp new file mode 100644 index 0000000..d5ef89e --- /dev/null +++ b/zcanreceiver/zcanreceiver.hpp @@ -0,0 +1,45 @@ +// +// Created by zwsd +// + +#pragma once +#include "project_configs.h" +#include "stm32basic/stm32basic.hpp" +#include "app_protocols/zscanprotocol/zscanprotocol.hpp" + +typedef void (*zcanbus_on_rx_t)(uint8_t from, uint8_t to, uint8_t *packet, size_t len); +typedef void (*zcanbus_on_connected_t)(bool connected); + +typedef struct { + public: + uint8_t aData[8]; /*8byte table*/ + uint8_t datalen; +} stm32_can_packet_t; + +typedef struct { + public: + uint16_t id; + CAN_RxHeaderTypeDef header; + uint8_t from; + uint8_t to; + stm32_can_packet_t canPacket[20]; // 用于接收can消息 + uint8_t canPacketNum = 0; + bool dataIsReady; +} canrxbuffer_t; + +void zcanbus_init(uint8_t deviceId); +void zcanbus_reglistener(zcanbus_on_rx_t rxlistener); +void zcanbus_reg_on_connected_listener(zcanbus_on_connected_t connectedlistener); +void zcanbus_schedule(); +bool zcanbus_is_connected(); + +bool zcanbus_send_packet(uint8_t to, uint8_t *packet, size_t len); +bool zcanbus_send_packet(uint8_t to, uint8_t *packet, size_t len, int overtimems); +bool zcanbus_send_sub_packet(uint8_t to, int npacket, int packetIndex, uint8_t *packet, size_t len, int overtimems); + +bool zcanbus_send_ack(iflytop::zscanprotocol::zcanbus_packet_t *rxpacket, uint8_t *param, size_t len); +bool zcanbus_send_ack(iflytop::zscanprotocol::zcanbus_packet_t *rxpacket, int32_t val); +bool zcanbus_send_ack(iflytop::zscanprotocol::zcanbus_packet_t *rxpacket, bool _val); +bool zcanbus_send_errorack(iflytop::zscanprotocol::zcanbus_packet_t *rxpacket, int32_t errcode); +bool zcanbus_send_report(uint16_t function_id, uint8_t *param, size_t len, int32_t overtime); +bool zcanbus_send_emergency_report(uint16_t function_id, uint8_t *param, size_t len, int32_t overtime);