init

12 months ago · 4ce9d4aa1c
5 changed files with 323 additions and 0 deletions
--- a/halport/gins.c
+++ b/halport/gins.c
@ -0,0 +1,68 @@
+#include "gins.h"
+
+#include "main.h"
+
+DEFINE_GLOBAL(CAN_HandleTypeDef, hcan1);
+
+DEFINE_GLOBAL(TIM_HandleTypeDef, htim1);
+DEFINE_GLOBAL(TIM_HandleTypeDef, htim2);
+DEFINE_GLOBAL(TIM_HandleTypeDef, htim3);
+DEFINE_GLOBAL(TIM_HandleTypeDef, htim6);
+DEFINE_GLOBAL(TIM_HandleTypeDef, htim7);
+DEFINE_GLOBAL(TIM_HandleTypeDef, htim11);
+
+// DEFINE_GLOBAL(I2C_HandleTypeDef, hi2c1);
+
+DEFINE_GLOBAL(UART_HandleTypeDef, huart1);
+DEFINE_GLOBAL(UART_HandleTypeDef, huart2);
+DEFINE_GLOBAL(UART_HandleTypeDef, huart3);
+DEFINE_GLOBAL(UART_HandleTypeDef, huart4);
+
+DEFINE_GLOBAL(DMA_HandleTypeDef, hdma1_stream0);
+DEFINE_GLOBAL(DMA_HandleTypeDef, hdma1_stream1);
+DEFINE_GLOBAL(DMA_HandleTypeDef, hdma1_stream2);
+DEFINE_GLOBAL(DMA_HandleTypeDef, hdma1_stream3);
+DEFINE_GLOBAL(DMA_HandleTypeDef, hdma1_stream4);
+DEFINE_GLOBAL(DMA_HandleTypeDef, hdma1_stream5);
+DEFINE_GLOBAL(DMA_HandleTypeDef, hdma1_stream6);
+DEFINE_GLOBAL(DMA_HandleTypeDef, hdma1_stream7);
+DEFINE_GLOBAL(DMA_HandleTypeDef, hdma2_stream0);
+DEFINE_GLOBAL(DMA_HandleTypeDef, hdma2_stream1);
+DEFINE_GLOBAL(DMA_HandleTypeDef, hdma2_stream2);
+DEFINE_GLOBAL(DMA_HandleTypeDef, hdma2_stream3);
+DEFINE_GLOBAL(DMA_HandleTypeDef, hdma2_stream4);
+DEFINE_GLOBAL(DMA_HandleTypeDef, hdma2_stream5);
+DEFINE_GLOBAL(DMA_HandleTypeDef, hdma2_stream6);
+DEFINE_GLOBAL(DMA_HandleTypeDef, hdma2_stream7);
+
+DMA_Stream_TypeDef* getDmaStreamTypeDef(DMA_HandleTypeDef* dmah) {
+  if (dmah->Instance) return dmah->Instance;
+
+  if (dmah == &hdma1_stream1) return DMA1_Stream1;
+  if (dmah == &hdma1_stream2) return DMA1_Stream2;
+  if (dmah == &hdma1_stream3) return DMA1_Stream3;
+  if (dmah == &hdma1_stream4) return DMA1_Stream4;
+  if (dmah == &hdma1_stream5) return DMA1_Stream5;
+  if (dmah == &hdma1_stream6) return DMA1_Stream6;
+  if (dmah == &hdma1_stream7) return DMA1_Stream7;
+  if (dmah == &hdma2_stream0) return DMA2_Stream0;
+  if (dmah == &hdma2_stream1) return DMA2_Stream1;
+  if (dmah == &hdma2_stream2) return DMA2_Stream2;
+  if (dmah == &hdma2_stream3) return DMA2_Stream3;
+  if (dmah == &hdma2_stream4) return DMA2_Stream4;
+  if (dmah == &hdma2_stream5) return DMA2_Stream5;
+  if (dmah == &hdma2_stream6) return DMA2_Stream6;
+  if (dmah == &hdma2_stream7) return DMA2_Stream7;
+  return NULL;
+}
+
+DEFINE_GLOBAL(SPI_HandleTypeDef, hspi1);
+DEFINE_GLOBAL(SPI_HandleTypeDef, hspi2);
+DEFINE_GLOBAL(SPI_HandleTypeDef, hspi3);
+DEFINE_GLOBAL(ADC_HandleTypeDef, hadc1);
+
+/***********************************************************************************************************************
+ *                                                         PTR                                                         *
+ ***********************************************************************************************************************/
+
+DEFINE_GLOBAL(IWDG_HandleTypeDef, hiwdg);
--- a/halport/gins.h
+++ b/halport/gins.h
@ -0,0 +1,69 @@
+#pragma once
+
+#include <stdbool.h>
+
+#include "main.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define EXTERN_GLOBAL(type, name) extern type name;
+
+#define EXTERN_GLOBAL_PTR(type, name) extern type* name;
+
+#define DEFINE_GLOBAL(type, name) type name;
+
+#define DEFINE_GLOBAL_PTR(type, name) type* name;
+
+/***********************************************************************************************************************
+ *                                                       GLOBAL                                                        *
+ ***********************************************************************************************************************/
+
+EXTERN_GLOBAL(CAN_HandleTypeDef, hcan1);
+
+EXTERN_GLOBAL(TIM_HandleTypeDef, htim1);
+EXTERN_GLOBAL(TIM_HandleTypeDef, htim2);
+EXTERN_GLOBAL(TIM_HandleTypeDef, htim3);
+EXTERN_GLOBAL(TIM_HandleTypeDef, htim6);
+EXTERN_GLOBAL(TIM_HandleTypeDef, htim7);
+EXTERN_GLOBAL(TIM_HandleTypeDef, htim11);
+
+EXTERN_GLOBAL(I2C_HandleTypeDef, hi2c1);
+
+EXTERN_GLOBAL(UART_HandleTypeDef, huart1);
+EXTERN_GLOBAL(UART_HandleTypeDef, huart2);
+EXTERN_GLOBAL(UART_HandleTypeDef, huart3);
+EXTERN_GLOBAL(UART_HandleTypeDef, huart4);
+
+EXTERN_GLOBAL(DMA_HandleTypeDef, hdma1_stream0);
+EXTERN_GLOBAL(DMA_HandleTypeDef, hdma1_stream1);
+EXTERN_GLOBAL(DMA_HandleTypeDef, hdma1_stream2);
+EXTERN_GLOBAL(DMA_HandleTypeDef, hdma1_stream3);
+EXTERN_GLOBAL(DMA_HandleTypeDef, hdma1_stream4);
+EXTERN_GLOBAL(DMA_HandleTypeDef, hdma1_stream5);
+EXTERN_GLOBAL(DMA_HandleTypeDef, hdma1_stream6);
+EXTERN_GLOBAL(DMA_HandleTypeDef, hdma1_stream7);
+
+EXTERN_GLOBAL(DMA_HandleTypeDef, hdma2_stream0);
+EXTERN_GLOBAL(DMA_HandleTypeDef, hdma2_stream1);
+EXTERN_GLOBAL(DMA_HandleTypeDef, hdma2_stream2);
+EXTERN_GLOBAL(DMA_HandleTypeDef, hdma2_stream3);
+EXTERN_GLOBAL(DMA_HandleTypeDef, hdma2_stream4);
+EXTERN_GLOBAL(DMA_HandleTypeDef, hdma2_stream5);
+EXTERN_GLOBAL(DMA_HandleTypeDef, hdma2_stream6);
+EXTERN_GLOBAL(DMA_HandleTypeDef, hdma2_stream7);
+
+EXTERN_GLOBAL(SPI_HandleTypeDef, hspi1);
+EXTERN_GLOBAL(SPI_HandleTypeDef, hspi2);
+EXTERN_GLOBAL(SPI_HandleTypeDef, hspi3);
+
+EXTERN_GLOBAL(ADC_HandleTypeDef, hadc1);
+
+EXTERN_GLOBAL(IWDG_HandleTypeDef, hiwdg);
+
+DMA_Stream_TypeDef* getDmaStreamTypeDef(DMA_HandleTypeDef* dmah);
+
+#ifdef __cplusplus
+}
+#endif
--- a/halport/stm32f4xx_hal_timebase_tim.c
+++ b/halport/stm32f4xx_hal_timebase_tim.c
@ -0,0 +1,103 @@
+/* USER CODE BEGIN Header */
+/**
+ ******************************************************************************
+ * @file    stm32f4xx_hal_timebase_TIM.c
+ * @brief   HAL time base based on the hardware TIM.
+ ******************************************************************************
+ * @attention
+ *
+ * Copyright (c) 2023 STMicroelectronics.
+ * All rights reserved.
+ *
+ * This software is licensed under terms that can be found in the LICENSE file
+ * in the root directory of this software component.
+ * If no LICENSE file comes with this software, it is provided AS-IS.
+ *
+ ******************************************************************************
+ */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "gins.h"
+#include "stm32f4xx_hal.h"
+#include "stm32f4xx_hal_tim.h"
+
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) {
+  RCC_ClkInitTypeDef clkconfig;
+  uint32_t           uwTimclock = 0U;
+
+  uint32_t          uwPrescalerValue = 0U;
+  uint32_t          pFLatency;
+  HAL_StatusTypeDef status;
+
+  /* Enable TIM11 clock */
+  __HAL_RCC_TIM11_CLK_ENABLE();
+
+  /* Get clock configuration */
+  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+  /* Compute TIM11 clock */
+  uwTimclock = 2 * HAL_RCC_GetPCLK2Freq();
+
+  /* Compute the prescaler value to have TIM11 counter clock equal to 1MHz */
+  uwPrescalerValue = (uint32_t)((uwTimclock / 1000000U) - 1U);
+
+  /* Initialize TIM11 */
+  htim11.Instance = TIM11;
+
+  /* Initialize TIMx peripheral as follow:
+
+  + Period = [(TIM11CLK/1000) - 1]. to have a (1/1000) s time base.
+  + Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock.
+  + ClockDivision = 0
+  + Counter direction = Up
+  */
+  htim11.Init.Period            = (1000000U / 1000U) - 1U;
+  htim11.Init.Prescaler         = uwPrescalerValue;
+  htim11.Init.ClockDivision     = 0;
+  htim11.Init.CounterMode       = TIM_COUNTERMODE_UP;
+  htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+
+  status = HAL_TIM_Base_Init(&htim11);
+  if (status == HAL_OK) {
+    /* Start the TIM time Base generation in interrupt mode */
+    status = HAL_TIM_Base_Start_IT(&htim11);
+    if (status == HAL_OK) {
+      /* Enable the TIM11 global Interrupt */
+      HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM11_IRQn);
+      /* Configure the SysTick IRQ priority */
+      if (TickPriority < (1UL << __NVIC_PRIO_BITS)) {
+        /* Configure the TIM IRQ priority */
+        HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM11_IRQn, TickPriority, 0U);
+        uwTickPrio = TickPriority;
+      } else {
+        status = HAL_ERROR;
+      }
+    }
+  }
+
+  /* Return function status */
+  return status;
+}
+
+/**
+ * @brief  Suspend Tick increment.
+ * @note   Disable the tick increment by disabling TIM11 update interrupt.
+ * @param  None
+ * @retval None
+ */
+void HAL_SuspendTick(void) {
+  /* Disable TIM11 update Interrupt */
+  __HAL_TIM_DISABLE_IT(&htim11, TIM_IT_UPDATE);
+}
+
+/**
+ * @brief  Resume Tick increment.
+ * @note   Enable the tick increment by Enabling TIM11 update interrupt.
+ * @param  None
+ * @retval None
+ */
+void HAL_ResumeTick(void) {
+  /* Enable TIM11 Update interrupt */
+  __HAL_TIM_ENABLE_IT(&htim11, TIM_IT_UPDATE);
+}
--- a/halport/stm32irq.c
+++ b/halport/stm32irq.c
@ -0,0 +1,79 @@
+
+#include <stdio.h>
+
+#include "gins.h"
+#include "main.h"
+
+#define TAG "IRQ"
+
+void NMI_Handler(void) {
+  printf("E:%s\n", __FUNCTION__);
+  while (1) {
+  }
+}
+void HardFault_Handler(void) {
+  printf("E:%s\n", __FUNCTION__);
+  while (1) {
+  }
+}
+
+void MemManage_Handler(void) {
+  printf("E:%s\n", __FUNCTION__);
+  while (1) {
+  }
+}
+
+void BusFault_Handler(void) {
+  printf("E:%s\n", __FUNCTION__);
+  while (1) {
+  }
+}
+void UsageFault_Handler(void) {
+  printf("E:%s\n", __FUNCTION__);
+  while (1) {
+  }
+}
+void DebugMon_Handler(void) {}
+
+/***********************************************************************************************************************
+ *                                                       DMAIRQ                                                        *
+ ***********************************************************************************************************************/
+void DMA1_Stream0_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma1_stream0); }
+void DMA1_Stream1_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma1_stream1); }
+void DMA1_Stream2_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma1_stream2); }
+void DMA1_Stream3_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma1_stream3); }
+void DMA1_Stream4_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma1_stream4); }
+void DMA1_Stream5_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma1_stream5); }
+void DMA1_Stream6_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma1_stream6); }
+void DMA1_Stream7_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma1_stream7); }
+
+void DMA2_Stream0_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma2_stream0); }
+void DMA2_Stream1_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma2_stream1); }
+void DMA2_Stream2_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma2_stream2); }
+void DMA2_Stream3_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma2_stream3); }
+void DMA2_Stream4_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma2_stream4); }
+void DMA2_Stream5_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma2_stream5); }
+void DMA2_Stream6_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma2_stream6); }
+void DMA2_Stream7_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma2_stream7); }
+
+void CAN1_TX_IRQHandler(void) { HAL_CAN_IRQHandler(&hcan1); }
+void CAN1_RX0_IRQHandler(void) { HAL_CAN_IRQHandler(&hcan1); }
+void CAN1_RX1_IRQHandler(void) { HAL_CAN_IRQHandler(&hcan1); }
+void CAN1_SCE_IRQHandler(void) { HAL_CAN_IRQHandler(&hcan1); }
+// 定时器
+
+void TIM1_TRG_COM_TIM11_IRQHandler(void) {
+  if (htim11.Instance) HAL_TIM_IRQHandler(&htim11);
+  if (htim1.Instance) HAL_TIM_IRQHandler(&htim1);
+}
+void TIM6_DAC_IRQHandler(void) {
+  if (htim6.Instance) HAL_TIM_IRQHandler(&htim6);
+}
+void TIM7_IRQHandler(void) {
+  if (htim7.Instance) HAL_TIM_IRQHandler(&htim7);
+}
+// 串口
+void USART1_IRQHandler(void) { HAL_UART_IRQHandler(&huart1); }
+void USART2_IRQHandler(void) { HAL_UART_IRQHandler(&huart2); }
+void USART3_IRQHandler(void) { HAL_UART_IRQHandler(&huart3); }
+void UART4_IRQHandler(void) { HAL_UART_IRQHandler(&huart4); }
--- a/zstm32.hpp
+++ b/zstm32.hpp
@ -0,0 +1,4 @@
+#pragma once
+extern "C"{
+#include "zstm32/halport/gins.h"
+}