commit
4ce9d4aa1c
5 changed files with 323 additions and 0 deletions
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68halport/gins.c
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69halport/gins.h
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103halport/stm32f4xx_hal_timebase_tim.c
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79halport/stm32irq.c
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4zstm32.hpp
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#include "gins.h" |
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#include "main.h" |
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DEFINE_GLOBAL(CAN_HandleTypeDef, hcan1); |
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DEFINE_GLOBAL(TIM_HandleTypeDef, htim1); |
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DEFINE_GLOBAL(TIM_HandleTypeDef, htim2); |
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DEFINE_GLOBAL(TIM_HandleTypeDef, htim3); |
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DEFINE_GLOBAL(TIM_HandleTypeDef, htim6); |
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DEFINE_GLOBAL(TIM_HandleTypeDef, htim7); |
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DEFINE_GLOBAL(TIM_HandleTypeDef, htim11); |
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// DEFINE_GLOBAL(I2C_HandleTypeDef, hi2c1); |
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DEFINE_GLOBAL(UART_HandleTypeDef, huart1); |
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DEFINE_GLOBAL(UART_HandleTypeDef, huart2); |
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DEFINE_GLOBAL(UART_HandleTypeDef, huart3); |
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DEFINE_GLOBAL(UART_HandleTypeDef, huart4); |
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DEFINE_GLOBAL(DMA_HandleTypeDef, hdma1_stream0); |
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DEFINE_GLOBAL(DMA_HandleTypeDef, hdma1_stream1); |
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DEFINE_GLOBAL(DMA_HandleTypeDef, hdma1_stream2); |
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DEFINE_GLOBAL(DMA_HandleTypeDef, hdma1_stream3); |
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DEFINE_GLOBAL(DMA_HandleTypeDef, hdma1_stream4); |
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DEFINE_GLOBAL(DMA_HandleTypeDef, hdma1_stream5); |
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DEFINE_GLOBAL(DMA_HandleTypeDef, hdma1_stream6); |
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DEFINE_GLOBAL(DMA_HandleTypeDef, hdma1_stream7); |
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DEFINE_GLOBAL(DMA_HandleTypeDef, hdma2_stream0); |
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DEFINE_GLOBAL(DMA_HandleTypeDef, hdma2_stream1); |
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DEFINE_GLOBAL(DMA_HandleTypeDef, hdma2_stream2); |
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DEFINE_GLOBAL(DMA_HandleTypeDef, hdma2_stream3); |
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DEFINE_GLOBAL(DMA_HandleTypeDef, hdma2_stream4); |
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DEFINE_GLOBAL(DMA_HandleTypeDef, hdma2_stream5); |
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DEFINE_GLOBAL(DMA_HandleTypeDef, hdma2_stream6); |
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DEFINE_GLOBAL(DMA_HandleTypeDef, hdma2_stream7); |
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DMA_Stream_TypeDef* getDmaStreamTypeDef(DMA_HandleTypeDef* dmah) { |
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if (dmah->Instance) return dmah->Instance; |
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if (dmah == &hdma1_stream1) return DMA1_Stream1; |
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if (dmah == &hdma1_stream2) return DMA1_Stream2; |
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if (dmah == &hdma1_stream3) return DMA1_Stream3; |
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if (dmah == &hdma1_stream4) return DMA1_Stream4; |
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if (dmah == &hdma1_stream5) return DMA1_Stream5; |
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if (dmah == &hdma1_stream6) return DMA1_Stream6; |
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if (dmah == &hdma1_stream7) return DMA1_Stream7; |
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if (dmah == &hdma2_stream0) return DMA2_Stream0; |
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if (dmah == &hdma2_stream1) return DMA2_Stream1; |
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if (dmah == &hdma2_stream2) return DMA2_Stream2; |
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if (dmah == &hdma2_stream3) return DMA2_Stream3; |
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if (dmah == &hdma2_stream4) return DMA2_Stream4; |
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if (dmah == &hdma2_stream5) return DMA2_Stream5; |
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if (dmah == &hdma2_stream6) return DMA2_Stream6; |
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if (dmah == &hdma2_stream7) return DMA2_Stream7; |
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return NULL; |
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} |
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DEFINE_GLOBAL(SPI_HandleTypeDef, hspi1); |
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DEFINE_GLOBAL(SPI_HandleTypeDef, hspi2); |
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DEFINE_GLOBAL(SPI_HandleTypeDef, hspi3); |
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DEFINE_GLOBAL(ADC_HandleTypeDef, hadc1); |
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/*********************************************************************************************************************** |
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* PTR * |
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***********************************************************************************************************************/ |
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DEFINE_GLOBAL(IWDG_HandleTypeDef, hiwdg); |
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#pragma once |
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#include <stdbool.h> |
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#include "main.h" |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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#define EXTERN_GLOBAL(type, name) extern type name; |
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#define EXTERN_GLOBAL_PTR(type, name) extern type* name; |
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#define DEFINE_GLOBAL(type, name) type name; |
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#define DEFINE_GLOBAL_PTR(type, name) type* name; |
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/*********************************************************************************************************************** |
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* GLOBAL * |
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***********************************************************************************************************************/ |
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EXTERN_GLOBAL(CAN_HandleTypeDef, hcan1); |
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EXTERN_GLOBAL(TIM_HandleTypeDef, htim1); |
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EXTERN_GLOBAL(TIM_HandleTypeDef, htim2); |
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EXTERN_GLOBAL(TIM_HandleTypeDef, htim3); |
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EXTERN_GLOBAL(TIM_HandleTypeDef, htim6); |
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EXTERN_GLOBAL(TIM_HandleTypeDef, htim7); |
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EXTERN_GLOBAL(TIM_HandleTypeDef, htim11); |
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EXTERN_GLOBAL(I2C_HandleTypeDef, hi2c1); |
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EXTERN_GLOBAL(UART_HandleTypeDef, huart1); |
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EXTERN_GLOBAL(UART_HandleTypeDef, huart2); |
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EXTERN_GLOBAL(UART_HandleTypeDef, huart3); |
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EXTERN_GLOBAL(UART_HandleTypeDef, huart4); |
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EXTERN_GLOBAL(DMA_HandleTypeDef, hdma1_stream0); |
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EXTERN_GLOBAL(DMA_HandleTypeDef, hdma1_stream1); |
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EXTERN_GLOBAL(DMA_HandleTypeDef, hdma1_stream2); |
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EXTERN_GLOBAL(DMA_HandleTypeDef, hdma1_stream3); |
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EXTERN_GLOBAL(DMA_HandleTypeDef, hdma1_stream4); |
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EXTERN_GLOBAL(DMA_HandleTypeDef, hdma1_stream5); |
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EXTERN_GLOBAL(DMA_HandleTypeDef, hdma1_stream6); |
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EXTERN_GLOBAL(DMA_HandleTypeDef, hdma1_stream7); |
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EXTERN_GLOBAL(DMA_HandleTypeDef, hdma2_stream0); |
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EXTERN_GLOBAL(DMA_HandleTypeDef, hdma2_stream1); |
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EXTERN_GLOBAL(DMA_HandleTypeDef, hdma2_stream2); |
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EXTERN_GLOBAL(DMA_HandleTypeDef, hdma2_stream3); |
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EXTERN_GLOBAL(DMA_HandleTypeDef, hdma2_stream4); |
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EXTERN_GLOBAL(DMA_HandleTypeDef, hdma2_stream5); |
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EXTERN_GLOBAL(DMA_HandleTypeDef, hdma2_stream6); |
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EXTERN_GLOBAL(DMA_HandleTypeDef, hdma2_stream7); |
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EXTERN_GLOBAL(SPI_HandleTypeDef, hspi1); |
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EXTERN_GLOBAL(SPI_HandleTypeDef, hspi2); |
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EXTERN_GLOBAL(SPI_HandleTypeDef, hspi3); |
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EXTERN_GLOBAL(ADC_HandleTypeDef, hadc1); |
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EXTERN_GLOBAL(IWDG_HandleTypeDef, hiwdg); |
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DMA_Stream_TypeDef* getDmaStreamTypeDef(DMA_HandleTypeDef* dmah); |
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#ifdef __cplusplus |
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} |
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#endif |
@ -0,0 +1,103 @@ |
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/* USER CODE BEGIN Header */ |
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/** |
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****************************************************************************** |
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* @file stm32f4xx_hal_timebase_TIM.c |
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* @brief HAL time base based on the hardware TIM. |
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****************************************************************************** |
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* @attention |
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* |
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* Copyright (c) 2023 STMicroelectronics. |
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* All rights reserved. |
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* |
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* This software is licensed under terms that can be found in the LICENSE file |
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* in the root directory of this software component. |
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* If no LICENSE file comes with this software, it is provided AS-IS. |
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* |
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****************************************************************************** |
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*/ |
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/* USER CODE END Header */ |
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/* Includes ------------------------------------------------------------------*/ |
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#include "gins.h" |
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#include "stm32f4xx_hal.h" |
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#include "stm32f4xx_hal_tim.h" |
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HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { |
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RCC_ClkInitTypeDef clkconfig; |
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uint32_t uwTimclock = 0U; |
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uint32_t uwPrescalerValue = 0U; |
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uint32_t pFLatency; |
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HAL_StatusTypeDef status; |
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/* Enable TIM11 clock */ |
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__HAL_RCC_TIM11_CLK_ENABLE(); |
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/* Get clock configuration */ |
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HAL_RCC_GetClockConfig(&clkconfig, &pFLatency); |
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/* Compute TIM11 clock */ |
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uwTimclock = 2 * HAL_RCC_GetPCLK2Freq(); |
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/* Compute the prescaler value to have TIM11 counter clock equal to 1MHz */ |
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uwPrescalerValue = (uint32_t)((uwTimclock / 1000000U) - 1U); |
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/* Initialize TIM11 */ |
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htim11.Instance = TIM11; |
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/* Initialize TIMx peripheral as follow: |
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+ Period = [(TIM11CLK/1000) - 1]. to have a (1/1000) s time base. |
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+ Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock. |
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+ ClockDivision = 0 |
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+ Counter direction = Up |
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*/ |
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htim11.Init.Period = (1000000U / 1000U) - 1U; |
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htim11.Init.Prescaler = uwPrescalerValue; |
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htim11.Init.ClockDivision = 0; |
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htim11.Init.CounterMode = TIM_COUNTERMODE_UP; |
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htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; |
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status = HAL_TIM_Base_Init(&htim11); |
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if (status == HAL_OK) { |
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/* Start the TIM time Base generation in interrupt mode */ |
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status = HAL_TIM_Base_Start_IT(&htim11); |
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if (status == HAL_OK) { |
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/* Enable the TIM11 global Interrupt */ |
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HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM11_IRQn); |
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/* Configure the SysTick IRQ priority */ |
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if (TickPriority < (1UL << __NVIC_PRIO_BITS)) { |
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/* Configure the TIM IRQ priority */ |
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HAL_NVIC_SetPriority(TIM1_TRG_COM_TIM11_IRQn, TickPriority, 0U); |
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uwTickPrio = TickPriority; |
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} else { |
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status = HAL_ERROR; |
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} |
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} |
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} |
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/* Return function status */ |
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return status; |
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} |
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/** |
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* @brief Suspend Tick increment. |
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* @note Disable the tick increment by disabling TIM11 update interrupt. |
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* @param None |
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* @retval None |
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*/ |
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void HAL_SuspendTick(void) { |
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/* Disable TIM11 update Interrupt */ |
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__HAL_TIM_DISABLE_IT(&htim11, TIM_IT_UPDATE); |
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} |
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/** |
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* @brief Resume Tick increment. |
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* @note Enable the tick increment by Enabling TIM11 update interrupt. |
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* @param None |
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* @retval None |
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*/ |
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void HAL_ResumeTick(void) { |
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/* Enable TIM11 Update interrupt */ |
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__HAL_TIM_ENABLE_IT(&htim11, TIM_IT_UPDATE); |
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} |
@ -0,0 +1,79 @@ |
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#include <stdio.h> |
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#include "gins.h" |
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#include "main.h" |
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#define TAG "IRQ" |
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void NMI_Handler(void) { |
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printf("E:%s\n", __FUNCTION__); |
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while (1) { |
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} |
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} |
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void HardFault_Handler(void) { |
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printf("E:%s\n", __FUNCTION__); |
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while (1) { |
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} |
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} |
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void MemManage_Handler(void) { |
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printf("E:%s\n", __FUNCTION__); |
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while (1) { |
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} |
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} |
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void BusFault_Handler(void) { |
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printf("E:%s\n", __FUNCTION__); |
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while (1) { |
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} |
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} |
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void UsageFault_Handler(void) { |
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printf("E:%s\n", __FUNCTION__); |
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while (1) { |
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} |
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} |
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void DebugMon_Handler(void) {} |
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/*********************************************************************************************************************** |
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* DMAIRQ * |
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***********************************************************************************************************************/ |
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void DMA1_Stream0_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma1_stream0); } |
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void DMA1_Stream1_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma1_stream1); } |
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void DMA1_Stream2_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma1_stream2); } |
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void DMA1_Stream3_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma1_stream3); } |
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void DMA1_Stream4_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma1_stream4); } |
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void DMA1_Stream5_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma1_stream5); } |
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void DMA1_Stream6_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma1_stream6); } |
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void DMA1_Stream7_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma1_stream7); } |
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void DMA2_Stream0_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma2_stream0); } |
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void DMA2_Stream1_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma2_stream1); } |
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void DMA2_Stream2_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma2_stream2); } |
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void DMA2_Stream3_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma2_stream3); } |
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void DMA2_Stream4_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma2_stream4); } |
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void DMA2_Stream5_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma2_stream5); } |
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void DMA2_Stream6_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma2_stream6); } |
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void DMA2_Stream7_IRQHandler(void) { HAL_DMA_IRQHandler(&hdma2_stream7); } |
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void CAN1_TX_IRQHandler(void) { HAL_CAN_IRQHandler(&hcan1); } |
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void CAN1_RX0_IRQHandler(void) { HAL_CAN_IRQHandler(&hcan1); } |
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void CAN1_RX1_IRQHandler(void) { HAL_CAN_IRQHandler(&hcan1); } |
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void CAN1_SCE_IRQHandler(void) { HAL_CAN_IRQHandler(&hcan1); } |
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// 定时器 |
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void TIM1_TRG_COM_TIM11_IRQHandler(void) { |
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if (htim11.Instance) HAL_TIM_IRQHandler(&htim11); |
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if (htim1.Instance) HAL_TIM_IRQHandler(&htim1); |
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} |
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void TIM6_DAC_IRQHandler(void) { |
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if (htim6.Instance) HAL_TIM_IRQHandler(&htim6); |
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} |
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void TIM7_IRQHandler(void) { |
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if (htim7.Instance) HAL_TIM_IRQHandler(&htim7); |
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} |
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// 串口 |
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void USART1_IRQHandler(void) { HAL_UART_IRQHandler(&huart1); } |
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void USART2_IRQHandler(void) { HAL_UART_IRQHandler(&huart2); } |
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void USART3_IRQHandler(void) { HAL_UART_IRQHandler(&huart3); } |
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void UART4_IRQHandler(void) { HAL_UART_IRQHandler(&huart4); } |
@ -0,0 +1,4 @@ |
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#pragma once
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extern "C"{ |
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#include "zstm32/halport/gins.h"
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} |
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